1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/of.h> 8 #include <linux/platform_device.h> 9 10 #include "pinctrl-msm.h" 11 12 #define REG_SIZE 0x1000 13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \ 14 { \ 15 .grp = PINCTRL_PINGROUP("gpio" #id, \ 16 gpio##id##_pins, \ 17 ARRAY_SIZE(gpio##id##_pins)), \ 18 .funcs = (int[]){ \ 19 msm_mux_gpio, /* gpio mode */ \ 20 msm_mux_##f1, \ 21 msm_mux_##f2, \ 22 msm_mux_##f3, \ 23 msm_mux_##f4, \ 24 msm_mux_##f5, \ 25 msm_mux_##f6, \ 26 msm_mux_##f7, \ 27 msm_mux_##f8, \ 28 msm_mux_##f9, \ 29 msm_mux_##f10, \ 30 msm_mux_##f11 /* egpio mode */ \ 31 }, \ 32 .nfuncs = 12, \ 33 .ctl_reg = REG_SIZE * id, \ 34 .io_reg = 0x4 + REG_SIZE * id, \ 35 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 36 .intr_status_reg = 0xc + REG_SIZE * id, \ 37 .intr_target_reg = 0x8 + REG_SIZE * id, \ 38 .mux_bit = 2, \ 39 .pull_bit = 0, \ 40 .drv_bit = 6, \ 41 .egpio_enable = 12, \ 42 .egpio_present = 11, \ 43 .oe_bit = 9, \ 44 .in_bit = 0, \ 45 .out_bit = 1, \ 46 .intr_enable_bit = 0, \ 47 .intr_status_bit = 0, \ 48 .intr_wakeup_present_bit = 6, \ 49 .intr_wakeup_enable_bit = 7, \ 50 .intr_target_bit = 5, \ 51 .intr_target_kpss_val = 3, \ 52 .intr_raw_status_bit = 4, \ 53 .intr_polarity_bit = 1, \ 54 .intr_detection_bit = 2, \ 55 .intr_detection_width = 2, \ 56 } 57 58 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ 59 { \ 60 .grp = PINCTRL_PINGROUP(#pg_name, \ 61 pg_name##_pins, \ 62 ARRAY_SIZE(pg_name##_pins)), \ 63 .ctl_reg = ctl, \ 64 .io_reg = 0, \ 65 .intr_cfg_reg = 0, \ 66 .intr_status_reg = 0, \ 67 .intr_target_reg = 0, \ 68 .mux_bit = -1, \ 69 .pull_bit = pull, \ 70 .drv_bit = drv, \ 71 .oe_bit = -1, \ 72 .in_bit = -1, \ 73 .out_bit = -1, \ 74 .intr_enable_bit = -1, \ 75 .intr_status_bit = -1, \ 76 .intr_target_bit = -1, \ 77 .intr_raw_status_bit = -1, \ 78 .intr_polarity_bit = -1, \ 79 .intr_detection_bit = -1, \ 80 .intr_detection_width = -1, \ 81 } 82 83 #define UFS_RESET(pg_name, ctl, io) \ 84 { \ 85 .grp = PINCTRL_PINGROUP(#pg_name, \ 86 pg_name##_pins, \ 87 ARRAY_SIZE(pg_name##_pins)), \ 88 .ctl_reg = ctl, \ 89 .io_reg = io, \ 90 .intr_cfg_reg = 0, \ 91 .intr_status_reg = 0, \ 92 .intr_target_reg = 0, \ 93 .mux_bit = -1, \ 94 .pull_bit = 3, \ 95 .drv_bit = 0, \ 96 .oe_bit = -1, \ 97 .in_bit = -1, \ 98 .out_bit = 0, \ 99 .intr_enable_bit = -1, \ 100 .intr_status_bit = -1, \ 101 .intr_target_bit = -1, \ 102 .intr_raw_status_bit = -1, \ 103 .intr_polarity_bit = -1, \ 104 .intr_detection_bit = -1, \ 105 .intr_detection_width = -1, \ 106 } 107 108 static const struct pinctrl_pin_desc eliza_pins[] = { 109 PINCTRL_PIN(0, "GPIO_0"), 110 PINCTRL_PIN(1, "GPIO_1"), 111 PINCTRL_PIN(2, "GPIO_2"), 112 PINCTRL_PIN(3, "GPIO_3"), 113 PINCTRL_PIN(4, "GPIO_4"), 114 PINCTRL_PIN(5, "GPIO_5"), 115 PINCTRL_PIN(6, "GPIO_6"), 116 PINCTRL_PIN(7, "GPIO_7"), 117 PINCTRL_PIN(8, "GPIO_8"), 118 PINCTRL_PIN(9, "GPIO_9"), 119 PINCTRL_PIN(10, "GPIO_10"), 120 PINCTRL_PIN(11, "GPIO_11"), 121 PINCTRL_PIN(12, "GPIO_12"), 122 PINCTRL_PIN(13, "GPIO_13"), 123 PINCTRL_PIN(14, "GPIO_14"), 124 PINCTRL_PIN(15, "GPIO_15"), 125 PINCTRL_PIN(16, "GPIO_16"), 126 PINCTRL_PIN(17, "GPIO_17"), 127 PINCTRL_PIN(18, "GPIO_18"), 128 PINCTRL_PIN(19, "GPIO_19"), 129 PINCTRL_PIN(20, "GPIO_20"), 130 PINCTRL_PIN(21, "GPIO_21"), 131 PINCTRL_PIN(22, "GPIO_22"), 132 PINCTRL_PIN(23, "GPIO_23"), 133 PINCTRL_PIN(24, "GPIO_24"), 134 PINCTRL_PIN(25, "GPIO_25"), 135 PINCTRL_PIN(26, "GPIO_26"), 136 PINCTRL_PIN(27, "GPIO_27"), 137 PINCTRL_PIN(28, "GPIO_28"), 138 PINCTRL_PIN(29, "GPIO_29"), 139 PINCTRL_PIN(30, "GPIO_30"), 140 PINCTRL_PIN(31, "GPIO_31"), 141 PINCTRL_PIN(32, "GPIO_32"), 142 PINCTRL_PIN(33, "GPIO_33"), 143 PINCTRL_PIN(34, "GPIO_34"), 144 PINCTRL_PIN(35, "GPIO_35"), 145 PINCTRL_PIN(36, "GPIO_36"), 146 PINCTRL_PIN(37, "GPIO_37"), 147 PINCTRL_PIN(38, "GPIO_38"), 148 PINCTRL_PIN(39, "GPIO_39"), 149 PINCTRL_PIN(40, "GPIO_40"), 150 PINCTRL_PIN(41, "GPIO_41"), 151 PINCTRL_PIN(42, "GPIO_42"), 152 PINCTRL_PIN(43, "GPIO_43"), 153 PINCTRL_PIN(44, "GPIO_44"), 154 PINCTRL_PIN(45, "GPIO_45"), 155 PINCTRL_PIN(46, "GPIO_46"), 156 PINCTRL_PIN(47, "GPIO_47"), 157 PINCTRL_PIN(48, "GPIO_48"), 158 PINCTRL_PIN(49, "GPIO_49"), 159 PINCTRL_PIN(50, "GPIO_50"), 160 PINCTRL_PIN(51, "GPIO_51"), 161 PINCTRL_PIN(52, "GPIO_52"), 162 PINCTRL_PIN(53, "GPIO_53"), 163 PINCTRL_PIN(54, "GPIO_54"), 164 PINCTRL_PIN(55, "GPIO_55"), 165 PINCTRL_PIN(56, "GPIO_56"), 166 PINCTRL_PIN(57, "GPIO_57"), 167 PINCTRL_PIN(58, "GPIO_58"), 168 PINCTRL_PIN(59, "GPIO_59"), 169 PINCTRL_PIN(60, "GPIO_60"), 170 PINCTRL_PIN(61, "GPIO_61"), 171 PINCTRL_PIN(62, "GPIO_62"), 172 PINCTRL_PIN(63, "GPIO_63"), 173 PINCTRL_PIN(64, "GPIO_64"), 174 PINCTRL_PIN(65, "GPIO_65"), 175 PINCTRL_PIN(66, "GPIO_66"), 176 PINCTRL_PIN(67, "GPIO_67"), 177 PINCTRL_PIN(68, "GPIO_68"), 178 PINCTRL_PIN(69, "GPIO_69"), 179 PINCTRL_PIN(70, "GPIO_70"), 180 PINCTRL_PIN(71, "GPIO_71"), 181 PINCTRL_PIN(72, "GPIO_72"), 182 PINCTRL_PIN(73, "GPIO_73"), 183 PINCTRL_PIN(74, "GPIO_74"), 184 PINCTRL_PIN(75, "GPIO_75"), 185 PINCTRL_PIN(76, "GPIO_76"), 186 PINCTRL_PIN(77, "GPIO_77"), 187 PINCTRL_PIN(78, "GPIO_78"), 188 PINCTRL_PIN(79, "GPIO_79"), 189 PINCTRL_PIN(80, "GPIO_80"), 190 PINCTRL_PIN(81, "GPIO_81"), 191 PINCTRL_PIN(82, "GPIO_82"), 192 PINCTRL_PIN(83, "GPIO_83"), 193 PINCTRL_PIN(84, "GPIO_84"), 194 PINCTRL_PIN(85, "GPIO_85"), 195 PINCTRL_PIN(86, "GPIO_86"), 196 PINCTRL_PIN(87, "GPIO_87"), 197 PINCTRL_PIN(88, "GPIO_88"), 198 PINCTRL_PIN(89, "GPIO_89"), 199 PINCTRL_PIN(90, "GPIO_90"), 200 PINCTRL_PIN(91, "GPIO_91"), 201 PINCTRL_PIN(92, "GPIO_92"), 202 PINCTRL_PIN(93, "GPIO_93"), 203 PINCTRL_PIN(94, "GPIO_94"), 204 PINCTRL_PIN(95, "GPIO_95"), 205 PINCTRL_PIN(96, "GPIO_96"), 206 PINCTRL_PIN(97, "GPIO_97"), 207 PINCTRL_PIN(98, "GPIO_98"), 208 PINCTRL_PIN(99, "GPIO_99"), 209 PINCTRL_PIN(100, "GPIO_100"), 210 PINCTRL_PIN(101, "GPIO_101"), 211 PINCTRL_PIN(102, "GPIO_102"), 212 PINCTRL_PIN(103, "GPIO_103"), 213 PINCTRL_PIN(104, "GPIO_104"), 214 PINCTRL_PIN(105, "GPIO_105"), 215 PINCTRL_PIN(106, "GPIO_106"), 216 PINCTRL_PIN(107, "GPIO_107"), 217 PINCTRL_PIN(108, "GPIO_108"), 218 PINCTRL_PIN(109, "GPIO_109"), 219 PINCTRL_PIN(110, "GPIO_110"), 220 PINCTRL_PIN(111, "GPIO_111"), 221 PINCTRL_PIN(112, "GPIO_112"), 222 PINCTRL_PIN(113, "GPIO_113"), 223 PINCTRL_PIN(114, "GPIO_114"), 224 PINCTRL_PIN(115, "GPIO_115"), 225 PINCTRL_PIN(116, "GPIO_116"), 226 PINCTRL_PIN(117, "GPIO_117"), 227 PINCTRL_PIN(118, "GPIO_118"), 228 PINCTRL_PIN(119, "GPIO_119"), 229 PINCTRL_PIN(120, "GPIO_120"), 230 PINCTRL_PIN(121, "GPIO_121"), 231 PINCTRL_PIN(122, "GPIO_122"), 232 PINCTRL_PIN(123, "GPIO_123"), 233 PINCTRL_PIN(124, "GPIO_124"), 234 PINCTRL_PIN(125, "GPIO_125"), 235 PINCTRL_PIN(126, "GPIO_126"), 236 PINCTRL_PIN(127, "GPIO_127"), 237 PINCTRL_PIN(128, "GPIO_128"), 238 PINCTRL_PIN(129, "GPIO_129"), 239 PINCTRL_PIN(130, "GPIO_130"), 240 PINCTRL_PIN(131, "GPIO_131"), 241 PINCTRL_PIN(132, "GPIO_132"), 242 PINCTRL_PIN(133, "GPIO_133"), 243 PINCTRL_PIN(134, "GPIO_134"), 244 PINCTRL_PIN(135, "GPIO_135"), 245 PINCTRL_PIN(136, "GPIO_136"), 246 PINCTRL_PIN(137, "GPIO_137"), 247 PINCTRL_PIN(138, "GPIO_138"), 248 PINCTRL_PIN(139, "GPIO_139"), 249 PINCTRL_PIN(140, "GPIO_140"), 250 PINCTRL_PIN(141, "GPIO_141"), 251 PINCTRL_PIN(142, "GPIO_142"), 252 PINCTRL_PIN(143, "GPIO_143"), 253 PINCTRL_PIN(144, "GPIO_144"), 254 PINCTRL_PIN(145, "GPIO_145"), 255 PINCTRL_PIN(146, "GPIO_146"), 256 PINCTRL_PIN(147, "GPIO_147"), 257 PINCTRL_PIN(148, "GPIO_148"), 258 PINCTRL_PIN(149, "GPIO_149"), 259 PINCTRL_PIN(150, "GPIO_150"), 260 PINCTRL_PIN(151, "GPIO_151"), 261 PINCTRL_PIN(152, "GPIO_152"), 262 PINCTRL_PIN(153, "GPIO_153"), 263 PINCTRL_PIN(154, "GPIO_154"), 264 PINCTRL_PIN(155, "GPIO_155"), 265 PINCTRL_PIN(156, "GPIO_156"), 266 PINCTRL_PIN(157, "GPIO_157"), 267 PINCTRL_PIN(158, "GPIO_158"), 268 PINCTRL_PIN(159, "GPIO_159"), 269 PINCTRL_PIN(160, "GPIO_160"), 270 PINCTRL_PIN(161, "GPIO_161"), 271 PINCTRL_PIN(162, "GPIO_162"), 272 PINCTRL_PIN(163, "GPIO_163"), 273 PINCTRL_PIN(164, "GPIO_164"), 274 PINCTRL_PIN(165, "GPIO_165"), 275 PINCTRL_PIN(166, "GPIO_166"), 276 PINCTRL_PIN(167, "GPIO_167"), 277 PINCTRL_PIN(168, "GPIO_168"), 278 PINCTRL_PIN(169, "GPIO_169"), 279 PINCTRL_PIN(170, "GPIO_170"), 280 PINCTRL_PIN(171, "GPIO_171"), 281 PINCTRL_PIN(172, "GPIO_172"), 282 PINCTRL_PIN(173, "GPIO_173"), 283 PINCTRL_PIN(174, "GPIO_174"), 284 PINCTRL_PIN(175, "GPIO_175"), 285 PINCTRL_PIN(176, "GPIO_176"), 286 PINCTRL_PIN(177, "GPIO_177"), 287 PINCTRL_PIN(178, "GPIO_178"), 288 PINCTRL_PIN(179, "GPIO_179"), 289 PINCTRL_PIN(180, "GPIO_180"), 290 PINCTRL_PIN(181, "GPIO_181"), 291 PINCTRL_PIN(182, "GPIO_182"), 292 PINCTRL_PIN(183, "GPIO_183"), 293 PINCTRL_PIN(184, "GPIO_184"), 294 PINCTRL_PIN(185, "UFS_RESET"), 295 }; 296 297 #define DECLARE_MSM_GPIO_PINS(pin) \ 298 static const unsigned int gpio##pin##_pins[] = { pin } 299 DECLARE_MSM_GPIO_PINS(0); 300 DECLARE_MSM_GPIO_PINS(1); 301 DECLARE_MSM_GPIO_PINS(2); 302 DECLARE_MSM_GPIO_PINS(3); 303 DECLARE_MSM_GPIO_PINS(4); 304 DECLARE_MSM_GPIO_PINS(5); 305 DECLARE_MSM_GPIO_PINS(6); 306 DECLARE_MSM_GPIO_PINS(7); 307 DECLARE_MSM_GPIO_PINS(8); 308 DECLARE_MSM_GPIO_PINS(9); 309 DECLARE_MSM_GPIO_PINS(10); 310 DECLARE_MSM_GPIO_PINS(11); 311 DECLARE_MSM_GPIO_PINS(12); 312 DECLARE_MSM_GPIO_PINS(13); 313 DECLARE_MSM_GPIO_PINS(14); 314 DECLARE_MSM_GPIO_PINS(15); 315 DECLARE_MSM_GPIO_PINS(16); 316 DECLARE_MSM_GPIO_PINS(17); 317 DECLARE_MSM_GPIO_PINS(18); 318 DECLARE_MSM_GPIO_PINS(19); 319 DECLARE_MSM_GPIO_PINS(20); 320 DECLARE_MSM_GPIO_PINS(21); 321 DECLARE_MSM_GPIO_PINS(22); 322 DECLARE_MSM_GPIO_PINS(23); 323 DECLARE_MSM_GPIO_PINS(24); 324 DECLARE_MSM_GPIO_PINS(25); 325 DECLARE_MSM_GPIO_PINS(26); 326 DECLARE_MSM_GPIO_PINS(27); 327 DECLARE_MSM_GPIO_PINS(28); 328 DECLARE_MSM_GPIO_PINS(29); 329 DECLARE_MSM_GPIO_PINS(30); 330 DECLARE_MSM_GPIO_PINS(31); 331 DECLARE_MSM_GPIO_PINS(32); 332 DECLARE_MSM_GPIO_PINS(33); 333 DECLARE_MSM_GPIO_PINS(34); 334 DECLARE_MSM_GPIO_PINS(35); 335 DECLARE_MSM_GPIO_PINS(36); 336 DECLARE_MSM_GPIO_PINS(37); 337 DECLARE_MSM_GPIO_PINS(38); 338 DECLARE_MSM_GPIO_PINS(39); 339 DECLARE_MSM_GPIO_PINS(40); 340 DECLARE_MSM_GPIO_PINS(41); 341 DECLARE_MSM_GPIO_PINS(42); 342 DECLARE_MSM_GPIO_PINS(43); 343 DECLARE_MSM_GPIO_PINS(44); 344 DECLARE_MSM_GPIO_PINS(45); 345 DECLARE_MSM_GPIO_PINS(46); 346 DECLARE_MSM_GPIO_PINS(47); 347 DECLARE_MSM_GPIO_PINS(48); 348 DECLARE_MSM_GPIO_PINS(49); 349 DECLARE_MSM_GPIO_PINS(50); 350 DECLARE_MSM_GPIO_PINS(51); 351 DECLARE_MSM_GPIO_PINS(52); 352 DECLARE_MSM_GPIO_PINS(53); 353 DECLARE_MSM_GPIO_PINS(54); 354 DECLARE_MSM_GPIO_PINS(55); 355 DECLARE_MSM_GPIO_PINS(56); 356 DECLARE_MSM_GPIO_PINS(57); 357 DECLARE_MSM_GPIO_PINS(58); 358 DECLARE_MSM_GPIO_PINS(59); 359 DECLARE_MSM_GPIO_PINS(60); 360 DECLARE_MSM_GPIO_PINS(61); 361 DECLARE_MSM_GPIO_PINS(62); 362 DECLARE_MSM_GPIO_PINS(63); 363 DECLARE_MSM_GPIO_PINS(64); 364 DECLARE_MSM_GPIO_PINS(65); 365 DECLARE_MSM_GPIO_PINS(66); 366 DECLARE_MSM_GPIO_PINS(67); 367 DECLARE_MSM_GPIO_PINS(68); 368 DECLARE_MSM_GPIO_PINS(69); 369 DECLARE_MSM_GPIO_PINS(70); 370 DECLARE_MSM_GPIO_PINS(71); 371 DECLARE_MSM_GPIO_PINS(72); 372 DECLARE_MSM_GPIO_PINS(73); 373 DECLARE_MSM_GPIO_PINS(74); 374 DECLARE_MSM_GPIO_PINS(75); 375 DECLARE_MSM_GPIO_PINS(76); 376 DECLARE_MSM_GPIO_PINS(77); 377 DECLARE_MSM_GPIO_PINS(78); 378 DECLARE_MSM_GPIO_PINS(79); 379 DECLARE_MSM_GPIO_PINS(80); 380 DECLARE_MSM_GPIO_PINS(81); 381 DECLARE_MSM_GPIO_PINS(82); 382 DECLARE_MSM_GPIO_PINS(83); 383 DECLARE_MSM_GPIO_PINS(84); 384 DECLARE_MSM_GPIO_PINS(85); 385 DECLARE_MSM_GPIO_PINS(86); 386 DECLARE_MSM_GPIO_PINS(87); 387 DECLARE_MSM_GPIO_PINS(88); 388 DECLARE_MSM_GPIO_PINS(89); 389 DECLARE_MSM_GPIO_PINS(90); 390 DECLARE_MSM_GPIO_PINS(91); 391 DECLARE_MSM_GPIO_PINS(92); 392 DECLARE_MSM_GPIO_PINS(93); 393 DECLARE_MSM_GPIO_PINS(94); 394 DECLARE_MSM_GPIO_PINS(95); 395 DECLARE_MSM_GPIO_PINS(96); 396 DECLARE_MSM_GPIO_PINS(97); 397 DECLARE_MSM_GPIO_PINS(98); 398 DECLARE_MSM_GPIO_PINS(99); 399 DECLARE_MSM_GPIO_PINS(100); 400 DECLARE_MSM_GPIO_PINS(101); 401 DECLARE_MSM_GPIO_PINS(102); 402 DECLARE_MSM_GPIO_PINS(103); 403 DECLARE_MSM_GPIO_PINS(104); 404 DECLARE_MSM_GPIO_PINS(105); 405 DECLARE_MSM_GPIO_PINS(106); 406 DECLARE_MSM_GPIO_PINS(107); 407 DECLARE_MSM_GPIO_PINS(108); 408 DECLARE_MSM_GPIO_PINS(109); 409 DECLARE_MSM_GPIO_PINS(110); 410 DECLARE_MSM_GPIO_PINS(111); 411 DECLARE_MSM_GPIO_PINS(112); 412 DECLARE_MSM_GPIO_PINS(113); 413 DECLARE_MSM_GPIO_PINS(114); 414 DECLARE_MSM_GPIO_PINS(115); 415 DECLARE_MSM_GPIO_PINS(116); 416 DECLARE_MSM_GPIO_PINS(117); 417 DECLARE_MSM_GPIO_PINS(118); 418 DECLARE_MSM_GPIO_PINS(119); 419 DECLARE_MSM_GPIO_PINS(120); 420 DECLARE_MSM_GPIO_PINS(121); 421 DECLARE_MSM_GPIO_PINS(122); 422 DECLARE_MSM_GPIO_PINS(123); 423 DECLARE_MSM_GPIO_PINS(124); 424 DECLARE_MSM_GPIO_PINS(125); 425 DECLARE_MSM_GPIO_PINS(126); 426 DECLARE_MSM_GPIO_PINS(127); 427 DECLARE_MSM_GPIO_PINS(128); 428 DECLARE_MSM_GPIO_PINS(129); 429 DECLARE_MSM_GPIO_PINS(130); 430 DECLARE_MSM_GPIO_PINS(131); 431 DECLARE_MSM_GPIO_PINS(132); 432 DECLARE_MSM_GPIO_PINS(133); 433 DECLARE_MSM_GPIO_PINS(134); 434 DECLARE_MSM_GPIO_PINS(135); 435 DECLARE_MSM_GPIO_PINS(136); 436 DECLARE_MSM_GPIO_PINS(137); 437 DECLARE_MSM_GPIO_PINS(138); 438 DECLARE_MSM_GPIO_PINS(139); 439 DECLARE_MSM_GPIO_PINS(140); 440 DECLARE_MSM_GPIO_PINS(141); 441 DECLARE_MSM_GPIO_PINS(142); 442 DECLARE_MSM_GPIO_PINS(143); 443 DECLARE_MSM_GPIO_PINS(144); 444 DECLARE_MSM_GPIO_PINS(145); 445 DECLARE_MSM_GPIO_PINS(146); 446 DECLARE_MSM_GPIO_PINS(147); 447 DECLARE_MSM_GPIO_PINS(148); 448 DECLARE_MSM_GPIO_PINS(149); 449 DECLARE_MSM_GPIO_PINS(150); 450 DECLARE_MSM_GPIO_PINS(151); 451 DECLARE_MSM_GPIO_PINS(152); 452 DECLARE_MSM_GPIO_PINS(153); 453 DECLARE_MSM_GPIO_PINS(154); 454 DECLARE_MSM_GPIO_PINS(155); 455 DECLARE_MSM_GPIO_PINS(156); 456 DECLARE_MSM_GPIO_PINS(157); 457 DECLARE_MSM_GPIO_PINS(158); 458 DECLARE_MSM_GPIO_PINS(159); 459 DECLARE_MSM_GPIO_PINS(160); 460 DECLARE_MSM_GPIO_PINS(161); 461 DECLARE_MSM_GPIO_PINS(162); 462 DECLARE_MSM_GPIO_PINS(163); 463 DECLARE_MSM_GPIO_PINS(164); 464 DECLARE_MSM_GPIO_PINS(165); 465 DECLARE_MSM_GPIO_PINS(166); 466 DECLARE_MSM_GPIO_PINS(167); 467 DECLARE_MSM_GPIO_PINS(168); 468 DECLARE_MSM_GPIO_PINS(169); 469 DECLARE_MSM_GPIO_PINS(170); 470 DECLARE_MSM_GPIO_PINS(171); 471 DECLARE_MSM_GPIO_PINS(172); 472 DECLARE_MSM_GPIO_PINS(173); 473 DECLARE_MSM_GPIO_PINS(174); 474 DECLARE_MSM_GPIO_PINS(175); 475 DECLARE_MSM_GPIO_PINS(176); 476 DECLARE_MSM_GPIO_PINS(177); 477 DECLARE_MSM_GPIO_PINS(178); 478 DECLARE_MSM_GPIO_PINS(179); 479 DECLARE_MSM_GPIO_PINS(180); 480 DECLARE_MSM_GPIO_PINS(181); 481 DECLARE_MSM_GPIO_PINS(182); 482 DECLARE_MSM_GPIO_PINS(183); 483 DECLARE_MSM_GPIO_PINS(184); 484 485 static const unsigned int ufs_reset_pins[] = { 185 }; 486 487 enum eliza_functions { 488 msm_mux_gpio, 489 msm_mux_aoss_cti, 490 msm_mux_atest_char, 491 msm_mux_atest_usb, 492 msm_mux_audio_ext_mclk0, 493 msm_mux_audio_ref_clk, 494 msm_mux_cam_mclk, 495 msm_mux_cci_async_in, 496 msm_mux_cci_i2c_scl, 497 msm_mux_cci_i2c_sda, 498 msm_mux_cci_timer, 499 msm_mux_coex_uart1_rx, 500 msm_mux_coex_uart1_tx, 501 msm_mux_coex_uart2_rx, 502 msm_mux_coex_uart2_tx, 503 msm_mux_dbg_out_clk, 504 msm_mux_ddr_bist_complete, 505 msm_mux_ddr_bist_fail, 506 msm_mux_ddr_bist_start, 507 msm_mux_ddr_bist_stop, 508 msm_mux_ddr_pxi0, 509 msm_mux_ddr_pxi1, 510 msm_mux_dp0_hot, 511 msm_mux_egpio, 512 msm_mux_gcc_gp1, 513 msm_mux_gcc_gp2, 514 msm_mux_gcc_gp3, 515 msm_mux_gnss_adc0, 516 msm_mux_gnss_adc1, 517 msm_mux_hdmi_ddc_scl, 518 msm_mux_hdmi_ddc_sda, 519 msm_mux_hdmi_dtest0, 520 msm_mux_hdmi_dtest1, 521 msm_mux_hdmi_hot_plug, 522 msm_mux_hdmi_pixel_clk, 523 msm_mux_hdmi_rcv_det, 524 msm_mux_hdmi_tx_cec, 525 msm_mux_host2wlan_sol, 526 msm_mux_i2s0_data0, 527 msm_mux_i2s0_data1, 528 msm_mux_i2s0_sck, 529 msm_mux_i2s0_ws, 530 msm_mux_ibi_i3c, 531 msm_mux_jitter_bist, 532 msm_mux_mdp_esync0_out, 533 msm_mux_mdp_esync1_out, 534 msm_mux_mdp_vsync, 535 msm_mux_mdp_vsync0_out, 536 msm_mux_mdp_vsync11_out, 537 msm_mux_mdp_vsync1_out, 538 msm_mux_mdp_vsync2_out, 539 msm_mux_mdp_vsync3_out, 540 msm_mux_mdp_vsync_e, 541 msm_mux_nav_gpio0, 542 msm_mux_nav_gpio1, 543 msm_mux_nav_gpio2, 544 msm_mux_nav_gpio3, 545 msm_mux_pcie0_clk_req_n, 546 msm_mux_pcie1_clk_req_n, 547 msm_mux_phase_flag, 548 msm_mux_pll_bist_sync, 549 msm_mux_pll_clk_aux, 550 msm_mux_prng_rosc0, 551 msm_mux_prng_rosc1, 552 msm_mux_prng_rosc2, 553 msm_mux_prng_rosc3, 554 msm_mux_qdss_cti, 555 msm_mux_qdss_gpio_traceclk, 556 msm_mux_qdss_gpio_tracectl, 557 msm_mux_qdss_gpio_tracedata, 558 msm_mux_qlink_big_enable, 559 msm_mux_qlink_big_request, 560 msm_mux_qlink_little_enable, 561 msm_mux_qlink_little_request, 562 msm_mux_qlink_wmss, 563 msm_mux_qspi0, 564 msm_mux_qspi_clk, 565 msm_mux_qspi_cs, 566 msm_mux_qup1_se0, 567 msm_mux_qup1_se1, 568 msm_mux_qup1_se2, 569 msm_mux_qup1_se3, 570 msm_mux_qup1_se4, 571 msm_mux_qup1_se5, 572 msm_mux_qup1_se6, 573 msm_mux_qup1_se7, 574 msm_mux_qup2_se0, 575 msm_mux_qup2_se1, 576 msm_mux_qup2_se2, 577 msm_mux_qup2_se3, 578 msm_mux_qup2_se4, 579 msm_mux_qup2_se5, 580 msm_mux_qup2_se6, 581 msm_mux_qup2_se7, 582 msm_mux_resout_gpio, 583 msm_mux_sd_write_protect, 584 msm_mux_sdc1, 585 msm_mux_sdc2, 586 msm_mux_sdc2_fb_clk, 587 msm_mux_tb_trig_sdc1, 588 msm_mux_tb_trig_sdc2, 589 msm_mux_tmess_prng0, 590 msm_mux_tmess_prng1, 591 msm_mux_tmess_prng2, 592 msm_mux_tmess_prng3, 593 msm_mux_tsense_pwm1, 594 msm_mux_tsense_pwm2, 595 msm_mux_tsense_pwm3, 596 msm_mux_tsense_pwm4, 597 msm_mux_uim0_clk, 598 msm_mux_uim0_data, 599 msm_mux_uim0_present, 600 msm_mux_uim0_reset, 601 msm_mux_uim1_clk, 602 msm_mux_uim1_data, 603 msm_mux_uim1_present, 604 msm_mux_uim1_reset, 605 msm_mux_usb0_hs, 606 msm_mux_usb_phy, 607 msm_mux_vfr_0, 608 msm_mux_vfr_1, 609 msm_mux_vsense_trigger_mirnat, 610 msm_mux_wcn_sw_ctrl, 611 msm_mux__, 612 }; 613 614 static const char *const gpio_groups[] = { 615 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 616 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", 617 "gpio12", "gpio13", "gpio16", "gpio17", "gpio18", "gpio19", 618 "gpio20", "gpio21", "gpio22", "gpio23", "gpio26", "gpio27", 619 "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", 620 "gpio34", "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", 621 "gpio40", "gpio42", "gpio44", "gpio45", "gpio46", "gpio47", 622 "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", 623 "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", "gpio59", 624 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", 625 "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", 626 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 627 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio84", 628 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", 629 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", 630 "gpio97", "gpio98", "gpio99", "gpio100", "gpio101", "gpio102", 631 "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", 632 "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", 633 "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", 634 "gpio121", "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", 635 "gpio127", "gpio128", "gpio129", "gpio130", "gpio131", "gpio132", 636 "gpio133", "gpio134", "gpio135", "gpio138", "gpio139", "gpio140", 637 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146", 638 "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", 639 "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158", 640 "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164", 641 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170", 642 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176", 643 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182", 644 "gpio184", 645 }; 646 647 static const char *const aoss_cti_groups[] = { 648 "gpio0", "gpio1", "gpio26", "gpio27", 649 }; 650 651 static const char *const atest_char_groups[] = { 652 "gpio71", "gpio70", "gpio72", "gpio74", "gpio73", 653 }; 654 655 static const char *const atest_usb_groups[] = { 656 "gpio55", "gpio54", 657 }; 658 659 static const char *const audio_ext_mclk0_groups[] = { 660 "gpio69", 661 }; 662 663 static const char *const audio_ref_clk_groups[] = { 664 "gpio32", 665 }; 666 667 static const char *const cam_mclk_groups[] = { 668 "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", 669 }; 670 671 static const char *const cci_async_in_groups[] = { 672 "gpio115", "gpio31", "gpio30", 673 }; 674 675 static const char *const cci_i2c_scl_groups[] = { 676 "gpio71", "gpio73", "gpio75", "gpio77", 677 }; 678 679 static const char *const cci_i2c_sda_groups[] = { 680 "gpio70", "gpio72", "gpio74", "gpio76", 681 }; 682 683 static const char *const cci_timer_groups[] = { 684 "gpio76", "gpio63", "gpio125", "gpio126", "gpio127", 685 }; 686 687 static const char *const coex_uart1_rx_groups[] = { 688 "gpio112", 689 }; 690 691 static const char *const coex_uart1_tx_groups[] = { 692 "gpio111", 693 }; 694 695 static const char *const coex_uart2_rx_groups[] = { 696 "gpio116", 697 }; 698 699 static const char *const coex_uart2_tx_groups[] = { 700 "gpio100", 701 }; 702 703 static const char *const dbg_out_clk_groups[] = { 704 "gpio81", 705 }; 706 707 static const char *const ddr_bist_complete_groups[] = { 708 "gpio52", 709 }; 710 711 static const char *const ddr_bist_fail_groups[] = { 712 "gpio147", 713 }; 714 715 static const char *const ddr_bist_start_groups[] = { 716 "gpio34", 717 }; 718 719 static const char *const ddr_bist_stop_groups[] = { 720 "gpio53", 721 }; 722 723 static const char *const ddr_pxi0_groups[] = { 724 "gpio54", "gpio55", 725 }; 726 727 static const char *const ddr_pxi1_groups[] = { 728 "gpio40", "gpio42", 729 }; 730 731 static const char *const dp0_hot_groups[] = { 732 "gpio55", 733 }; 734 735 static const char *const egpio_groups[] = { 736 "gpio28", "gpio29", "gpio30", "gpio31", "gpio138", "gpio139", 737 "gpio140", "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", 738 "gpio146", "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", 739 "gpio152", "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", 740 "gpio158", "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", 741 "gpio164", "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", 742 "gpio170", "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", 743 "gpio176", "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", 744 "gpio182", "gpio184", 745 }; 746 747 static const char *const gcc_gp1_groups[] = { 748 "gpio27", "gpio53", 749 }; 750 751 static const char *const gcc_gp2_groups[] = { 752 "gpio32", "gpio35", 753 }; 754 755 static const char *const gcc_gp3_groups[] = { 756 "gpio30", "gpio33", 757 }; 758 759 static const char *const gnss_adc0_groups[] = { 760 "gpio42", "gpio55", 761 }; 762 763 static const char *const gnss_adc1_groups[] = { 764 "gpio40", "gpio54", 765 }; 766 767 static const char *const hdmi_ddc_scl_groups[] = { 768 "gpio6", 769 }; 770 771 static const char *const hdmi_ddc_sda_groups[] = { 772 "gpio7", 773 }; 774 775 static const char *const hdmi_dtest0_groups[] = { 776 "gpio132", 777 }; 778 779 static const char *const hdmi_dtest1_groups[] = { 780 "gpio133", 781 }; 782 783 static const char *const hdmi_hot_plug_groups[] = { 784 "gpio47", 785 }; 786 787 static const char *const hdmi_pixel_clk_groups[] = { 788 "gpio18", 789 }; 790 791 static const char *const hdmi_rcv_det_groups[] = { 792 "gpio19", 793 }; 794 795 static const char *const hdmi_tx_cec_groups[] = { 796 "gpio46", 797 }; 798 799 static const char *const host2wlan_sol_groups[] = { 800 "gpio33", 801 }; 802 803 static const char *const i2s0_data0_groups[] = { 804 "gpio64", 805 }; 806 807 static const char *const i2s0_data1_groups[] = { 808 "gpio63", 809 }; 810 811 static const char *const i2s0_sck_groups[] = { 812 "gpio60", 813 }; 814 815 static const char *const i2s0_ws_groups[] = { 816 "gpio61", 817 }; 818 819 static const char *const ibi_i3c_groups[] = { 820 "gpio0", "gpio1", "gpio4", "gpio5", "gpio12", "gpio13", 821 "gpio28", "gpio29", "gpio32", "gpio33", "gpio36", "gpio37", 822 }; 823 824 static const char *const jitter_bist_groups[] = { 825 "gpio77", 826 }; 827 828 static const char *const mdp_esync0_out_groups[] = { 829 "gpio13", 830 }; 831 832 static const char *const mdp_esync1_out_groups[] = { 833 "gpio12", 834 }; 835 836 static const char *const mdp_vsync_groups[] = { 837 "gpio16", "gpio17", "gpio79", "gpio100", "gpio120", "gpio121", 838 }; 839 840 static const char *const mdp_vsync0_out_groups[] = { 841 "gpio17", 842 }; 843 844 static const char *const mdp_vsync11_out_groups[] = { 845 "gpio27", 846 }; 847 848 static const char *const mdp_vsync1_out_groups[] = { 849 "gpio17", 850 }; 851 852 static const char *const mdp_vsync2_out_groups[] = { 853 "gpio16", 854 }; 855 856 static const char *const mdp_vsync3_out_groups[] = { 857 "gpio16", 858 }; 859 860 static const char *const mdp_vsync_e_groups[] = { 861 "gpio13", 862 }; 863 864 static const char *const nav_gpio0_groups[] = { 865 "gpio119", 866 }; 867 868 static const char *const nav_gpio1_groups[] = { 869 "gpio117", 870 }; 871 872 static const char *const nav_gpio2_groups[] = { 873 "gpio118", 874 }; 875 876 static const char *const nav_gpio3_groups[] = { 877 "gpio113", 878 }; 879 880 static const char *const pcie0_clk_req_n_groups[] = { 881 "gpio80", 882 }; 883 884 static const char *const pcie1_clk_req_n_groups[] = { 885 "gpio52", 886 }; 887 888 static const char *const phase_flag_groups[] = { 889 "gpio71", "gpio70", "gpio174", "gpio175", "gpio172", "gpio171", 890 "gpio170", "gpio169", "gpio168", "gpio167", "gpio166", "gpio165", 891 "gpio182", "gpio164", "gpio163", "gpio162", "gpio161", "gpio160", 892 "gpio159", "gpio158", "gpio157", "gpio80", "gpio78", "gpio181", 893 "gpio76", "gpio75", "gpio180", "gpio179", "gpio178", "gpio177", 894 "gpio176", "gpio173", 895 }; 896 897 static const char *const pll_bist_sync_groups[] = { 898 "gpio184", 899 }; 900 901 static const char *const pll_clk_aux_groups[] = { 902 "gpio135", 903 }; 904 905 static const char *const prng_rosc0_groups[] = { 906 "gpio67", 907 }; 908 909 static const char *const prng_rosc1_groups[] = { 910 "gpio69", 911 }; 912 913 static const char *const prng_rosc2_groups[] = { 914 "gpio76", 915 }; 916 917 static const char *const prng_rosc3_groups[] = { 918 "gpio74", 919 }; 920 921 static const char *const qdss_cti_groups[] = { 922 "gpio18", "gpio19", "gpio32", "gpio73", 923 "gpio74", "gpio154", "gpio176", "gpio184", 924 }; 925 926 static const char *const qdss_gpio_traceclk_groups[] = { 927 "gpio54", "gpio147", 928 }; 929 930 static const char *const qdss_gpio_tracectl_groups[] = { 931 "gpio72", "gpio144", 932 }; 933 934 static const char *const qdss_gpio_tracedata_groups[] = { 935 "gpio30", "gpio31", "gpio34", "gpio35", "gpio40", "gpio42", 936 "gpio52", "gpio53", "gpio65", "gpio66", "gpio67", "gpio114", 937 "gpio132", "gpio133", "gpio134", "gpio135", "gpio145", "gpio146", 938 "gpio155", "gpio156", "gpio163", "gpio164", "gpio167", "gpio168", 939 "gpio169", "gpio170", "gpio178", "gpio179", "gpio180", "gpio181", 940 "gpio182", 941 }; 942 943 static const char *const qlink_big_enable_groups[] = { 944 "gpio96", 945 }; 946 947 static const char *const qlink_big_request_groups[] = { 948 "gpio95", 949 }; 950 951 static const char *const qlink_little_enable_groups[] = { 952 "gpio93", 953 }; 954 955 static const char *const qlink_little_request_groups[] = { 956 "gpio92", 957 }; 958 959 static const char *const qlink_wmss_groups[] = { 960 "gpio94", 961 }; 962 963 static const char *const qspi0_groups[] = { 964 "gpio79", "gpio116", "gpio115", "gpio97", "gpio98", 965 }; 966 967 static const char *const qspi_clk_groups[] = { 968 "gpio99", 969 }; 970 971 static const char *const qspi_cs_groups[] = { 972 "gpio100", 973 }; 974 975 static const char *const qup1_se0_groups[] = { 976 "gpio28", "gpio29", "gpio30", "gpio31", 977 }; 978 979 static const char *const qup1_se1_groups[] = { 980 "gpio32", "gpio33", "gpio34", "gpio35", 981 }; 982 983 static const char *const qup1_se2_groups[] = { 984 "gpio52", "gpio53", "gpio54", "gpio52", "gpio55", "gpio53", "gpio40", "gpio42", "gpio30", 985 }; 986 987 static const char *const qup1_se3_groups[] = { 988 "gpio44", "gpio45", "gpio46", "gpio47", 989 }; 990 991 static const char *const qup1_se4_groups[] = { 992 "gpio36", "gpio37", "gpio37", "gpio36", 993 }; 994 995 static const char *const qup1_se5_groups[] = { 996 "gpio132", "gpio133", "gpio134", "gpio135", "gpio34", "gpio35", 997 }; 998 999 static const char *const qup1_se6_groups[] = { 1000 "gpio40", "gpio42", "gpio54", "gpio42", "gpio40", "gpio55", 1001 }; 1002 1003 static const char *const qup1_se7_groups[] = { 1004 "gpio81", "gpio78", "gpio80", "gpio114", "gpio114", "gpio78", 1005 }; 1006 1007 static const char *const qup2_se0_groups[] = { 1008 "gpio0", "gpio1", "gpio2", "gpio3", 1009 }; 1010 1011 static const char *const qup2_se1_groups[] = { 1012 "gpio4", "gpio5", "gpio6", "gpio7", 1013 }; 1014 1015 static const char *const qup2_se2_groups[] = { 1016 "gpio8", "gpio9", "gpio10", "gpio11", "gpio16", "gpio17", "gpio18", 1017 }; 1018 1019 static const char *const qup2_se3_groups[] = { 1020 "gpio79", "gpio116", "gpio97", "gpio100", "gpio100", "gpio116", 1021 }; 1022 1023 static const char *const qup2_se4_groups[] = { 1024 "gpio12", "gpio13", "gpio26", "gpio27", 1025 }; 1026 1027 static const char *const qup2_se5_groups[] = { 1028 "gpio16", "gpio17", "gpio18", "gpio19", 1029 }; 1030 1031 static const char *const qup2_se6_groups[] = { 1032 "gpio20", "gpio21", "gpio22", "gpio23", 1033 }; 1034 1035 static const char *const qup2_se7_groups[] = { 1036 "gpio27", "gpio26", "gpio13", "gpio12", 1037 }; 1038 1039 static const char *const resout_gpio_groups[] = { 1040 "gpio63", 1041 "gpio69", 1042 "gpio175", 1043 }; 1044 1045 static const char *const sd_write_protect_groups[] = { 1046 "gpio57", 1047 }; 1048 1049 static const char *const sdc1_groups[] = { 1050 "gpio121", "gpio123", "gpio124", "gpio125", 1051 "gpio126", "gpio127", "gpio128", "gpio129", 1052 "gpio130", "gpio131", "gpio120", 1053 }; 1054 1055 static const char *const sdc2_groups[] = { 1056 "gpio38", "gpio39", "gpio48", "gpio49", 1057 "gpio51", "gpio62", 1058 }; 1059 1060 static const char *const sdc2_fb_clk_groups[] = { 1061 "gpio50", 1062 }; 1063 1064 static const char *const tb_trig_sdc1_groups[] = { 1065 "gpio34", 1066 }; 1067 1068 static const char *const tb_trig_sdc2_groups[] = { 1069 "gpio35", 1070 }; 1071 1072 static const char *const tmess_prng0_groups[] = { 1073 "gpio73", 1074 }; 1075 1076 static const char *const tmess_prng1_groups[] = { 1077 "gpio72", 1078 }; 1079 1080 static const char *const tmess_prng2_groups[] = { 1081 "gpio70", 1082 }; 1083 1084 static const char *const tmess_prng3_groups[] = { 1085 "gpio71", 1086 }; 1087 1088 static const char *const tsense_pwm1_groups[] = { 1089 "gpio56", 1090 }; 1091 1092 static const char *const tsense_pwm2_groups[] = { 1093 "gpio56", 1094 }; 1095 1096 static const char *const tsense_pwm3_groups[] = { 1097 "gpio56", 1098 }; 1099 1100 static const char *const tsense_pwm4_groups[] = { 1101 "gpio56", 1102 }; 1103 1104 static const char *const uim0_clk_groups[] = { 1105 "gpio85", 1106 }; 1107 1108 static const char *const uim0_data_groups[] = { 1109 "gpio84", 1110 }; 1111 1112 static const char *const uim0_present_groups[] = { 1113 "gpio87", 1114 }; 1115 1116 static const char *const uim0_reset_groups[] = { 1117 "gpio86", 1118 }; 1119 1120 static const char *const uim1_clk_groups[] = { 1121 "gpio98", "gpio89", 1122 }; 1123 1124 static const char *const uim1_data_groups[] = { 1125 "gpio97", "gpio88", 1126 }; 1127 1128 static const char *const uim1_present_groups[] = { 1129 "gpio100", "gpio91", 1130 }; 1131 1132 static const char *const uim1_reset_groups[] = { 1133 "gpio99", "gpio90", 1134 }; 1135 1136 static const char *const usb0_hs_groups[] = { 1137 "gpio56", 1138 }; 1139 1140 static const char *const usb_phy_groups[] = { 1141 "gpio122", 1142 }; 1143 1144 static const char *const vfr_0_groups[] = { 1145 "gpio63", 1146 }; 1147 1148 static const char *const vfr_1_groups[] = { 1149 "gpio117", 1150 }; 1151 1152 static const char *const vsense_trigger_mirnat_groups[] = { 1153 "gpio52", 1154 }; 1155 1156 static const char *const wcn_sw_ctrl_groups[] = { 1157 "gpio81", 1158 }; 1159 1160 static const struct pinfunction eliza_functions[] = { 1161 MSM_GPIO_PIN_FUNCTION(gpio), 1162 MSM_PIN_FUNCTION(aoss_cti), 1163 MSM_PIN_FUNCTION(atest_char), 1164 MSM_PIN_FUNCTION(atest_usb), 1165 MSM_PIN_FUNCTION(audio_ext_mclk0), 1166 MSM_PIN_FUNCTION(audio_ref_clk), 1167 MSM_PIN_FUNCTION(cam_mclk), 1168 MSM_PIN_FUNCTION(cci_async_in), 1169 MSM_PIN_FUNCTION(cci_i2c_scl), 1170 MSM_PIN_FUNCTION(cci_i2c_sda), 1171 MSM_PIN_FUNCTION(cci_timer), 1172 MSM_PIN_FUNCTION(coex_uart1_rx), 1173 MSM_PIN_FUNCTION(coex_uart1_tx), 1174 MSM_PIN_FUNCTION(coex_uart2_rx), 1175 MSM_PIN_FUNCTION(coex_uart2_tx), 1176 MSM_PIN_FUNCTION(dbg_out_clk), 1177 MSM_PIN_FUNCTION(ddr_bist_complete), 1178 MSM_PIN_FUNCTION(ddr_bist_fail), 1179 MSM_PIN_FUNCTION(ddr_bist_start), 1180 MSM_PIN_FUNCTION(ddr_bist_stop), 1181 MSM_PIN_FUNCTION(ddr_pxi0), 1182 MSM_PIN_FUNCTION(ddr_pxi1), 1183 MSM_PIN_FUNCTION(dp0_hot), 1184 MSM_PIN_FUNCTION(egpio), 1185 MSM_PIN_FUNCTION(gcc_gp1), 1186 MSM_PIN_FUNCTION(gcc_gp2), 1187 MSM_PIN_FUNCTION(gcc_gp3), 1188 MSM_PIN_FUNCTION(gnss_adc0), 1189 MSM_PIN_FUNCTION(gnss_adc1), 1190 MSM_PIN_FUNCTION(hdmi_ddc_scl), 1191 MSM_PIN_FUNCTION(hdmi_ddc_sda), 1192 MSM_PIN_FUNCTION(hdmi_dtest0), 1193 MSM_PIN_FUNCTION(hdmi_dtest1), 1194 MSM_PIN_FUNCTION(hdmi_hot_plug), 1195 MSM_PIN_FUNCTION(hdmi_pixel_clk), 1196 MSM_PIN_FUNCTION(hdmi_rcv_det), 1197 MSM_PIN_FUNCTION(hdmi_tx_cec), 1198 MSM_PIN_FUNCTION(host2wlan_sol), 1199 MSM_PIN_FUNCTION(i2s0_data0), 1200 MSM_PIN_FUNCTION(i2s0_data1), 1201 MSM_PIN_FUNCTION(i2s0_sck), 1202 MSM_PIN_FUNCTION(i2s0_ws), 1203 MSM_PIN_FUNCTION(ibi_i3c), 1204 MSM_PIN_FUNCTION(jitter_bist), 1205 MSM_PIN_FUNCTION(mdp_esync0_out), 1206 MSM_PIN_FUNCTION(mdp_esync1_out), 1207 MSM_PIN_FUNCTION(mdp_vsync), 1208 MSM_PIN_FUNCTION(mdp_vsync0_out), 1209 MSM_PIN_FUNCTION(mdp_vsync11_out), 1210 MSM_PIN_FUNCTION(mdp_vsync1_out), 1211 MSM_PIN_FUNCTION(mdp_vsync2_out), 1212 MSM_PIN_FUNCTION(mdp_vsync3_out), 1213 MSM_PIN_FUNCTION(mdp_vsync_e), 1214 MSM_PIN_FUNCTION(nav_gpio0), 1215 MSM_PIN_FUNCTION(nav_gpio1), 1216 MSM_PIN_FUNCTION(nav_gpio2), 1217 MSM_PIN_FUNCTION(nav_gpio3), 1218 MSM_PIN_FUNCTION(pcie0_clk_req_n), 1219 MSM_PIN_FUNCTION(pcie1_clk_req_n), 1220 MSM_PIN_FUNCTION(phase_flag), 1221 MSM_PIN_FUNCTION(pll_bist_sync), 1222 MSM_PIN_FUNCTION(pll_clk_aux), 1223 MSM_PIN_FUNCTION(prng_rosc0), 1224 MSM_PIN_FUNCTION(prng_rosc1), 1225 MSM_PIN_FUNCTION(prng_rosc2), 1226 MSM_PIN_FUNCTION(prng_rosc3), 1227 MSM_PIN_FUNCTION(qdss_cti), 1228 MSM_PIN_FUNCTION(qdss_gpio_traceclk), 1229 MSM_PIN_FUNCTION(qdss_gpio_tracectl), 1230 MSM_PIN_FUNCTION(qdss_gpio_tracedata), 1231 MSM_PIN_FUNCTION(qlink_big_enable), 1232 MSM_PIN_FUNCTION(qlink_big_request), 1233 MSM_PIN_FUNCTION(qlink_little_enable), 1234 MSM_PIN_FUNCTION(qlink_little_request), 1235 MSM_PIN_FUNCTION(qlink_wmss), 1236 MSM_PIN_FUNCTION(qspi0), 1237 MSM_PIN_FUNCTION(qspi_clk), 1238 MSM_PIN_FUNCTION(qspi_cs), 1239 MSM_PIN_FUNCTION(qup1_se0), 1240 MSM_PIN_FUNCTION(qup1_se1), 1241 MSM_PIN_FUNCTION(qup1_se2), 1242 MSM_PIN_FUNCTION(qup1_se3), 1243 MSM_PIN_FUNCTION(qup1_se4), 1244 MSM_PIN_FUNCTION(qup1_se5), 1245 MSM_PIN_FUNCTION(qup1_se6), 1246 MSM_PIN_FUNCTION(qup1_se7), 1247 MSM_PIN_FUNCTION(qup2_se0), 1248 MSM_PIN_FUNCTION(qup2_se1), 1249 MSM_PIN_FUNCTION(qup2_se2), 1250 MSM_PIN_FUNCTION(qup2_se3), 1251 MSM_PIN_FUNCTION(qup2_se4), 1252 MSM_PIN_FUNCTION(qup2_se5), 1253 MSM_PIN_FUNCTION(qup2_se6), 1254 MSM_PIN_FUNCTION(qup2_se7), 1255 MSM_PIN_FUNCTION(resout_gpio), 1256 MSM_PIN_FUNCTION(sd_write_protect), 1257 MSM_PIN_FUNCTION(sdc1), 1258 MSM_PIN_FUNCTION(sdc2), 1259 MSM_PIN_FUNCTION(sdc2_fb_clk), 1260 MSM_PIN_FUNCTION(tb_trig_sdc1), 1261 MSM_PIN_FUNCTION(tb_trig_sdc2), 1262 MSM_PIN_FUNCTION(tmess_prng0), 1263 MSM_PIN_FUNCTION(tmess_prng1), 1264 MSM_PIN_FUNCTION(tmess_prng2), 1265 MSM_PIN_FUNCTION(tmess_prng3), 1266 MSM_PIN_FUNCTION(tsense_pwm1), 1267 MSM_PIN_FUNCTION(tsense_pwm2), 1268 MSM_PIN_FUNCTION(tsense_pwm3), 1269 MSM_PIN_FUNCTION(tsense_pwm4), 1270 MSM_PIN_FUNCTION(uim0_clk), 1271 MSM_PIN_FUNCTION(uim0_data), 1272 MSM_PIN_FUNCTION(uim0_present), 1273 MSM_PIN_FUNCTION(uim0_reset), 1274 MSM_PIN_FUNCTION(uim1_clk), 1275 MSM_PIN_FUNCTION(uim1_data), 1276 MSM_PIN_FUNCTION(uim1_present), 1277 MSM_PIN_FUNCTION(uim1_reset), 1278 MSM_PIN_FUNCTION(usb0_hs), 1279 MSM_PIN_FUNCTION(usb_phy), 1280 MSM_PIN_FUNCTION(vfr_0), 1281 MSM_PIN_FUNCTION(vfr_1), 1282 MSM_PIN_FUNCTION(vsense_trigger_mirnat), 1283 MSM_PIN_FUNCTION(wcn_sw_ctrl), 1284 }; 1285 1286 /* Every pin is maintained as a single group, and missing or non-existing pin 1287 * would be maintained as dummy group to synchronize pin group index with 1288 * pin descriptor registered with pinctrl core. 1289 * Clients would not be able to request these dummy pin groups. 1290 */ 1291 static const struct msm_pingroup eliza_groups[] = { 1292 [0] = PINGROUP(0, qup2_se0, ibi_i3c, aoss_cti, _, _, _, _, _, _, _, _), 1293 [1] = PINGROUP(1, qup2_se0, ibi_i3c, aoss_cti, _, _, _, _, _, _, _, _), 1294 [2] = PINGROUP(2, qup2_se0, _, _, _, _, _, _, _, _, _, _), 1295 [3] = PINGROUP(3, qup2_se0, _, _, _, _, _, _, _, _, _, _), 1296 [4] = PINGROUP(4, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, _), 1297 [5] = PINGROUP(5, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, _), 1298 [6] = PINGROUP(6, qup2_se1, hdmi_ddc_scl, _, _, _, _, _, _, _, _, _), 1299 [7] = PINGROUP(7, qup2_se1, hdmi_ddc_sda, _, _, _, _, _, _, _, _, _), 1300 [8] = PINGROUP(8, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1301 [9] = PINGROUP(9, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1302 [10] = PINGROUP(10, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1303 [11] = PINGROUP(11, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1304 [12] = PINGROUP(12, qup2_se4, ibi_i3c, mdp_esync1_out, qup2_se7, _, _, _, _, _, _, _), 1305 [13] = PINGROUP(13, qup2_se4, ibi_i3c, mdp_vsync_e, mdp_esync0_out, qup2_se7, _, _, _, _, _, _), 1306 [14] = PINGROUP(14, _, _, _, _, _, _, _, _, _, _, _), 1307 [15] = PINGROUP(15, _, _, _, _, _, _, _, _, _, _, _), 1308 [16] = PINGROUP(16, qup2_se5, qup2_se2, mdp_vsync, mdp_vsync2_out, mdp_vsync3_out, _, _, _, _, _, _), 1309 [17] = PINGROUP(17, qup2_se5, qup2_se2, mdp_vsync, mdp_vsync0_out, mdp_vsync1_out, _, _, _, _, _, _), 1310 [18] = PINGROUP(18, qup2_se5, qup2_se2, hdmi_pixel_clk, _, qdss_cti, _, _, _, _, _, _), 1311 [19] = PINGROUP(19, qup2_se5, hdmi_rcv_det, _, qdss_cti, _, _, _, _, _, _, _), 1312 [20] = PINGROUP(20, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1313 [21] = PINGROUP(21, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1314 [22] = PINGROUP(22, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1315 [23] = PINGROUP(23, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1316 [24] = PINGROUP(24, _, _, _, _, _, _, _, _, _, _, _), 1317 [25] = PINGROUP(25, _, _, _, _, _, _, _, _, _, _, _), 1318 [26] = PINGROUP(26, qup2_se4, aoss_cti, qup2_se7, _, _, _, _, _, _, _, _), 1319 [27] = PINGROUP(27, qup2_se4, aoss_cti, mdp_vsync11_out, qup2_se7, gcc_gp1, _, _, _, _, _, _), 1320 [28] = PINGROUP(28, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1321 [29] = PINGROUP(29, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1322 [30] = PINGROUP(30, qup1_se0, qup1_se2, cci_async_in, gcc_gp3, qdss_gpio_tracedata, _, _, _, _, _, egpio), 1323 [31] = PINGROUP(31, qup1_se0, cci_async_in, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1324 [32] = PINGROUP(32, qup1_se1, ibi_i3c, audio_ref_clk, gcc_gp2, qdss_cti, _, _, _, _, _, _), 1325 [33] = PINGROUP(33, qup1_se1, ibi_i3c, host2wlan_sol, gcc_gp3, _, _, _, _, _, _, _), 1326 [34] = PINGROUP(34, qup1_se1, qup1_se5, tb_trig_sdc1, ddr_bist_start, qdss_gpio_tracedata, _, _, _, _, _, _), 1327 [35] = PINGROUP(35, qup1_se1, qup1_se5, tb_trig_sdc2, gcc_gp2, qdss_gpio_tracedata, _, _, _, _, _, _), 1328 [36] = PINGROUP(36, qup1_se4, qup1_se4, ibi_i3c, _, _, _, _, _, _, _, _), 1329 [37] = PINGROUP(37, qup1_se4, qup1_se4, ibi_i3c, _, _, _, _, _, _, _, _), 1330 [38] = PINGROUP(38, _, _, _, _, _, _, _, _, _, _, _), 1331 [39] = PINGROUP(39, _, _, _, _, _, _, _, _, _, _, _), 1332 [40] = PINGROUP(40, qup1_se6, qup1_se2, qup1_se6, _, qdss_gpio_tracedata, gnss_adc1, ddr_pxi1, _, _, _, _), 1333 [41] = PINGROUP(41, _, _, _, _, _, _, _, _, _, _, _), 1334 [42] = PINGROUP(42, qup1_se6, qup1_se2, qup1_se6, qdss_gpio_tracedata, gnss_adc0, ddr_pxi1, _, _, _, _, _), 1335 [43] = PINGROUP(43, _, _, _, _, _, _, _, _, _, _, _), 1336 [44] = PINGROUP(44, qup1_se3, _, _, _, _, _, _, _, _, _, _), 1337 [45] = PINGROUP(45, qup1_se3, _, _, _, _, _, _, _, _, _, _), 1338 [46] = PINGROUP(46, qup1_se3, hdmi_tx_cec, _, _, _, _, _, _, _, _, _), 1339 [47] = PINGROUP(47, qup1_se3, hdmi_hot_plug, _, _, _, _, _, _, _, _, _), 1340 [48] = PINGROUP(48, _, _, _, _, _, _, _, _, _, _, _), 1341 [49] = PINGROUP(49, _, _, _, _, _, _, _, _, _, _, _), 1342 [50] = PINGROUP(50, sdc2_fb_clk, _, _, _, _, _, _, _, _, _, _), 1343 [51] = PINGROUP(51, _, _, _, _, _, _, _, _, _, _, _), 1344 [52] = PINGROUP(52, qup1_se2, pcie1_clk_req_n, qup1_se2, ddr_bist_complete, qdss_gpio_tracedata, _, vsense_trigger_mirnat, _, _, _, _), 1345 [53] = PINGROUP(53, qup1_se2, qup1_se2, gcc_gp1, ddr_bist_stop, _, qdss_gpio_tracedata, _, _, _, _, _), 1346 [54] = PINGROUP(54, qup1_se2, qup1_se6, qdss_gpio_tracedata, gnss_adc1, atest_usb, ddr_pxi0, _, _, _, _, _), 1347 [55] = PINGROUP(55, qup1_se2, dp0_hot, qup1_se6, _, gnss_adc0, atest_usb, ddr_pxi0, _, _, _, _), 1348 [56] = PINGROUP(56, usb0_hs, tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4, _, _, _, _, _, _), 1349 [57] = PINGROUP(57, sd_write_protect, _, _, _, _, _, _, _, _, _, _), 1350 [58] = PINGROUP(58, _, _, _, _, _, _, _, _, _, _, _), 1351 [59] = PINGROUP(59, _, _, _, _, _, _, _, _, _, _, _), 1352 [60] = PINGROUP(60, i2s0_sck, _, _, _, _, _, _, _, _, _, _), 1353 [61] = PINGROUP(61, i2s0_ws, _, _, _, _, _, _, _, _, _, _), 1354 [62] = PINGROUP(62, _, _, _, _, _, _, _, _, _, _, _), 1355 [63] = PINGROUP(63, resout_gpio, i2s0_data1, cci_timer, vfr_0, _, _, _, _, _, _, _), 1356 [64] = PINGROUP(64, i2s0_data0, _, _, _, _, _, _, _, _, _, _), 1357 [65] = PINGROUP(65, cam_mclk, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _), 1358 [66] = PINGROUP(66, cam_mclk, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _), 1359 [67] = PINGROUP(67, cam_mclk, prng_rosc0, _, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1360 [68] = PINGROUP(68, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1361 [69] = PINGROUP(69, cam_mclk, audio_ext_mclk0, resout_gpio, prng_rosc1, _, _, _, _, _, _, _), 1362 [70] = PINGROUP(70, cci_i2c_sda, tmess_prng2, _, phase_flag, atest_char, _, _, _, _, _, _), 1363 [71] = PINGROUP(71, cci_i2c_scl, tmess_prng3, _, phase_flag, atest_char, _, _, _, _, _, _), 1364 [72] = PINGROUP(72, cci_i2c_sda, tmess_prng1, qdss_gpio_tracedata, atest_char, _, _, _, _, _, _, _), 1365 [73] = PINGROUP(73, cci_i2c_scl, tmess_prng0, qdss_cti, atest_char, _, _, _, _, _, _, _), 1366 [74] = PINGROUP(74, cci_i2c_sda, prng_rosc3, qdss_cti, atest_char, _, _, _, _, _, _, _), 1367 [75] = PINGROUP(75, cci_i2c_scl, _, phase_flag, _, _, _, _, _, _, _, _), 1368 [76] = PINGROUP(76, cci_i2c_sda, cci_timer, prng_rosc2, _, phase_flag, _, _, _, _, _, _), 1369 [77] = PINGROUP(77, cci_i2c_scl, jitter_bist, _, _, _, _, _, _, _, _, _), 1370 [78] = PINGROUP(78, qup1_se7, qup1_se7, _, phase_flag, _, _, _, _, _, _, _), 1371 [79] = PINGROUP(79, qspi0, mdp_vsync, qup2_se3, _, _, _, _, _, _, _, _), 1372 [80] = PINGROUP(80, pcie0_clk_req_n, qup1_se7, _, phase_flag, _, _, _, _, _, _, _), 1373 [81] = PINGROUP(81, wcn_sw_ctrl, qup1_se7, dbg_out_clk, _, _, _, _, _, _, _, _), 1374 [82] = PINGROUP(82, _, _, _, _, _, _, _, _, _, _, _), 1375 [83] = PINGROUP(83, _, _, _, _, _, _, _, _, _, _, _), 1376 [84] = PINGROUP(84, uim0_data, _, _, _, _, _, _, _, _, _, _), 1377 [85] = PINGROUP(85, uim0_clk, _, _, _, _, _, _, _, _, _, _), 1378 [86] = PINGROUP(86, uim0_reset, _, _, _, _, _, _, _, _, _, _), 1379 [87] = PINGROUP(87, uim0_present, _, _, _, _, _, _, _, _, _, _), 1380 [88] = PINGROUP(88, uim1_data, _, _, _, _, _, _, _, _, _, _), 1381 [89] = PINGROUP(89, uim1_clk, _, _, _, _, _, _, _, _, _, _), 1382 [90] = PINGROUP(90, uim1_reset, _, _, _, _, _, _, _, _, _, _), 1383 [91] = PINGROUP(91, uim1_present, _, _, _, _, _, _, _, _, _, _), 1384 [92] = PINGROUP(92, qlink_little_request, _, _, _, _, _, _, _, _, _, _), 1385 [93] = PINGROUP(93, qlink_little_enable, _, _, _, _, _, _, _, _, _, _), 1386 [94] = PINGROUP(94, qlink_wmss, _, _, _, _, _, _, _, _, _, _), 1387 [95] = PINGROUP(95, qlink_big_request, _, _, _, _, _, _, _, _, _, _), 1388 [96] = PINGROUP(96, qlink_big_enable, _, _, _, _, _, _, _, _, _, _), 1389 [97] = PINGROUP(97, uim1_data, qspi0, qup2_se3, _, _, _, _, _, _, _, _), 1390 [98] = PINGROUP(98, uim1_clk, qspi0, _, _, _, _, _, _, _, _, _), 1391 [99] = PINGROUP(99, uim1_reset, qspi0, _, _, _, _, _, _, _, _, _), 1392 [100] = PINGROUP(100, uim1_present, qspi0, qup2_se3, coex_uart2_tx, qup2_se3, mdp_vsync, _, _, _, _, _), 1393 [101] = PINGROUP(101, _, _, _, _, _, _, _, _, _, _, _), 1394 [102] = PINGROUP(102, _, _, _, _, _, _, _, _, _, _, _), 1395 [103] = PINGROUP(103, _, _, _, _, _, _, _, _, _, _, _), 1396 [104] = PINGROUP(104, _, _, _, _, _, _, _, _, _, _, _), 1397 [105] = PINGROUP(105, _, _, _, _, _, _, _, _, _, _, _), 1398 [106] = PINGROUP(106, _, _, _, _, _, _, _, _, _, _, _), 1399 [107] = PINGROUP(107, _, _, _, _, _, _, _, _, _, _, _), 1400 [108] = PINGROUP(108, _, _, _, _, _, _, _, _, _, _, _), 1401 [109] = PINGROUP(109, _, _, _, _, _, _, _, _, _, _, _), 1402 [110] = PINGROUP(110, _, _, _, _, _, _, _, _, _, _, _), 1403 [111] = PINGROUP(111, coex_uart1_tx, _, _, _, _, _, _, _, _, _, _), 1404 [112] = PINGROUP(112, coex_uart1_rx, _, _, _, _, _, _, _, _, _, _), 1405 [113] = PINGROUP(113, _, nav_gpio3, _, _, _, _, _, _, _, _, _), 1406 [114] = PINGROUP(114, qup1_se7, qup1_se7, _, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1407 [115] = PINGROUP(115, _, qspi0, cci_async_in, _, _, _, _, _, _, _, _), 1408 [116] = PINGROUP(116, qspi0, coex_uart2_rx, qup2_se3, qup2_se3, _, _, _, _, _, _, _), 1409 [117] = PINGROUP(117, nav_gpio1, _, vfr_1, _, _, _, _, _, _, _, _), 1410 [118] = PINGROUP(118, nav_gpio2, _, _, _, _, _, _, _, _, _, _), 1411 [119] = PINGROUP(119, nav_gpio0, _, _, _, _, _, _, _, _, _, _), 1412 [120] = PINGROUP(120, sdc1, mdp_vsync, _, _, _, _, _, _, _, _, _), 1413 [121] = PINGROUP(121, sdc1, mdp_vsync, _, _, _, _, _, _, _, _, _), 1414 [122] = PINGROUP(122, usb_phy, _, _, _, _, _, _, _, _, _, _), 1415 [123] = PINGROUP(123, sdc1, _, _, _, _, _, _, _, _, _, _), 1416 [124] = PINGROUP(124, sdc1, _, _, _, _, _, _, _, _, _, _), 1417 [125] = PINGROUP(125, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1418 [126] = PINGROUP(126, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1419 [127] = PINGROUP(127, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1420 [128] = PINGROUP(128, sdc1, _, _, _, _, _, _, _, _, _, _), 1421 [129] = PINGROUP(129, sdc1, _, _, _, _, _, _, _, _, _, _), 1422 [130] = PINGROUP(130, sdc1, _, _, _, _, _, _, _, _, _, _), 1423 [131] = PINGROUP(131, sdc1, _, _, _, _, _, _, _, _, _, _), 1424 [132] = PINGROUP(132, qup1_se5, _, qdss_gpio_tracedata, hdmi_dtest0, _, _, _, _, _, _, _), 1425 [133] = PINGROUP(133, qup1_se5, _, qdss_gpio_tracedata, hdmi_dtest1, _, _, _, _, _, _, _), 1426 [134] = PINGROUP(134, qup1_se5, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, _), 1427 [135] = PINGROUP(135, qup1_se5, _, pll_clk_aux, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1428 [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _, _, _), 1429 [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _, _, _), 1430 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _, _, egpio), 1431 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _, _, egpio), 1432 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _, _, egpio), 1433 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _, _, egpio), 1434 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _, _, egpio), 1435 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _, _, egpio), 1436 [144] = PINGROUP(144, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1437 [145] = PINGROUP(145, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, _, egpio), 1438 [146] = PINGROUP(146, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1439 [147] = PINGROUP(147, ddr_bist_fail, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1440 [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _, _, egpio), 1441 [149] = PINGROUP(149, _, _, _, _, _, _, _, _, _, _, egpio), 1442 [150] = PINGROUP(150, _, _, _, _, _, _, _, _, _, _, egpio), 1443 [151] = PINGROUP(151, _, _, _, _, _, _, _, _, _, _, egpio), 1444 [152] = PINGROUP(152, _, _, _, _, _, _, _, _, _, _, egpio), 1445 [153] = PINGROUP(153, _, _, _, _, _, _, _, _, _, _, egpio), 1446 [154] = PINGROUP(154, qdss_cti, _, _, _, _, _, _, _, _, _, egpio), 1447 [155] = PINGROUP(155, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1448 [156] = PINGROUP(156, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1449 [157] = PINGROUP(157, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1450 [158] = PINGROUP(158, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1451 [159] = PINGROUP(159, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1452 [160] = PINGROUP(160, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1453 [161] = PINGROUP(161, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1454 [162] = PINGROUP(162, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1455 [163] = PINGROUP(163, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1456 [164] = PINGROUP(164, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1457 [165] = PINGROUP(165, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1458 [166] = PINGROUP(166, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1459 [167] = PINGROUP(167, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1460 [168] = PINGROUP(168, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1461 [169] = PINGROUP(169, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1462 [170] = PINGROUP(170, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1463 [171] = PINGROUP(171, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1464 [172] = PINGROUP(172, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1465 [173] = PINGROUP(173, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1466 [174] = PINGROUP(174, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1467 [175] = PINGROUP(175, resout_gpio, _, phase_flag, _, _, _, _, _, _, _, egpio), 1468 [176] = PINGROUP(176, _, phase_flag, qdss_cti, _, _, _, _, _, _, _, egpio), 1469 [177] = PINGROUP(177, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1470 [178] = PINGROUP(178, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1471 [179] = PINGROUP(179, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1472 [180] = PINGROUP(180, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1473 [181] = PINGROUP(181, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1474 [182] = PINGROUP(182, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1475 [183] = PINGROUP(183, _, _, _, _, _, _, _, _, _, _, _), 1476 [184] = PINGROUP(184, pll_bist_sync, qdss_cti, _, _, _, _, _, _, _, _, egpio), 1477 [185] = UFS_RESET(ufs_reset, 0xc9004, 0xca000), 1478 }; 1479 1480 static const struct msm_gpio_wakeirq_map eliza_pdc_map[] = { 1481 { 0, 82 }, { 3, 87 }, { 4, 90 }, { 6, 68 }, { 7, 153 }, 1482 { 11, 85 }, { 12, 107 }, { 13, 106 }, { 16, 88 }, { 17, 70 }, 1483 { 18, 134 }, { 19, 79 }, { 23, 80 }, { 26, 91 }, { 27, 74 }, 1484 { 28, 137 }, { 29, 138 }, { 30, 139 }, { 31, 140 }, { 32, 117 }, 1485 { 34, 100 }, { 35, 98 }, { 36, 141 }, { 39, 89 }, { 40, 142 }, 1486 { 42, 143 }, { 44, 101 }, { 45, 144 }, { 46, 145 }, { 47, 146 }, 1487 { 49, 75 }, { 51, 147 }, { 52, 148 }, { 53, 149 }, { 54, 150 }, 1488 { 55, 151 }, { 56, 152 }, { 58, 71 }, { 59, 155 }, { 63, 99 }, 1489 { 78, 156 }, { 79, 76 }, { 80, 157 }, { 81, 69 }, { 87, 158 }, 1490 { 91, 67 }, { 92, 159 }, { 95, 160 }, { 98, 161 }, { 99, 162 }, 1491 { 100, 83 }, { 108, 154 }, { 109, 84 }, { 112, 86 }, { 113, 92 }, 1492 { 114, 93 }, { 115, 110 }, { 116, 94 }, { 117, 77 }, { 118, 108 }, 1493 { 119, 95 }, { 120, 81 }, { 121, 96 }, { 122, 97 }, { 123, 102 }, 1494 { 125, 103 }, { 127, 104 }, { 128, 105 }, { 129, 78 }, { 130, 112 }, 1495 { 131, 113 }, { 133, 114 }, { 135, 115 }, { 139, 116 }, { 142, 118 }, 1496 { 145, 109 }, { 147, 72 }, { 149, 111 }, { 154, 122 }, { 157, 119 }, 1497 { 159, 120 }, { 161, 121 }, { 164, 123 }, { 165, 124 }, { 167, 125 }, 1498 { 170, 126 }, { 171, 73 }, { 172, 127 }, { 173, 128 }, { 174, 129 }, 1499 { 175, 130 }, { 176, 131 }, { 177, 132 }, { 179, 133 }, { 182, 135 }, 1500 { 184, 136 }, 1501 }; 1502 1503 static const struct msm_pinctrl_soc_data eliza_tlmm = { 1504 .pins = eliza_pins, 1505 .npins = ARRAY_SIZE(eliza_pins), 1506 .functions = eliza_functions, 1507 .nfunctions = ARRAY_SIZE(eliza_functions), 1508 .groups = eliza_groups, 1509 .ngroups = ARRAY_SIZE(eliza_groups), 1510 .ngpios = 186, 1511 .wakeirq_map = eliza_pdc_map, 1512 .nwakeirq_map = ARRAY_SIZE(eliza_pdc_map), 1513 .egpio_func = 11, 1514 }; 1515 1516 static int eliza_tlmm_probe(struct platform_device *pdev) 1517 { 1518 return msm_pinctrl_probe(pdev, &eliza_tlmm); 1519 } 1520 1521 static const struct of_device_id eliza_tlmm_of_match[] = { 1522 { .compatible = "qcom,eliza-tlmm", }, 1523 {}, 1524 }; 1525 1526 static struct platform_driver eliza_tlmm_driver = { 1527 .driver = { 1528 .name = "eliza-tlmm", 1529 .of_match_table = eliza_tlmm_of_match, 1530 }, 1531 .probe = eliza_tlmm_probe, 1532 }; 1533 1534 static int __init eliza_tlmm_init(void) 1535 { 1536 return platform_driver_register(&eliza_tlmm_driver); 1537 } 1538 arch_initcall(eliza_tlmm_init); 1539 1540 static void __exit eliza_tlmm_exit(void) 1541 { 1542 platform_driver_unregister(&eliza_tlmm_driver); 1543 } 1544 module_exit(eliza_tlmm_exit); 1545 1546 MODULE_DESCRIPTION("QTI Eliza TLMM driver"); 1547 MODULE_LICENSE("GPL"); 1548 MODULE_DEVICE_TABLE(of, eliza_tlmm_of_match); 1549