1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/of.h> 8 #include <linux/platform_device.h> 9 10 #include "pinctrl-msm.h" 11 12 #define REG_SIZE 0x1000 13 #define PINGROUP(id, f1, f2, f3, f4, f5, f6, f7, f8, f9, f10, f11) \ 14 { \ 15 .grp = PINCTRL_PINGROUP("gpio" #id, \ 16 gpio##id##_pins, \ 17 ARRAY_SIZE(gpio##id##_pins)), \ 18 .funcs = (int[]){ \ 19 msm_mux_gpio, /* gpio mode */ \ 20 msm_mux_##f1, \ 21 msm_mux_##f2, \ 22 msm_mux_##f3, \ 23 msm_mux_##f4, \ 24 msm_mux_##f5, \ 25 msm_mux_##f6, \ 26 msm_mux_##f7, \ 27 msm_mux_##f8, \ 28 msm_mux_##f9, \ 29 msm_mux_##f10, \ 30 msm_mux_##f11 /* egpio mode */ \ 31 }, \ 32 .nfuncs = 12, \ 33 .ctl_reg = REG_SIZE * id, \ 34 .io_reg = 0x4 + REG_SIZE * id, \ 35 .intr_cfg_reg = 0x8 + REG_SIZE * id, \ 36 .intr_status_reg = 0xc + REG_SIZE * id, \ 37 .mux_bit = 2, \ 38 .pull_bit = 0, \ 39 .drv_bit = 6, \ 40 .egpio_enable = 12, \ 41 .egpio_present = 11, \ 42 .oe_bit = 9, \ 43 .in_bit = 0, \ 44 .out_bit = 1, \ 45 .intr_enable_bit = 0, \ 46 .intr_status_bit = 0, \ 47 .intr_wakeup_present_bit = 6, \ 48 .intr_wakeup_enable_bit = 7, \ 49 .intr_target_bit = 8, \ 50 .intr_target_kpss_val = 3, \ 51 .intr_raw_status_bit = 4, \ 52 .intr_polarity_bit = 1, \ 53 .intr_detection_bit = 2, \ 54 .intr_detection_width = 2, \ 55 } 56 57 #define SDC_QDSD_PINGROUP(pg_name, ctl, pull, drv) \ 58 { \ 59 .grp = PINCTRL_PINGROUP(#pg_name, \ 60 pg_name##_pins, \ 61 ARRAY_SIZE(pg_name##_pins)), \ 62 .ctl_reg = ctl, \ 63 .io_reg = 0, \ 64 .intr_cfg_reg = 0, \ 65 .intr_status_reg = 0, \ 66 .mux_bit = -1, \ 67 .pull_bit = pull, \ 68 .drv_bit = drv, \ 69 .oe_bit = -1, \ 70 .in_bit = -1, \ 71 .out_bit = -1, \ 72 .intr_enable_bit = -1, \ 73 .intr_status_bit = -1, \ 74 .intr_target_bit = -1, \ 75 .intr_raw_status_bit = -1, \ 76 .intr_polarity_bit = -1, \ 77 .intr_detection_bit = -1, \ 78 .intr_detection_width = -1, \ 79 } 80 81 #define UFS_RESET(pg_name, ctl, io) \ 82 { \ 83 .grp = PINCTRL_PINGROUP(#pg_name, \ 84 pg_name##_pins, \ 85 ARRAY_SIZE(pg_name##_pins)), \ 86 .ctl_reg = ctl, \ 87 .io_reg = io, \ 88 .intr_cfg_reg = 0, \ 89 .intr_status_reg = 0, \ 90 .mux_bit = -1, \ 91 .pull_bit = 3, \ 92 .drv_bit = 0, \ 93 .oe_bit = -1, \ 94 .in_bit = -1, \ 95 .out_bit = 0, \ 96 .intr_enable_bit = -1, \ 97 .intr_status_bit = -1, \ 98 .intr_target_bit = -1, \ 99 .intr_raw_status_bit = -1, \ 100 .intr_polarity_bit = -1, \ 101 .intr_detection_bit = -1, \ 102 .intr_detection_width = -1, \ 103 } 104 105 static const struct pinctrl_pin_desc eliza_pins[] = { 106 PINCTRL_PIN(0, "GPIO_0"), 107 PINCTRL_PIN(1, "GPIO_1"), 108 PINCTRL_PIN(2, "GPIO_2"), 109 PINCTRL_PIN(3, "GPIO_3"), 110 PINCTRL_PIN(4, "GPIO_4"), 111 PINCTRL_PIN(5, "GPIO_5"), 112 PINCTRL_PIN(6, "GPIO_6"), 113 PINCTRL_PIN(7, "GPIO_7"), 114 PINCTRL_PIN(8, "GPIO_8"), 115 PINCTRL_PIN(9, "GPIO_9"), 116 PINCTRL_PIN(10, "GPIO_10"), 117 PINCTRL_PIN(11, "GPIO_11"), 118 PINCTRL_PIN(12, "GPIO_12"), 119 PINCTRL_PIN(13, "GPIO_13"), 120 PINCTRL_PIN(14, "GPIO_14"), 121 PINCTRL_PIN(15, "GPIO_15"), 122 PINCTRL_PIN(16, "GPIO_16"), 123 PINCTRL_PIN(17, "GPIO_17"), 124 PINCTRL_PIN(18, "GPIO_18"), 125 PINCTRL_PIN(19, "GPIO_19"), 126 PINCTRL_PIN(20, "GPIO_20"), 127 PINCTRL_PIN(21, "GPIO_21"), 128 PINCTRL_PIN(22, "GPIO_22"), 129 PINCTRL_PIN(23, "GPIO_23"), 130 PINCTRL_PIN(24, "GPIO_24"), 131 PINCTRL_PIN(25, "GPIO_25"), 132 PINCTRL_PIN(26, "GPIO_26"), 133 PINCTRL_PIN(27, "GPIO_27"), 134 PINCTRL_PIN(28, "GPIO_28"), 135 PINCTRL_PIN(29, "GPIO_29"), 136 PINCTRL_PIN(30, "GPIO_30"), 137 PINCTRL_PIN(31, "GPIO_31"), 138 PINCTRL_PIN(32, "GPIO_32"), 139 PINCTRL_PIN(33, "GPIO_33"), 140 PINCTRL_PIN(34, "GPIO_34"), 141 PINCTRL_PIN(35, "GPIO_35"), 142 PINCTRL_PIN(36, "GPIO_36"), 143 PINCTRL_PIN(37, "GPIO_37"), 144 PINCTRL_PIN(38, "GPIO_38"), 145 PINCTRL_PIN(39, "GPIO_39"), 146 PINCTRL_PIN(40, "GPIO_40"), 147 PINCTRL_PIN(41, "GPIO_41"), 148 PINCTRL_PIN(42, "GPIO_42"), 149 PINCTRL_PIN(43, "GPIO_43"), 150 PINCTRL_PIN(44, "GPIO_44"), 151 PINCTRL_PIN(45, "GPIO_45"), 152 PINCTRL_PIN(46, "GPIO_46"), 153 PINCTRL_PIN(47, "GPIO_47"), 154 PINCTRL_PIN(48, "GPIO_48"), 155 PINCTRL_PIN(49, "GPIO_49"), 156 PINCTRL_PIN(50, "GPIO_50"), 157 PINCTRL_PIN(51, "GPIO_51"), 158 PINCTRL_PIN(52, "GPIO_52"), 159 PINCTRL_PIN(53, "GPIO_53"), 160 PINCTRL_PIN(54, "GPIO_54"), 161 PINCTRL_PIN(55, "GPIO_55"), 162 PINCTRL_PIN(56, "GPIO_56"), 163 PINCTRL_PIN(57, "GPIO_57"), 164 PINCTRL_PIN(58, "GPIO_58"), 165 PINCTRL_PIN(59, "GPIO_59"), 166 PINCTRL_PIN(60, "GPIO_60"), 167 PINCTRL_PIN(61, "GPIO_61"), 168 PINCTRL_PIN(62, "GPIO_62"), 169 PINCTRL_PIN(63, "GPIO_63"), 170 PINCTRL_PIN(64, "GPIO_64"), 171 PINCTRL_PIN(65, "GPIO_65"), 172 PINCTRL_PIN(66, "GPIO_66"), 173 PINCTRL_PIN(67, "GPIO_67"), 174 PINCTRL_PIN(68, "GPIO_68"), 175 PINCTRL_PIN(69, "GPIO_69"), 176 PINCTRL_PIN(70, "GPIO_70"), 177 PINCTRL_PIN(71, "GPIO_71"), 178 PINCTRL_PIN(72, "GPIO_72"), 179 PINCTRL_PIN(73, "GPIO_73"), 180 PINCTRL_PIN(74, "GPIO_74"), 181 PINCTRL_PIN(75, "GPIO_75"), 182 PINCTRL_PIN(76, "GPIO_76"), 183 PINCTRL_PIN(77, "GPIO_77"), 184 PINCTRL_PIN(78, "GPIO_78"), 185 PINCTRL_PIN(79, "GPIO_79"), 186 PINCTRL_PIN(80, "GPIO_80"), 187 PINCTRL_PIN(81, "GPIO_81"), 188 PINCTRL_PIN(82, "GPIO_82"), 189 PINCTRL_PIN(83, "GPIO_83"), 190 PINCTRL_PIN(84, "GPIO_84"), 191 PINCTRL_PIN(85, "GPIO_85"), 192 PINCTRL_PIN(86, "GPIO_86"), 193 PINCTRL_PIN(87, "GPIO_87"), 194 PINCTRL_PIN(88, "GPIO_88"), 195 PINCTRL_PIN(89, "GPIO_89"), 196 PINCTRL_PIN(90, "GPIO_90"), 197 PINCTRL_PIN(91, "GPIO_91"), 198 PINCTRL_PIN(92, "GPIO_92"), 199 PINCTRL_PIN(93, "GPIO_93"), 200 PINCTRL_PIN(94, "GPIO_94"), 201 PINCTRL_PIN(95, "GPIO_95"), 202 PINCTRL_PIN(96, "GPIO_96"), 203 PINCTRL_PIN(97, "GPIO_97"), 204 PINCTRL_PIN(98, "GPIO_98"), 205 PINCTRL_PIN(99, "GPIO_99"), 206 PINCTRL_PIN(100, "GPIO_100"), 207 PINCTRL_PIN(101, "GPIO_101"), 208 PINCTRL_PIN(102, "GPIO_102"), 209 PINCTRL_PIN(103, "GPIO_103"), 210 PINCTRL_PIN(104, "GPIO_104"), 211 PINCTRL_PIN(105, "GPIO_105"), 212 PINCTRL_PIN(106, "GPIO_106"), 213 PINCTRL_PIN(107, "GPIO_107"), 214 PINCTRL_PIN(108, "GPIO_108"), 215 PINCTRL_PIN(109, "GPIO_109"), 216 PINCTRL_PIN(110, "GPIO_110"), 217 PINCTRL_PIN(111, "GPIO_111"), 218 PINCTRL_PIN(112, "GPIO_112"), 219 PINCTRL_PIN(113, "GPIO_113"), 220 PINCTRL_PIN(114, "GPIO_114"), 221 PINCTRL_PIN(115, "GPIO_115"), 222 PINCTRL_PIN(116, "GPIO_116"), 223 PINCTRL_PIN(117, "GPIO_117"), 224 PINCTRL_PIN(118, "GPIO_118"), 225 PINCTRL_PIN(119, "GPIO_119"), 226 PINCTRL_PIN(120, "GPIO_120"), 227 PINCTRL_PIN(121, "GPIO_121"), 228 PINCTRL_PIN(122, "GPIO_122"), 229 PINCTRL_PIN(123, "GPIO_123"), 230 PINCTRL_PIN(124, "GPIO_124"), 231 PINCTRL_PIN(125, "GPIO_125"), 232 PINCTRL_PIN(126, "GPIO_126"), 233 PINCTRL_PIN(127, "GPIO_127"), 234 PINCTRL_PIN(128, "GPIO_128"), 235 PINCTRL_PIN(129, "GPIO_129"), 236 PINCTRL_PIN(130, "GPIO_130"), 237 PINCTRL_PIN(131, "GPIO_131"), 238 PINCTRL_PIN(132, "GPIO_132"), 239 PINCTRL_PIN(133, "GPIO_133"), 240 PINCTRL_PIN(134, "GPIO_134"), 241 PINCTRL_PIN(135, "GPIO_135"), 242 PINCTRL_PIN(136, "GPIO_136"), 243 PINCTRL_PIN(137, "GPIO_137"), 244 PINCTRL_PIN(138, "GPIO_138"), 245 PINCTRL_PIN(139, "GPIO_139"), 246 PINCTRL_PIN(140, "GPIO_140"), 247 PINCTRL_PIN(141, "GPIO_141"), 248 PINCTRL_PIN(142, "GPIO_142"), 249 PINCTRL_PIN(143, "GPIO_143"), 250 PINCTRL_PIN(144, "GPIO_144"), 251 PINCTRL_PIN(145, "GPIO_145"), 252 PINCTRL_PIN(146, "GPIO_146"), 253 PINCTRL_PIN(147, "GPIO_147"), 254 PINCTRL_PIN(148, "GPIO_148"), 255 PINCTRL_PIN(149, "GPIO_149"), 256 PINCTRL_PIN(150, "GPIO_150"), 257 PINCTRL_PIN(151, "GPIO_151"), 258 PINCTRL_PIN(152, "GPIO_152"), 259 PINCTRL_PIN(153, "GPIO_153"), 260 PINCTRL_PIN(154, "GPIO_154"), 261 PINCTRL_PIN(155, "GPIO_155"), 262 PINCTRL_PIN(156, "GPIO_156"), 263 PINCTRL_PIN(157, "GPIO_157"), 264 PINCTRL_PIN(158, "GPIO_158"), 265 PINCTRL_PIN(159, "GPIO_159"), 266 PINCTRL_PIN(160, "GPIO_160"), 267 PINCTRL_PIN(161, "GPIO_161"), 268 PINCTRL_PIN(162, "GPIO_162"), 269 PINCTRL_PIN(163, "GPIO_163"), 270 PINCTRL_PIN(164, "GPIO_164"), 271 PINCTRL_PIN(165, "GPIO_165"), 272 PINCTRL_PIN(166, "GPIO_166"), 273 PINCTRL_PIN(167, "GPIO_167"), 274 PINCTRL_PIN(168, "GPIO_168"), 275 PINCTRL_PIN(169, "GPIO_169"), 276 PINCTRL_PIN(170, "GPIO_170"), 277 PINCTRL_PIN(171, "GPIO_171"), 278 PINCTRL_PIN(172, "GPIO_172"), 279 PINCTRL_PIN(173, "GPIO_173"), 280 PINCTRL_PIN(174, "GPIO_174"), 281 PINCTRL_PIN(175, "GPIO_175"), 282 PINCTRL_PIN(176, "GPIO_176"), 283 PINCTRL_PIN(177, "GPIO_177"), 284 PINCTRL_PIN(178, "GPIO_178"), 285 PINCTRL_PIN(179, "GPIO_179"), 286 PINCTRL_PIN(180, "GPIO_180"), 287 PINCTRL_PIN(181, "GPIO_181"), 288 PINCTRL_PIN(182, "GPIO_182"), 289 PINCTRL_PIN(183, "GPIO_183"), 290 PINCTRL_PIN(184, "GPIO_184"), 291 PINCTRL_PIN(185, "UFS_RESET"), 292 }; 293 294 #define DECLARE_MSM_GPIO_PINS(pin) \ 295 static const unsigned int gpio##pin##_pins[] = { pin } 296 DECLARE_MSM_GPIO_PINS(0); 297 DECLARE_MSM_GPIO_PINS(1); 298 DECLARE_MSM_GPIO_PINS(2); 299 DECLARE_MSM_GPIO_PINS(3); 300 DECLARE_MSM_GPIO_PINS(4); 301 DECLARE_MSM_GPIO_PINS(5); 302 DECLARE_MSM_GPIO_PINS(6); 303 DECLARE_MSM_GPIO_PINS(7); 304 DECLARE_MSM_GPIO_PINS(8); 305 DECLARE_MSM_GPIO_PINS(9); 306 DECLARE_MSM_GPIO_PINS(10); 307 DECLARE_MSM_GPIO_PINS(11); 308 DECLARE_MSM_GPIO_PINS(12); 309 DECLARE_MSM_GPIO_PINS(13); 310 DECLARE_MSM_GPIO_PINS(14); 311 DECLARE_MSM_GPIO_PINS(15); 312 DECLARE_MSM_GPIO_PINS(16); 313 DECLARE_MSM_GPIO_PINS(17); 314 DECLARE_MSM_GPIO_PINS(18); 315 DECLARE_MSM_GPIO_PINS(19); 316 DECLARE_MSM_GPIO_PINS(20); 317 DECLARE_MSM_GPIO_PINS(21); 318 DECLARE_MSM_GPIO_PINS(22); 319 DECLARE_MSM_GPIO_PINS(23); 320 DECLARE_MSM_GPIO_PINS(24); 321 DECLARE_MSM_GPIO_PINS(25); 322 DECLARE_MSM_GPIO_PINS(26); 323 DECLARE_MSM_GPIO_PINS(27); 324 DECLARE_MSM_GPIO_PINS(28); 325 DECLARE_MSM_GPIO_PINS(29); 326 DECLARE_MSM_GPIO_PINS(30); 327 DECLARE_MSM_GPIO_PINS(31); 328 DECLARE_MSM_GPIO_PINS(32); 329 DECLARE_MSM_GPIO_PINS(33); 330 DECLARE_MSM_GPIO_PINS(34); 331 DECLARE_MSM_GPIO_PINS(35); 332 DECLARE_MSM_GPIO_PINS(36); 333 DECLARE_MSM_GPIO_PINS(37); 334 DECLARE_MSM_GPIO_PINS(38); 335 DECLARE_MSM_GPIO_PINS(39); 336 DECLARE_MSM_GPIO_PINS(40); 337 DECLARE_MSM_GPIO_PINS(41); 338 DECLARE_MSM_GPIO_PINS(42); 339 DECLARE_MSM_GPIO_PINS(43); 340 DECLARE_MSM_GPIO_PINS(44); 341 DECLARE_MSM_GPIO_PINS(45); 342 DECLARE_MSM_GPIO_PINS(46); 343 DECLARE_MSM_GPIO_PINS(47); 344 DECLARE_MSM_GPIO_PINS(48); 345 DECLARE_MSM_GPIO_PINS(49); 346 DECLARE_MSM_GPIO_PINS(50); 347 DECLARE_MSM_GPIO_PINS(51); 348 DECLARE_MSM_GPIO_PINS(52); 349 DECLARE_MSM_GPIO_PINS(53); 350 DECLARE_MSM_GPIO_PINS(54); 351 DECLARE_MSM_GPIO_PINS(55); 352 DECLARE_MSM_GPIO_PINS(56); 353 DECLARE_MSM_GPIO_PINS(57); 354 DECLARE_MSM_GPIO_PINS(58); 355 DECLARE_MSM_GPIO_PINS(59); 356 DECLARE_MSM_GPIO_PINS(60); 357 DECLARE_MSM_GPIO_PINS(61); 358 DECLARE_MSM_GPIO_PINS(62); 359 DECLARE_MSM_GPIO_PINS(63); 360 DECLARE_MSM_GPIO_PINS(64); 361 DECLARE_MSM_GPIO_PINS(65); 362 DECLARE_MSM_GPIO_PINS(66); 363 DECLARE_MSM_GPIO_PINS(67); 364 DECLARE_MSM_GPIO_PINS(68); 365 DECLARE_MSM_GPIO_PINS(69); 366 DECLARE_MSM_GPIO_PINS(70); 367 DECLARE_MSM_GPIO_PINS(71); 368 DECLARE_MSM_GPIO_PINS(72); 369 DECLARE_MSM_GPIO_PINS(73); 370 DECLARE_MSM_GPIO_PINS(74); 371 DECLARE_MSM_GPIO_PINS(75); 372 DECLARE_MSM_GPIO_PINS(76); 373 DECLARE_MSM_GPIO_PINS(77); 374 DECLARE_MSM_GPIO_PINS(78); 375 DECLARE_MSM_GPIO_PINS(79); 376 DECLARE_MSM_GPIO_PINS(80); 377 DECLARE_MSM_GPIO_PINS(81); 378 DECLARE_MSM_GPIO_PINS(82); 379 DECLARE_MSM_GPIO_PINS(83); 380 DECLARE_MSM_GPIO_PINS(84); 381 DECLARE_MSM_GPIO_PINS(85); 382 DECLARE_MSM_GPIO_PINS(86); 383 DECLARE_MSM_GPIO_PINS(87); 384 DECLARE_MSM_GPIO_PINS(88); 385 DECLARE_MSM_GPIO_PINS(89); 386 DECLARE_MSM_GPIO_PINS(90); 387 DECLARE_MSM_GPIO_PINS(91); 388 DECLARE_MSM_GPIO_PINS(92); 389 DECLARE_MSM_GPIO_PINS(93); 390 DECLARE_MSM_GPIO_PINS(94); 391 DECLARE_MSM_GPIO_PINS(95); 392 DECLARE_MSM_GPIO_PINS(96); 393 DECLARE_MSM_GPIO_PINS(97); 394 DECLARE_MSM_GPIO_PINS(98); 395 DECLARE_MSM_GPIO_PINS(99); 396 DECLARE_MSM_GPIO_PINS(100); 397 DECLARE_MSM_GPIO_PINS(101); 398 DECLARE_MSM_GPIO_PINS(102); 399 DECLARE_MSM_GPIO_PINS(103); 400 DECLARE_MSM_GPIO_PINS(104); 401 DECLARE_MSM_GPIO_PINS(105); 402 DECLARE_MSM_GPIO_PINS(106); 403 DECLARE_MSM_GPIO_PINS(107); 404 DECLARE_MSM_GPIO_PINS(108); 405 DECLARE_MSM_GPIO_PINS(109); 406 DECLARE_MSM_GPIO_PINS(110); 407 DECLARE_MSM_GPIO_PINS(111); 408 DECLARE_MSM_GPIO_PINS(112); 409 DECLARE_MSM_GPIO_PINS(113); 410 DECLARE_MSM_GPIO_PINS(114); 411 DECLARE_MSM_GPIO_PINS(115); 412 DECLARE_MSM_GPIO_PINS(116); 413 DECLARE_MSM_GPIO_PINS(117); 414 DECLARE_MSM_GPIO_PINS(118); 415 DECLARE_MSM_GPIO_PINS(119); 416 DECLARE_MSM_GPIO_PINS(120); 417 DECLARE_MSM_GPIO_PINS(121); 418 DECLARE_MSM_GPIO_PINS(122); 419 DECLARE_MSM_GPIO_PINS(123); 420 DECLARE_MSM_GPIO_PINS(124); 421 DECLARE_MSM_GPIO_PINS(125); 422 DECLARE_MSM_GPIO_PINS(126); 423 DECLARE_MSM_GPIO_PINS(127); 424 DECLARE_MSM_GPIO_PINS(128); 425 DECLARE_MSM_GPIO_PINS(129); 426 DECLARE_MSM_GPIO_PINS(130); 427 DECLARE_MSM_GPIO_PINS(131); 428 DECLARE_MSM_GPIO_PINS(132); 429 DECLARE_MSM_GPIO_PINS(133); 430 DECLARE_MSM_GPIO_PINS(134); 431 DECLARE_MSM_GPIO_PINS(135); 432 DECLARE_MSM_GPIO_PINS(136); 433 DECLARE_MSM_GPIO_PINS(137); 434 DECLARE_MSM_GPIO_PINS(138); 435 DECLARE_MSM_GPIO_PINS(139); 436 DECLARE_MSM_GPIO_PINS(140); 437 DECLARE_MSM_GPIO_PINS(141); 438 DECLARE_MSM_GPIO_PINS(142); 439 DECLARE_MSM_GPIO_PINS(143); 440 DECLARE_MSM_GPIO_PINS(144); 441 DECLARE_MSM_GPIO_PINS(145); 442 DECLARE_MSM_GPIO_PINS(146); 443 DECLARE_MSM_GPIO_PINS(147); 444 DECLARE_MSM_GPIO_PINS(148); 445 DECLARE_MSM_GPIO_PINS(149); 446 DECLARE_MSM_GPIO_PINS(150); 447 DECLARE_MSM_GPIO_PINS(151); 448 DECLARE_MSM_GPIO_PINS(152); 449 DECLARE_MSM_GPIO_PINS(153); 450 DECLARE_MSM_GPIO_PINS(154); 451 DECLARE_MSM_GPIO_PINS(155); 452 DECLARE_MSM_GPIO_PINS(156); 453 DECLARE_MSM_GPIO_PINS(157); 454 DECLARE_MSM_GPIO_PINS(158); 455 DECLARE_MSM_GPIO_PINS(159); 456 DECLARE_MSM_GPIO_PINS(160); 457 DECLARE_MSM_GPIO_PINS(161); 458 DECLARE_MSM_GPIO_PINS(162); 459 DECLARE_MSM_GPIO_PINS(163); 460 DECLARE_MSM_GPIO_PINS(164); 461 DECLARE_MSM_GPIO_PINS(165); 462 DECLARE_MSM_GPIO_PINS(166); 463 DECLARE_MSM_GPIO_PINS(167); 464 DECLARE_MSM_GPIO_PINS(168); 465 DECLARE_MSM_GPIO_PINS(169); 466 DECLARE_MSM_GPIO_PINS(170); 467 DECLARE_MSM_GPIO_PINS(171); 468 DECLARE_MSM_GPIO_PINS(172); 469 DECLARE_MSM_GPIO_PINS(173); 470 DECLARE_MSM_GPIO_PINS(174); 471 DECLARE_MSM_GPIO_PINS(175); 472 DECLARE_MSM_GPIO_PINS(176); 473 DECLARE_MSM_GPIO_PINS(177); 474 DECLARE_MSM_GPIO_PINS(178); 475 DECLARE_MSM_GPIO_PINS(179); 476 DECLARE_MSM_GPIO_PINS(180); 477 DECLARE_MSM_GPIO_PINS(181); 478 DECLARE_MSM_GPIO_PINS(182); 479 DECLARE_MSM_GPIO_PINS(183); 480 DECLARE_MSM_GPIO_PINS(184); 481 482 static const unsigned int ufs_reset_pins[] = { 185 }; 483 484 enum eliza_functions { 485 msm_mux_gpio, 486 msm_mux_aoss_cti, 487 msm_mux_atest_char, 488 msm_mux_atest_usb, 489 msm_mux_audio_ext_mclk0, 490 msm_mux_audio_ref_clk, 491 msm_mux_cam_mclk, 492 msm_mux_cci_async_in, 493 msm_mux_cci_i2c_scl, 494 msm_mux_cci_i2c_sda, 495 msm_mux_cci_timer, 496 msm_mux_coex_uart1_rx, 497 msm_mux_coex_uart1_tx, 498 msm_mux_coex_uart2_rx, 499 msm_mux_coex_uart2_tx, 500 msm_mux_dbg_out_clk, 501 msm_mux_ddr_bist_complete, 502 msm_mux_ddr_bist_fail, 503 msm_mux_ddr_bist_start, 504 msm_mux_ddr_bist_stop, 505 msm_mux_ddr_pxi0, 506 msm_mux_ddr_pxi1, 507 msm_mux_dp0_hot, 508 msm_mux_egpio, 509 msm_mux_gcc_gp1, 510 msm_mux_gcc_gp2, 511 msm_mux_gcc_gp3, 512 msm_mux_gnss_adc0, 513 msm_mux_gnss_adc1, 514 msm_mux_hdmi_ddc_scl, 515 msm_mux_hdmi_ddc_sda, 516 msm_mux_hdmi_dtest0, 517 msm_mux_hdmi_dtest1, 518 msm_mux_hdmi_hot_plug, 519 msm_mux_hdmi_pixel_clk, 520 msm_mux_hdmi_rcv_det, 521 msm_mux_hdmi_tx_cec, 522 msm_mux_host2wlan_sol, 523 msm_mux_i2s0_data0, 524 msm_mux_i2s0_data1, 525 msm_mux_i2s0_sck, 526 msm_mux_i2s0_ws, 527 msm_mux_ibi_i3c, 528 msm_mux_jitter_bist, 529 msm_mux_mdp_esync0_out, 530 msm_mux_mdp_esync1_out, 531 msm_mux_mdp_vsync, 532 msm_mux_mdp_vsync0_out, 533 msm_mux_mdp_vsync11_out, 534 msm_mux_mdp_vsync1_out, 535 msm_mux_mdp_vsync2_out, 536 msm_mux_mdp_vsync3_out, 537 msm_mux_mdp_vsync_e, 538 msm_mux_nav_gpio0, 539 msm_mux_nav_gpio1, 540 msm_mux_nav_gpio2, 541 msm_mux_nav_gpio3, 542 msm_mux_pcie0_clk_req_n, 543 msm_mux_pcie1_clk_req_n, 544 msm_mux_phase_flag, 545 msm_mux_pll_bist_sync, 546 msm_mux_pll_clk_aux, 547 msm_mux_prng_rosc0, 548 msm_mux_prng_rosc1, 549 msm_mux_prng_rosc2, 550 msm_mux_prng_rosc3, 551 msm_mux_qdss_cti, 552 msm_mux_qdss_gpio_traceclk, 553 msm_mux_qdss_gpio_tracectl, 554 msm_mux_qdss_gpio_tracedata, 555 msm_mux_qlink_big_enable, 556 msm_mux_qlink_big_request, 557 msm_mux_qlink_little_enable, 558 msm_mux_qlink_little_request, 559 msm_mux_qlink_wmss, 560 msm_mux_qspi0, 561 msm_mux_qspi_clk, 562 msm_mux_qspi_cs, 563 msm_mux_qup1_se0, 564 msm_mux_qup1_se1, 565 msm_mux_qup1_se2, 566 msm_mux_qup1_se3, 567 msm_mux_qup1_se4, 568 msm_mux_qup1_se5, 569 msm_mux_qup1_se6, 570 msm_mux_qup1_se7, 571 msm_mux_qup2_se0, 572 msm_mux_qup2_se1, 573 msm_mux_qup2_se2, 574 msm_mux_qup2_se3, 575 msm_mux_qup2_se4, 576 msm_mux_qup2_se5, 577 msm_mux_qup2_se6, 578 msm_mux_qup2_se7, 579 msm_mux_resout_gpio, 580 msm_mux_sd_write_protect, 581 msm_mux_sdc1, 582 msm_mux_sdc2, 583 msm_mux_sdc2_fb_clk, 584 msm_mux_tb_trig_sdc1, 585 msm_mux_tb_trig_sdc2, 586 msm_mux_tmess_prng0, 587 msm_mux_tmess_prng1, 588 msm_mux_tmess_prng2, 589 msm_mux_tmess_prng3, 590 msm_mux_tsense_pwm1, 591 msm_mux_tsense_pwm2, 592 msm_mux_tsense_pwm3, 593 msm_mux_tsense_pwm4, 594 msm_mux_uim0_clk, 595 msm_mux_uim0_data, 596 msm_mux_uim0_present, 597 msm_mux_uim0_reset, 598 msm_mux_uim1_clk, 599 msm_mux_uim1_data, 600 msm_mux_uim1_present, 601 msm_mux_uim1_reset, 602 msm_mux_usb0_hs, 603 msm_mux_usb_phy, 604 msm_mux_vfr_0, 605 msm_mux_vfr_1, 606 msm_mux_vsense_trigger_mirnat, 607 msm_mux_wcn_sw_ctrl, 608 msm_mux__, 609 }; 610 611 static const char *const gpio_groups[] = { 612 "gpio0", "gpio1", "gpio2", "gpio3", "gpio4", "gpio5", 613 "gpio6", "gpio7", "gpio8", "gpio9", "gpio10", "gpio11", 614 "gpio12", "gpio13", "gpio16", "gpio17", "gpio18", "gpio19", 615 "gpio20", "gpio21", "gpio22", "gpio23", "gpio26", "gpio27", 616 "gpio28", "gpio29", "gpio30", "gpio31", "gpio32", "gpio33", 617 "gpio34", "gpio35", "gpio36", "gpio37", "gpio38", "gpio39", 618 "gpio40", "gpio42", "gpio44", "gpio45", "gpio46", "gpio47", 619 "gpio48", "gpio49", "gpio50", "gpio51", "gpio52", "gpio53", 620 "gpio54", "gpio55", "gpio56", "gpio57", "gpio58", "gpio59", 621 "gpio60", "gpio61", "gpio62", "gpio63", "gpio64", "gpio65", 622 "gpio66", "gpio67", "gpio68", "gpio69", "gpio70", "gpio71", 623 "gpio72", "gpio73", "gpio74", "gpio75", "gpio76", "gpio77", 624 "gpio78", "gpio79", "gpio80", "gpio81", "gpio82", "gpio84", 625 "gpio85", "gpio86", "gpio87", "gpio88", "gpio89", "gpio90", 626 "gpio91", "gpio92", "gpio93", "gpio94", "gpio95", "gpio96", 627 "gpio97", "gpio98", "gpio99", "gpio100", "gpio101", "gpio102", 628 "gpio103", "gpio104", "gpio105", "gpio106", "gpio107", "gpio108", 629 "gpio109", "gpio110", "gpio111", "gpio112", "gpio113", "gpio114", 630 "gpio115", "gpio116", "gpio117", "gpio118", "gpio119", "gpio120", 631 "gpio121", "gpio122", "gpio123", "gpio124", "gpio125", "gpio126", 632 "gpio127", "gpio128", "gpio129", "gpio130", "gpio131", "gpio132", 633 "gpio133", "gpio134", "gpio135", "gpio138", "gpio139", "gpio140", 634 "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", "gpio146", 635 "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", "gpio152", 636 "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", "gpio158", 637 "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", "gpio164", 638 "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", "gpio170", 639 "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", "gpio176", 640 "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", "gpio182", 641 "gpio184", 642 }; 643 644 static const char *const aoss_cti_groups[] = { 645 "gpio0", "gpio1", "gpio26", "gpio27", 646 }; 647 648 static const char *const atest_char_groups[] = { 649 "gpio71", "gpio70", "gpio72", "gpio74", "gpio73", 650 }; 651 652 static const char *const atest_usb_groups[] = { 653 "gpio55", "gpio54", 654 }; 655 656 static const char *const audio_ext_mclk0_groups[] = { 657 "gpio69", 658 }; 659 660 static const char *const audio_ref_clk_groups[] = { 661 "gpio32", 662 }; 663 664 static const char *const cam_mclk_groups[] = { 665 "gpio65", "gpio66", "gpio67", "gpio68", "gpio69", 666 }; 667 668 static const char *const cci_async_in_groups[] = { 669 "gpio115", "gpio31", "gpio30", 670 }; 671 672 static const char *const cci_i2c_scl_groups[] = { 673 "gpio71", "gpio73", "gpio75", "gpio77", 674 }; 675 676 static const char *const cci_i2c_sda_groups[] = { 677 "gpio70", "gpio72", "gpio74", "gpio76", 678 }; 679 680 static const char *const cci_timer_groups[] = { 681 "gpio76", "gpio63", "gpio125", "gpio126", "gpio127", 682 }; 683 684 static const char *const coex_uart1_rx_groups[] = { 685 "gpio112", 686 }; 687 688 static const char *const coex_uart1_tx_groups[] = { 689 "gpio111", 690 }; 691 692 static const char *const coex_uart2_rx_groups[] = { 693 "gpio116", 694 }; 695 696 static const char *const coex_uart2_tx_groups[] = { 697 "gpio100", 698 }; 699 700 static const char *const dbg_out_clk_groups[] = { 701 "gpio81", 702 }; 703 704 static const char *const ddr_bist_complete_groups[] = { 705 "gpio52", 706 }; 707 708 static const char *const ddr_bist_fail_groups[] = { 709 "gpio147", 710 }; 711 712 static const char *const ddr_bist_start_groups[] = { 713 "gpio34", 714 }; 715 716 static const char *const ddr_bist_stop_groups[] = { 717 "gpio53", 718 }; 719 720 static const char *const ddr_pxi0_groups[] = { 721 "gpio54", "gpio55", 722 }; 723 724 static const char *const ddr_pxi1_groups[] = { 725 "gpio40", "gpio42", 726 }; 727 728 static const char *const dp0_hot_groups[] = { 729 "gpio55", 730 }; 731 732 static const char *const egpio_groups[] = { 733 "gpio28", "gpio29", "gpio30", "gpio31", "gpio138", "gpio139", 734 "gpio140", "gpio141", "gpio142", "gpio143", "gpio144", "gpio145", 735 "gpio146", "gpio147", "gpio148", "gpio149", "gpio150", "gpio151", 736 "gpio152", "gpio153", "gpio154", "gpio155", "gpio156", "gpio157", 737 "gpio158", "gpio159", "gpio160", "gpio161", "gpio162", "gpio163", 738 "gpio164", "gpio165", "gpio166", "gpio167", "gpio168", "gpio169", 739 "gpio170", "gpio171", "gpio172", "gpio173", "gpio174", "gpio175", 740 "gpio176", "gpio177", "gpio178", "gpio179", "gpio180", "gpio181", 741 "gpio182", "gpio184", 742 }; 743 744 static const char *const gcc_gp1_groups[] = { 745 "gpio27", "gpio53", 746 }; 747 748 static const char *const gcc_gp2_groups[] = { 749 "gpio32", "gpio35", 750 }; 751 752 static const char *const gcc_gp3_groups[] = { 753 "gpio30", "gpio33", 754 }; 755 756 static const char *const gnss_adc0_groups[] = { 757 "gpio42", "gpio55", 758 }; 759 760 static const char *const gnss_adc1_groups[] = { 761 "gpio40", "gpio54", 762 }; 763 764 static const char *const hdmi_ddc_scl_groups[] = { 765 "gpio6", 766 }; 767 768 static const char *const hdmi_ddc_sda_groups[] = { 769 "gpio7", 770 }; 771 772 static const char *const hdmi_dtest0_groups[] = { 773 "gpio132", 774 }; 775 776 static const char *const hdmi_dtest1_groups[] = { 777 "gpio133", 778 }; 779 780 static const char *const hdmi_hot_plug_groups[] = { 781 "gpio47", 782 }; 783 784 static const char *const hdmi_pixel_clk_groups[] = { 785 "gpio18", 786 }; 787 788 static const char *const hdmi_rcv_det_groups[] = { 789 "gpio19", 790 }; 791 792 static const char *const hdmi_tx_cec_groups[] = { 793 "gpio46", 794 }; 795 796 static const char *const host2wlan_sol_groups[] = { 797 "gpio33", 798 }; 799 800 static const char *const i2s0_data0_groups[] = { 801 "gpio64", 802 }; 803 804 static const char *const i2s0_data1_groups[] = { 805 "gpio63", 806 }; 807 808 static const char *const i2s0_sck_groups[] = { 809 "gpio60", 810 }; 811 812 static const char *const i2s0_ws_groups[] = { 813 "gpio61", 814 }; 815 816 static const char *const ibi_i3c_groups[] = { 817 "gpio0", "gpio1", "gpio4", "gpio5", "gpio12", "gpio13", 818 "gpio28", "gpio29", "gpio32", "gpio33", "gpio36", "gpio37", 819 }; 820 821 static const char *const jitter_bist_groups[] = { 822 "gpio77", 823 }; 824 825 static const char *const mdp_esync0_out_groups[] = { 826 "gpio13", 827 }; 828 829 static const char *const mdp_esync1_out_groups[] = { 830 "gpio12", 831 }; 832 833 static const char *const mdp_vsync_groups[] = { 834 "gpio16", "gpio17", "gpio79", "gpio100", "gpio120", "gpio121", 835 }; 836 837 static const char *const mdp_vsync0_out_groups[] = { 838 "gpio17", 839 }; 840 841 static const char *const mdp_vsync11_out_groups[] = { 842 "gpio27", 843 }; 844 845 static const char *const mdp_vsync1_out_groups[] = { 846 "gpio17", 847 }; 848 849 static const char *const mdp_vsync2_out_groups[] = { 850 "gpio16", 851 }; 852 853 static const char *const mdp_vsync3_out_groups[] = { 854 "gpio16", 855 }; 856 857 static const char *const mdp_vsync_e_groups[] = { 858 "gpio13", 859 }; 860 861 static const char *const nav_gpio0_groups[] = { 862 "gpio119", 863 }; 864 865 static const char *const nav_gpio1_groups[] = { 866 "gpio117", 867 }; 868 869 static const char *const nav_gpio2_groups[] = { 870 "gpio118", 871 }; 872 873 static const char *const nav_gpio3_groups[] = { 874 "gpio113", 875 }; 876 877 static const char *const pcie0_clk_req_n_groups[] = { 878 "gpio80", 879 }; 880 881 static const char *const pcie1_clk_req_n_groups[] = { 882 "gpio52", 883 }; 884 885 static const char *const phase_flag_groups[] = { 886 "gpio71", "gpio70", "gpio174", "gpio175", "gpio172", "gpio171", 887 "gpio170", "gpio169", "gpio168", "gpio167", "gpio166", "gpio165", 888 "gpio182", "gpio164", "gpio163", "gpio162", "gpio161", "gpio160", 889 "gpio159", "gpio158", "gpio157", "gpio80", "gpio78", "gpio181", 890 "gpio76", "gpio75", "gpio180", "gpio179", "gpio178", "gpio177", 891 "gpio176", "gpio173", 892 }; 893 894 static const char *const pll_bist_sync_groups[] = { 895 "gpio184", 896 }; 897 898 static const char *const pll_clk_aux_groups[] = { 899 "gpio135", 900 }; 901 902 static const char *const prng_rosc0_groups[] = { 903 "gpio67", 904 }; 905 906 static const char *const prng_rosc1_groups[] = { 907 "gpio69", 908 }; 909 910 static const char *const prng_rosc2_groups[] = { 911 "gpio76", 912 }; 913 914 static const char *const prng_rosc3_groups[] = { 915 "gpio74", 916 }; 917 918 static const char *const qdss_cti_groups[] = { 919 "gpio18", "gpio19", "gpio32", "gpio73", 920 "gpio74", "gpio154", "gpio176", "gpio184", 921 }; 922 923 static const char *const qdss_gpio_traceclk_groups[] = { 924 "gpio54", "gpio147", 925 }; 926 927 static const char *const qdss_gpio_tracectl_groups[] = { 928 "gpio72", "gpio144", 929 }; 930 931 static const char *const qdss_gpio_tracedata_groups[] = { 932 "gpio30", "gpio31", "gpio34", "gpio35", "gpio40", "gpio42", 933 "gpio52", "gpio53", "gpio65", "gpio66", "gpio67", "gpio114", 934 "gpio132", "gpio133", "gpio134", "gpio135", "gpio145", "gpio146", 935 "gpio155", "gpio156", "gpio163", "gpio164", "gpio167", "gpio168", 936 "gpio169", "gpio170", "gpio178", "gpio179", "gpio180", "gpio181", 937 "gpio182", 938 }; 939 940 static const char *const qlink_big_enable_groups[] = { 941 "gpio96", 942 }; 943 944 static const char *const qlink_big_request_groups[] = { 945 "gpio95", 946 }; 947 948 static const char *const qlink_little_enable_groups[] = { 949 "gpio93", 950 }; 951 952 static const char *const qlink_little_request_groups[] = { 953 "gpio92", 954 }; 955 956 static const char *const qlink_wmss_groups[] = { 957 "gpio94", 958 }; 959 960 static const char *const qspi0_groups[] = { 961 "gpio79", "gpio116", "gpio115", "gpio97", "gpio98", 962 }; 963 964 static const char *const qspi_clk_groups[] = { 965 "gpio99", 966 }; 967 968 static const char *const qspi_cs_groups[] = { 969 "gpio100", 970 }; 971 972 static const char *const qup1_se0_groups[] = { 973 "gpio28", "gpio29", "gpio30", "gpio31", 974 }; 975 976 static const char *const qup1_se1_groups[] = { 977 "gpio32", "gpio33", "gpio34", "gpio35", 978 }; 979 980 static const char *const qup1_se2_groups[] = { 981 "gpio52", "gpio53", "gpio54", "gpio52", "gpio55", "gpio53", "gpio40", "gpio42", "gpio30", 982 }; 983 984 static const char *const qup1_se3_groups[] = { 985 "gpio44", "gpio45", "gpio46", "gpio47", 986 }; 987 988 static const char *const qup1_se4_groups[] = { 989 "gpio36", "gpio37", "gpio37", "gpio36", 990 }; 991 992 static const char *const qup1_se5_groups[] = { 993 "gpio132", "gpio133", "gpio134", "gpio135", "gpio34", "gpio35", 994 }; 995 996 static const char *const qup1_se6_groups[] = { 997 "gpio40", "gpio42", "gpio54", "gpio42", "gpio40", "gpio55", 998 }; 999 1000 static const char *const qup1_se7_groups[] = { 1001 "gpio81", "gpio78", "gpio80", "gpio114", "gpio114", "gpio78", 1002 }; 1003 1004 static const char *const qup2_se0_groups[] = { 1005 "gpio0", "gpio1", "gpio2", "gpio3", 1006 }; 1007 1008 static const char *const qup2_se1_groups[] = { 1009 "gpio4", "gpio5", "gpio6", "gpio7", 1010 }; 1011 1012 static const char *const qup2_se2_groups[] = { 1013 "gpio8", "gpio9", "gpio10", "gpio11", "gpio16", "gpio17", "gpio18", 1014 }; 1015 1016 static const char *const qup2_se3_groups[] = { 1017 "gpio79", "gpio116", "gpio97", "gpio100", "gpio100", "gpio116", 1018 }; 1019 1020 static const char *const qup2_se4_groups[] = { 1021 "gpio12", "gpio13", "gpio26", "gpio27", 1022 }; 1023 1024 static const char *const qup2_se5_groups[] = { 1025 "gpio16", "gpio17", "gpio18", "gpio19", 1026 }; 1027 1028 static const char *const qup2_se6_groups[] = { 1029 "gpio20", "gpio21", "gpio22", "gpio23", 1030 }; 1031 1032 static const char *const qup2_se7_groups[] = { 1033 "gpio27", "gpio26", "gpio13", "gpio12", 1034 }; 1035 1036 static const char *const resout_gpio_groups[] = { 1037 "gpio63", 1038 "gpio69", 1039 "gpio175", 1040 }; 1041 1042 static const char *const sd_write_protect_groups[] = { 1043 "gpio57", 1044 }; 1045 1046 static const char *const sdc1_groups[] = { 1047 "gpio121", "gpio123", "gpio124", "gpio125", 1048 "gpio126", "gpio127", "gpio128", "gpio129", 1049 "gpio130", "gpio131", "gpio120", 1050 }; 1051 1052 static const char *const sdc2_groups[] = { 1053 "gpio38", "gpio39", "gpio48", "gpio49", 1054 "gpio51", "gpio62", 1055 }; 1056 1057 static const char *const sdc2_fb_clk_groups[] = { 1058 "gpio50", 1059 }; 1060 1061 static const char *const tb_trig_sdc1_groups[] = { 1062 "gpio34", 1063 }; 1064 1065 static const char *const tb_trig_sdc2_groups[] = { 1066 "gpio35", 1067 }; 1068 1069 static const char *const tmess_prng0_groups[] = { 1070 "gpio73", 1071 }; 1072 1073 static const char *const tmess_prng1_groups[] = { 1074 "gpio72", 1075 }; 1076 1077 static const char *const tmess_prng2_groups[] = { 1078 "gpio70", 1079 }; 1080 1081 static const char *const tmess_prng3_groups[] = { 1082 "gpio71", 1083 }; 1084 1085 static const char *const tsense_pwm1_groups[] = { 1086 "gpio56", 1087 }; 1088 1089 static const char *const tsense_pwm2_groups[] = { 1090 "gpio56", 1091 }; 1092 1093 static const char *const tsense_pwm3_groups[] = { 1094 "gpio56", 1095 }; 1096 1097 static const char *const tsense_pwm4_groups[] = { 1098 "gpio56", 1099 }; 1100 1101 static const char *const uim0_clk_groups[] = { 1102 "gpio85", 1103 }; 1104 1105 static const char *const uim0_data_groups[] = { 1106 "gpio84", 1107 }; 1108 1109 static const char *const uim0_present_groups[] = { 1110 "gpio87", 1111 }; 1112 1113 static const char *const uim0_reset_groups[] = { 1114 "gpio86", 1115 }; 1116 1117 static const char *const uim1_clk_groups[] = { 1118 "gpio98", "gpio89", 1119 }; 1120 1121 static const char *const uim1_data_groups[] = { 1122 "gpio97", "gpio88", 1123 }; 1124 1125 static const char *const uim1_present_groups[] = { 1126 "gpio100", "gpio91", 1127 }; 1128 1129 static const char *const uim1_reset_groups[] = { 1130 "gpio99", "gpio90", 1131 }; 1132 1133 static const char *const usb0_hs_groups[] = { 1134 "gpio56", 1135 }; 1136 1137 static const char *const usb_phy_groups[] = { 1138 "gpio122", 1139 }; 1140 1141 static const char *const vfr_0_groups[] = { 1142 "gpio63", 1143 }; 1144 1145 static const char *const vfr_1_groups[] = { 1146 "gpio117", 1147 }; 1148 1149 static const char *const vsense_trigger_mirnat_groups[] = { 1150 "gpio52", 1151 }; 1152 1153 static const char *const wcn_sw_ctrl_groups[] = { 1154 "gpio81", 1155 }; 1156 1157 static const struct pinfunction eliza_functions[] = { 1158 MSM_GPIO_PIN_FUNCTION(gpio), 1159 MSM_PIN_FUNCTION(aoss_cti), 1160 MSM_PIN_FUNCTION(atest_char), 1161 MSM_PIN_FUNCTION(atest_usb), 1162 MSM_PIN_FUNCTION(audio_ext_mclk0), 1163 MSM_PIN_FUNCTION(audio_ref_clk), 1164 MSM_PIN_FUNCTION(cam_mclk), 1165 MSM_PIN_FUNCTION(cci_async_in), 1166 MSM_PIN_FUNCTION(cci_i2c_scl), 1167 MSM_PIN_FUNCTION(cci_i2c_sda), 1168 MSM_PIN_FUNCTION(cci_timer), 1169 MSM_PIN_FUNCTION(coex_uart1_rx), 1170 MSM_PIN_FUNCTION(coex_uart1_tx), 1171 MSM_PIN_FUNCTION(coex_uart2_rx), 1172 MSM_PIN_FUNCTION(coex_uart2_tx), 1173 MSM_PIN_FUNCTION(dbg_out_clk), 1174 MSM_PIN_FUNCTION(ddr_bist_complete), 1175 MSM_PIN_FUNCTION(ddr_bist_fail), 1176 MSM_PIN_FUNCTION(ddr_bist_start), 1177 MSM_PIN_FUNCTION(ddr_bist_stop), 1178 MSM_PIN_FUNCTION(ddr_pxi0), 1179 MSM_PIN_FUNCTION(ddr_pxi1), 1180 MSM_PIN_FUNCTION(dp0_hot), 1181 MSM_PIN_FUNCTION(egpio), 1182 MSM_PIN_FUNCTION(gcc_gp1), 1183 MSM_PIN_FUNCTION(gcc_gp2), 1184 MSM_PIN_FUNCTION(gcc_gp3), 1185 MSM_PIN_FUNCTION(gnss_adc0), 1186 MSM_PIN_FUNCTION(gnss_adc1), 1187 MSM_PIN_FUNCTION(hdmi_ddc_scl), 1188 MSM_PIN_FUNCTION(hdmi_ddc_sda), 1189 MSM_PIN_FUNCTION(hdmi_dtest0), 1190 MSM_PIN_FUNCTION(hdmi_dtest1), 1191 MSM_PIN_FUNCTION(hdmi_hot_plug), 1192 MSM_PIN_FUNCTION(hdmi_pixel_clk), 1193 MSM_PIN_FUNCTION(hdmi_rcv_det), 1194 MSM_PIN_FUNCTION(hdmi_tx_cec), 1195 MSM_PIN_FUNCTION(host2wlan_sol), 1196 MSM_PIN_FUNCTION(i2s0_data0), 1197 MSM_PIN_FUNCTION(i2s0_data1), 1198 MSM_PIN_FUNCTION(i2s0_sck), 1199 MSM_PIN_FUNCTION(i2s0_ws), 1200 MSM_PIN_FUNCTION(ibi_i3c), 1201 MSM_PIN_FUNCTION(jitter_bist), 1202 MSM_PIN_FUNCTION(mdp_esync0_out), 1203 MSM_PIN_FUNCTION(mdp_esync1_out), 1204 MSM_PIN_FUNCTION(mdp_vsync), 1205 MSM_PIN_FUNCTION(mdp_vsync0_out), 1206 MSM_PIN_FUNCTION(mdp_vsync11_out), 1207 MSM_PIN_FUNCTION(mdp_vsync1_out), 1208 MSM_PIN_FUNCTION(mdp_vsync2_out), 1209 MSM_PIN_FUNCTION(mdp_vsync3_out), 1210 MSM_PIN_FUNCTION(mdp_vsync_e), 1211 MSM_PIN_FUNCTION(nav_gpio0), 1212 MSM_PIN_FUNCTION(nav_gpio1), 1213 MSM_PIN_FUNCTION(nav_gpio2), 1214 MSM_PIN_FUNCTION(nav_gpio3), 1215 MSM_PIN_FUNCTION(pcie0_clk_req_n), 1216 MSM_PIN_FUNCTION(pcie1_clk_req_n), 1217 MSM_PIN_FUNCTION(phase_flag), 1218 MSM_PIN_FUNCTION(pll_bist_sync), 1219 MSM_PIN_FUNCTION(pll_clk_aux), 1220 MSM_PIN_FUNCTION(prng_rosc0), 1221 MSM_PIN_FUNCTION(prng_rosc1), 1222 MSM_PIN_FUNCTION(prng_rosc2), 1223 MSM_PIN_FUNCTION(prng_rosc3), 1224 MSM_PIN_FUNCTION(qdss_cti), 1225 MSM_PIN_FUNCTION(qdss_gpio_traceclk), 1226 MSM_PIN_FUNCTION(qdss_gpio_tracectl), 1227 MSM_PIN_FUNCTION(qdss_gpio_tracedata), 1228 MSM_PIN_FUNCTION(qlink_big_enable), 1229 MSM_PIN_FUNCTION(qlink_big_request), 1230 MSM_PIN_FUNCTION(qlink_little_enable), 1231 MSM_PIN_FUNCTION(qlink_little_request), 1232 MSM_PIN_FUNCTION(qlink_wmss), 1233 MSM_PIN_FUNCTION(qspi0), 1234 MSM_PIN_FUNCTION(qspi_clk), 1235 MSM_PIN_FUNCTION(qspi_cs), 1236 MSM_PIN_FUNCTION(qup1_se0), 1237 MSM_PIN_FUNCTION(qup1_se1), 1238 MSM_PIN_FUNCTION(qup1_se2), 1239 MSM_PIN_FUNCTION(qup1_se3), 1240 MSM_PIN_FUNCTION(qup1_se4), 1241 MSM_PIN_FUNCTION(qup1_se5), 1242 MSM_PIN_FUNCTION(qup1_se6), 1243 MSM_PIN_FUNCTION(qup1_se7), 1244 MSM_PIN_FUNCTION(qup2_se0), 1245 MSM_PIN_FUNCTION(qup2_se1), 1246 MSM_PIN_FUNCTION(qup2_se2), 1247 MSM_PIN_FUNCTION(qup2_se3), 1248 MSM_PIN_FUNCTION(qup2_se4), 1249 MSM_PIN_FUNCTION(qup2_se5), 1250 MSM_PIN_FUNCTION(qup2_se6), 1251 MSM_PIN_FUNCTION(qup2_se7), 1252 MSM_PIN_FUNCTION(resout_gpio), 1253 MSM_PIN_FUNCTION(sd_write_protect), 1254 MSM_PIN_FUNCTION(sdc1), 1255 MSM_PIN_FUNCTION(sdc2), 1256 MSM_PIN_FUNCTION(sdc2_fb_clk), 1257 MSM_PIN_FUNCTION(tb_trig_sdc1), 1258 MSM_PIN_FUNCTION(tb_trig_sdc2), 1259 MSM_PIN_FUNCTION(tmess_prng0), 1260 MSM_PIN_FUNCTION(tmess_prng1), 1261 MSM_PIN_FUNCTION(tmess_prng2), 1262 MSM_PIN_FUNCTION(tmess_prng3), 1263 MSM_PIN_FUNCTION(tsense_pwm1), 1264 MSM_PIN_FUNCTION(tsense_pwm2), 1265 MSM_PIN_FUNCTION(tsense_pwm3), 1266 MSM_PIN_FUNCTION(tsense_pwm4), 1267 MSM_PIN_FUNCTION(uim0_clk), 1268 MSM_PIN_FUNCTION(uim0_data), 1269 MSM_PIN_FUNCTION(uim0_present), 1270 MSM_PIN_FUNCTION(uim0_reset), 1271 MSM_PIN_FUNCTION(uim1_clk), 1272 MSM_PIN_FUNCTION(uim1_data), 1273 MSM_PIN_FUNCTION(uim1_present), 1274 MSM_PIN_FUNCTION(uim1_reset), 1275 MSM_PIN_FUNCTION(usb0_hs), 1276 MSM_PIN_FUNCTION(usb_phy), 1277 MSM_PIN_FUNCTION(vfr_0), 1278 MSM_PIN_FUNCTION(vfr_1), 1279 MSM_PIN_FUNCTION(vsense_trigger_mirnat), 1280 MSM_PIN_FUNCTION(wcn_sw_ctrl), 1281 }; 1282 1283 /* Every pin is maintained as a single group, and missing or non-existing pin 1284 * would be maintained as dummy group to synchronize pin group index with 1285 * pin descriptor registered with pinctrl core. 1286 * Clients would not be able to request these dummy pin groups. 1287 */ 1288 static const struct msm_pingroup eliza_groups[] = { 1289 [0] = PINGROUP(0, qup2_se0, ibi_i3c, aoss_cti, _, _, _, _, _, _, _, _), 1290 [1] = PINGROUP(1, qup2_se0, ibi_i3c, aoss_cti, _, _, _, _, _, _, _, _), 1291 [2] = PINGROUP(2, qup2_se0, _, _, _, _, _, _, _, _, _, _), 1292 [3] = PINGROUP(3, qup2_se0, _, _, _, _, _, _, _, _, _, _), 1293 [4] = PINGROUP(4, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, _), 1294 [5] = PINGROUP(5, qup2_se1, ibi_i3c, _, _, _, _, _, _, _, _, _), 1295 [6] = PINGROUP(6, qup2_se1, hdmi_ddc_scl, _, _, _, _, _, _, _, _, _), 1296 [7] = PINGROUP(7, qup2_se1, hdmi_ddc_sda, _, _, _, _, _, _, _, _, _), 1297 [8] = PINGROUP(8, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1298 [9] = PINGROUP(9, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1299 [10] = PINGROUP(10, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1300 [11] = PINGROUP(11, qup2_se2, _, _, _, _, _, _, _, _, _, _), 1301 [12] = PINGROUP(12, qup2_se4, ibi_i3c, mdp_esync1_out, qup2_se7, _, _, _, _, _, _, _), 1302 [13] = PINGROUP(13, qup2_se4, ibi_i3c, mdp_vsync_e, mdp_esync0_out, qup2_se7, _, _, _, _, _, _), 1303 [14] = PINGROUP(14, _, _, _, _, _, _, _, _, _, _, _), 1304 [15] = PINGROUP(15, _, _, _, _, _, _, _, _, _, _, _), 1305 [16] = PINGROUP(16, qup2_se5, qup2_se2, mdp_vsync, mdp_vsync2_out, mdp_vsync3_out, _, _, _, _, _, _), 1306 [17] = PINGROUP(17, qup2_se5, qup2_se2, mdp_vsync, mdp_vsync0_out, mdp_vsync1_out, _, _, _, _, _, _), 1307 [18] = PINGROUP(18, qup2_se5, qup2_se2, hdmi_pixel_clk, _, qdss_cti, _, _, _, _, _, _), 1308 [19] = PINGROUP(19, qup2_se5, hdmi_rcv_det, _, qdss_cti, _, _, _, _, _, _, _), 1309 [20] = PINGROUP(20, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1310 [21] = PINGROUP(21, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1311 [22] = PINGROUP(22, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1312 [23] = PINGROUP(23, qup2_se6, _, _, _, _, _, _, _, _, _, _), 1313 [24] = PINGROUP(24, _, _, _, _, _, _, _, _, _, _, _), 1314 [25] = PINGROUP(25, _, _, _, _, _, _, _, _, _, _, _), 1315 [26] = PINGROUP(26, qup2_se4, aoss_cti, qup2_se7, _, _, _, _, _, _, _, _), 1316 [27] = PINGROUP(27, qup2_se4, aoss_cti, mdp_vsync11_out, qup2_se7, gcc_gp1, _, _, _, _, _, _), 1317 [28] = PINGROUP(28, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1318 [29] = PINGROUP(29, qup1_se0, ibi_i3c, _, _, _, _, _, _, _, _, egpio), 1319 [30] = PINGROUP(30, qup1_se0, qup1_se2, cci_async_in, gcc_gp3, qdss_gpio_tracedata, _, _, _, _, _, egpio), 1320 [31] = PINGROUP(31, qup1_se0, cci_async_in, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1321 [32] = PINGROUP(32, qup1_se1, ibi_i3c, audio_ref_clk, gcc_gp2, qdss_cti, _, _, _, _, _, _), 1322 [33] = PINGROUP(33, qup1_se1, ibi_i3c, host2wlan_sol, gcc_gp3, _, _, _, _, _, _, _), 1323 [34] = PINGROUP(34, qup1_se1, qup1_se5, tb_trig_sdc1, ddr_bist_start, qdss_gpio_tracedata, _, _, _, _, _, _), 1324 [35] = PINGROUP(35, qup1_se1, qup1_se5, tb_trig_sdc2, gcc_gp2, qdss_gpio_tracedata, _, _, _, _, _, _), 1325 [36] = PINGROUP(36, qup1_se4, qup1_se4, ibi_i3c, _, _, _, _, _, _, _, _), 1326 [37] = PINGROUP(37, qup1_se4, qup1_se4, ibi_i3c, _, _, _, _, _, _, _, _), 1327 [38] = PINGROUP(38, _, _, _, _, _, _, _, _, _, _, _), 1328 [39] = PINGROUP(39, _, _, _, _, _, _, _, _, _, _, _), 1329 [40] = PINGROUP(40, qup1_se6, qup1_se2, qup1_se6, _, qdss_gpio_tracedata, gnss_adc1, ddr_pxi1, _, _, _, _), 1330 [41] = PINGROUP(41, _, _, _, _, _, _, _, _, _, _, _), 1331 [42] = PINGROUP(42, qup1_se6, qup1_se2, qup1_se6, qdss_gpio_tracedata, gnss_adc0, ddr_pxi1, _, _, _, _, _), 1332 [43] = PINGROUP(43, _, _, _, _, _, _, _, _, _, _, _), 1333 [44] = PINGROUP(44, qup1_se3, _, _, _, _, _, _, _, _, _, _), 1334 [45] = PINGROUP(45, qup1_se3, _, _, _, _, _, _, _, _, _, _), 1335 [46] = PINGROUP(46, qup1_se3, hdmi_tx_cec, _, _, _, _, _, _, _, _, _), 1336 [47] = PINGROUP(47, qup1_se3, hdmi_hot_plug, _, _, _, _, _, _, _, _, _), 1337 [48] = PINGROUP(48, _, _, _, _, _, _, _, _, _, _, _), 1338 [49] = PINGROUP(49, _, _, _, _, _, _, _, _, _, _, _), 1339 [50] = PINGROUP(50, sdc2_fb_clk, _, _, _, _, _, _, _, _, _, _), 1340 [51] = PINGROUP(51, _, _, _, _, _, _, _, _, _, _, _), 1341 [52] = PINGROUP(52, qup1_se2, pcie1_clk_req_n, qup1_se2, ddr_bist_complete, qdss_gpio_tracedata, _, vsense_trigger_mirnat, _, _, _, _), 1342 [53] = PINGROUP(53, qup1_se2, qup1_se2, gcc_gp1, ddr_bist_stop, _, qdss_gpio_tracedata, _, _, _, _, _), 1343 [54] = PINGROUP(54, qup1_se2, qup1_se6, qdss_gpio_tracedata, gnss_adc1, atest_usb, ddr_pxi0, _, _, _, _, _), 1344 [55] = PINGROUP(55, qup1_se2, dp0_hot, qup1_se6, _, gnss_adc0, atest_usb, ddr_pxi0, _, _, _, _), 1345 [56] = PINGROUP(56, usb0_hs, tsense_pwm1, tsense_pwm2, tsense_pwm3, tsense_pwm4, _, _, _, _, _, _), 1346 [57] = PINGROUP(57, sd_write_protect, _, _, _, _, _, _, _, _, _, _), 1347 [58] = PINGROUP(58, _, _, _, _, _, _, _, _, _, _, _), 1348 [59] = PINGROUP(59, _, _, _, _, _, _, _, _, _, _, _), 1349 [60] = PINGROUP(60, i2s0_sck, _, _, _, _, _, _, _, _, _, _), 1350 [61] = PINGROUP(61, i2s0_ws, _, _, _, _, _, _, _, _, _, _), 1351 [62] = PINGROUP(62, _, _, _, _, _, _, _, _, _, _, _), 1352 [63] = PINGROUP(63, resout_gpio, i2s0_data1, cci_timer, vfr_0, _, _, _, _, _, _, _), 1353 [64] = PINGROUP(64, i2s0_data0, _, _, _, _, _, _, _, _, _, _), 1354 [65] = PINGROUP(65, cam_mclk, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _), 1355 [66] = PINGROUP(66, cam_mclk, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _), 1356 [67] = PINGROUP(67, cam_mclk, prng_rosc0, _, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1357 [68] = PINGROUP(68, cam_mclk, _, _, _, _, _, _, _, _, _, _), 1358 [69] = PINGROUP(69, cam_mclk, audio_ext_mclk0, resout_gpio, prng_rosc1, _, _, _, _, _, _, _), 1359 [70] = PINGROUP(70, cci_i2c_sda, tmess_prng2, _, phase_flag, atest_char, _, _, _, _, _, _), 1360 [71] = PINGROUP(71, cci_i2c_scl, tmess_prng3, _, phase_flag, atest_char, _, _, _, _, _, _), 1361 [72] = PINGROUP(72, cci_i2c_sda, tmess_prng1, qdss_gpio_tracedata, atest_char, _, _, _, _, _, _, _), 1362 [73] = PINGROUP(73, cci_i2c_scl, tmess_prng0, qdss_cti, atest_char, _, _, _, _, _, _, _), 1363 [74] = PINGROUP(74, cci_i2c_sda, prng_rosc3, qdss_cti, atest_char, _, _, _, _, _, _, _), 1364 [75] = PINGROUP(75, cci_i2c_scl, _, phase_flag, _, _, _, _, _, _, _, _), 1365 [76] = PINGROUP(76, cci_i2c_sda, cci_timer, prng_rosc2, _, phase_flag, _, _, _, _, _, _), 1366 [77] = PINGROUP(77, cci_i2c_scl, jitter_bist, _, _, _, _, _, _, _, _, _), 1367 [78] = PINGROUP(78, qup1_se7, qup1_se7, _, phase_flag, _, _, _, _, _, _, _), 1368 [79] = PINGROUP(79, qspi0, mdp_vsync, qup2_se3, _, _, _, _, _, _, _, _), 1369 [80] = PINGROUP(80, pcie0_clk_req_n, qup1_se7, _, phase_flag, _, _, _, _, _, _, _), 1370 [81] = PINGROUP(81, wcn_sw_ctrl, qup1_se7, dbg_out_clk, _, _, _, _, _, _, _, _), 1371 [82] = PINGROUP(82, _, _, _, _, _, _, _, _, _, _, _), 1372 [83] = PINGROUP(83, _, _, _, _, _, _, _, _, _, _, _), 1373 [84] = PINGROUP(84, uim0_data, _, _, _, _, _, _, _, _, _, _), 1374 [85] = PINGROUP(85, uim0_clk, _, _, _, _, _, _, _, _, _, _), 1375 [86] = PINGROUP(86, uim0_reset, _, _, _, _, _, _, _, _, _, _), 1376 [87] = PINGROUP(87, uim0_present, _, _, _, _, _, _, _, _, _, _), 1377 [88] = PINGROUP(88, uim1_data, _, _, _, _, _, _, _, _, _, _), 1378 [89] = PINGROUP(89, uim1_clk, _, _, _, _, _, _, _, _, _, _), 1379 [90] = PINGROUP(90, uim1_reset, _, _, _, _, _, _, _, _, _, _), 1380 [91] = PINGROUP(91, uim1_present, _, _, _, _, _, _, _, _, _, _), 1381 [92] = PINGROUP(92, qlink_little_request, _, _, _, _, _, _, _, _, _, _), 1382 [93] = PINGROUP(93, qlink_little_enable, _, _, _, _, _, _, _, _, _, _), 1383 [94] = PINGROUP(94, qlink_wmss, _, _, _, _, _, _, _, _, _, _), 1384 [95] = PINGROUP(95, qlink_big_request, _, _, _, _, _, _, _, _, _, _), 1385 [96] = PINGROUP(96, qlink_big_enable, _, _, _, _, _, _, _, _, _, _), 1386 [97] = PINGROUP(97, uim1_data, qspi0, qup2_se3, _, _, _, _, _, _, _, _), 1387 [98] = PINGROUP(98, uim1_clk, qspi0, _, _, _, _, _, _, _, _, _), 1388 [99] = PINGROUP(99, uim1_reset, qspi0, _, _, _, _, _, _, _, _, _), 1389 [100] = PINGROUP(100, uim1_present, qspi0, qup2_se3, coex_uart2_tx, qup2_se3, mdp_vsync, _, _, _, _, _), 1390 [101] = PINGROUP(101, _, _, _, _, _, _, _, _, _, _, _), 1391 [102] = PINGROUP(102, _, _, _, _, _, _, _, _, _, _, _), 1392 [103] = PINGROUP(103, _, _, _, _, _, _, _, _, _, _, _), 1393 [104] = PINGROUP(104, _, _, _, _, _, _, _, _, _, _, _), 1394 [105] = PINGROUP(105, _, _, _, _, _, _, _, _, _, _, _), 1395 [106] = PINGROUP(106, _, _, _, _, _, _, _, _, _, _, _), 1396 [107] = PINGROUP(107, _, _, _, _, _, _, _, _, _, _, _), 1397 [108] = PINGROUP(108, _, _, _, _, _, _, _, _, _, _, _), 1398 [109] = PINGROUP(109, _, _, _, _, _, _, _, _, _, _, _), 1399 [110] = PINGROUP(110, _, _, _, _, _, _, _, _, _, _, _), 1400 [111] = PINGROUP(111, coex_uart1_tx, _, _, _, _, _, _, _, _, _, _), 1401 [112] = PINGROUP(112, coex_uart1_rx, _, _, _, _, _, _, _, _, _, _), 1402 [113] = PINGROUP(113, _, nav_gpio3, _, _, _, _, _, _, _, _, _), 1403 [114] = PINGROUP(114, qup1_se7, qup1_se7, _, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1404 [115] = PINGROUP(115, _, qspi0, cci_async_in, _, _, _, _, _, _, _, _), 1405 [116] = PINGROUP(116, qspi0, coex_uart2_rx, qup2_se3, qup2_se3, _, _, _, _, _, _, _), 1406 [117] = PINGROUP(117, nav_gpio1, _, vfr_1, _, _, _, _, _, _, _, _), 1407 [118] = PINGROUP(118, nav_gpio2, _, _, _, _, _, _, _, _, _, _), 1408 [119] = PINGROUP(119, nav_gpio0, _, _, _, _, _, _, _, _, _, _), 1409 [120] = PINGROUP(120, sdc1, mdp_vsync, _, _, _, _, _, _, _, _, _), 1410 [121] = PINGROUP(121, sdc1, mdp_vsync, _, _, _, _, _, _, _, _, _), 1411 [122] = PINGROUP(122, usb_phy, _, _, _, _, _, _, _, _, _, _), 1412 [123] = PINGROUP(123, sdc1, _, _, _, _, _, _, _, _, _, _), 1413 [124] = PINGROUP(124, sdc1, _, _, _, _, _, _, _, _, _, _), 1414 [125] = PINGROUP(125, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1415 [126] = PINGROUP(126, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1416 [127] = PINGROUP(127, sdc1, cci_timer, _, _, _, _, _, _, _, _, _), 1417 [128] = PINGROUP(128, sdc1, _, _, _, _, _, _, _, _, _, _), 1418 [129] = PINGROUP(129, sdc1, _, _, _, _, _, _, _, _, _, _), 1419 [130] = PINGROUP(130, sdc1, _, _, _, _, _, _, _, _, _, _), 1420 [131] = PINGROUP(131, sdc1, _, _, _, _, _, _, _, _, _, _), 1421 [132] = PINGROUP(132, qup1_se5, _, qdss_gpio_tracedata, hdmi_dtest0, _, _, _, _, _, _, _), 1422 [133] = PINGROUP(133, qup1_se5, _, qdss_gpio_tracedata, hdmi_dtest1, _, _, _, _, _, _, _), 1423 [134] = PINGROUP(134, qup1_se5, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, _), 1424 [135] = PINGROUP(135, qup1_se5, _, pll_clk_aux, qdss_gpio_tracedata, _, _, _, _, _, _, _), 1425 [136] = PINGROUP(136, _, _, _, _, _, _, _, _, _, _, _), 1426 [137] = PINGROUP(137, _, _, _, _, _, _, _, _, _, _, _), 1427 [138] = PINGROUP(138, _, _, _, _, _, _, _, _, _, _, egpio), 1428 [139] = PINGROUP(139, _, _, _, _, _, _, _, _, _, _, egpio), 1429 [140] = PINGROUP(140, _, _, _, _, _, _, _, _, _, _, egpio), 1430 [141] = PINGROUP(141, _, _, _, _, _, _, _, _, _, _, egpio), 1431 [142] = PINGROUP(142, _, _, _, _, _, _, _, _, _, _, egpio), 1432 [143] = PINGROUP(143, _, _, _, _, _, _, _, _, _, _, egpio), 1433 [144] = PINGROUP(144, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1434 [145] = PINGROUP(145, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, _, egpio), 1435 [146] = PINGROUP(146, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1436 [147] = PINGROUP(147, ddr_bist_fail, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1437 [148] = PINGROUP(148, _, _, _, _, _, _, _, _, _, _, egpio), 1438 [149] = PINGROUP(149, _, _, _, _, _, _, _, _, _, _, egpio), 1439 [150] = PINGROUP(150, _, _, _, _, _, _, _, _, _, _, egpio), 1440 [151] = PINGROUP(151, _, _, _, _, _, _, _, _, _, _, egpio), 1441 [152] = PINGROUP(152, _, _, _, _, _, _, _, _, _, _, egpio), 1442 [153] = PINGROUP(153, _, _, _, _, _, _, _, _, _, _, egpio), 1443 [154] = PINGROUP(154, qdss_cti, _, _, _, _, _, _, _, _, _, egpio), 1444 [155] = PINGROUP(155, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1445 [156] = PINGROUP(156, _, qdss_gpio_tracedata, _, _, _, _, _, _, _, _, egpio), 1446 [157] = PINGROUP(157, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1447 [158] = PINGROUP(158, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1448 [159] = PINGROUP(159, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1449 [160] = PINGROUP(160, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1450 [161] = PINGROUP(161, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1451 [162] = PINGROUP(162, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1452 [163] = PINGROUP(163, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1453 [164] = PINGROUP(164, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1454 [165] = PINGROUP(165, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1455 [166] = PINGROUP(166, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1456 [167] = PINGROUP(167, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1457 [168] = PINGROUP(168, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1458 [169] = PINGROUP(169, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1459 [170] = PINGROUP(170, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1460 [171] = PINGROUP(171, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1461 [172] = PINGROUP(172, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1462 [173] = PINGROUP(173, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1463 [174] = PINGROUP(174, _, phase_flag, _, _, _, _, _, _, _, _, egpio), 1464 [175] = PINGROUP(175, resout_gpio, _, phase_flag, _, _, _, _, _, _, _, egpio), 1465 [176] = PINGROUP(176, _, phase_flag, qdss_cti, _, _, _, _, _, _, _, egpio), 1466 [177] = PINGROUP(177, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1467 [178] = PINGROUP(178, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1468 [179] = PINGROUP(179, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1469 [180] = PINGROUP(180, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1470 [181] = PINGROUP(181, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1471 [182] = PINGROUP(182, _, phase_flag, qdss_gpio_tracedata, _, _, _, _, _, _, _, egpio), 1472 [183] = PINGROUP(183, _, _, _, _, _, _, _, _, _, _, _), 1473 [184] = PINGROUP(184, pll_bist_sync, qdss_cti, _, _, _, _, _, _, _, _, egpio), 1474 [185] = UFS_RESET(ufs_reset, 0xc9004, 0xca000), 1475 }; 1476 1477 static const struct msm_gpio_wakeirq_map eliza_pdc_map[] = { 1478 { 0, 82 }, { 3, 87 }, { 4, 90 }, { 6, 68 }, { 7, 153 }, 1479 { 11, 85 }, { 12, 107 }, { 13, 106 }, { 16, 88 }, { 17, 70 }, 1480 { 18, 134 }, { 19, 79 }, { 23, 80 }, { 26, 91 }, { 27, 74 }, 1481 { 28, 137 }, { 29, 138 }, { 30, 139 }, { 31, 140 }, { 32, 117 }, 1482 { 34, 100 }, { 35, 98 }, { 36, 141 }, { 39, 89 }, { 40, 142 }, 1483 { 42, 143 }, { 44, 101 }, { 45, 144 }, { 46, 145 }, { 47, 146 }, 1484 { 49, 75 }, { 51, 147 }, { 52, 148 }, { 53, 149 }, { 54, 150 }, 1485 { 55, 151 }, { 56, 152 }, { 58, 71 }, { 59, 155 }, { 63, 99 }, 1486 { 78, 156 }, { 79, 76 }, { 80, 157 }, { 81, 69 }, { 87, 158 }, 1487 { 91, 67 }, { 92, 159 }, { 95, 160 }, { 98, 161 }, { 99, 162 }, 1488 { 100, 83 }, { 108, 154 }, { 109, 84 }, { 112, 86 }, { 113, 92 }, 1489 { 114, 93 }, { 115, 110 }, { 116, 94 }, { 117, 77 }, { 118, 108 }, 1490 { 119, 95 }, { 120, 81 }, { 121, 96 }, { 122, 97 }, { 123, 102 }, 1491 { 125, 103 }, { 127, 104 }, { 128, 105 }, { 129, 78 }, { 130, 112 }, 1492 { 131, 113 }, { 133, 114 }, { 135, 115 }, { 139, 116 }, { 142, 118 }, 1493 { 145, 109 }, { 147, 72 }, { 149, 111 }, { 154, 122 }, { 157, 119 }, 1494 { 159, 120 }, { 161, 121 }, { 164, 123 }, { 165, 124 }, { 167, 125 }, 1495 { 170, 126 }, { 171, 73 }, { 172, 127 }, { 173, 128 }, { 174, 129 }, 1496 { 175, 130 }, { 176, 131 }, { 177, 132 }, { 179, 133 }, { 182, 135 }, 1497 { 184, 136 }, 1498 }; 1499 1500 static const struct msm_pinctrl_soc_data eliza_tlmm = { 1501 .pins = eliza_pins, 1502 .npins = ARRAY_SIZE(eliza_pins), 1503 .functions = eliza_functions, 1504 .nfunctions = ARRAY_SIZE(eliza_functions), 1505 .groups = eliza_groups, 1506 .ngroups = ARRAY_SIZE(eliza_groups), 1507 .ngpios = 186, 1508 .wakeirq_map = eliza_pdc_map, 1509 .nwakeirq_map = ARRAY_SIZE(eliza_pdc_map), 1510 .egpio_func = 11, 1511 }; 1512 1513 static int eliza_tlmm_probe(struct platform_device *pdev) 1514 { 1515 return msm_pinctrl_probe(pdev, &eliza_tlmm); 1516 } 1517 1518 static const struct of_device_id eliza_tlmm_of_match[] = { 1519 { .compatible = "qcom,eliza-tlmm", }, 1520 {}, 1521 }; 1522 1523 static struct platform_driver eliza_tlmm_driver = { 1524 .driver = { 1525 .name = "eliza-tlmm", 1526 .of_match_table = eliza_tlmm_of_match, 1527 }, 1528 .probe = eliza_tlmm_probe, 1529 }; 1530 1531 static int __init eliza_tlmm_init(void) 1532 { 1533 return platform_driver_register(&eliza_tlmm_driver); 1534 } 1535 arch_initcall(eliza_tlmm_init); 1536 1537 static void __exit eliza_tlmm_exit(void) 1538 { 1539 platform_driver_unregister(&eliza_tlmm_driver); 1540 } 1541 module_exit(eliza_tlmm_exit); 1542 1543 MODULE_DESCRIPTION("QTI Eliza TLMM driver"); 1544 MODULE_LICENSE("GPL"); 1545 MODULE_DEVICE_TABLE(of, eliza_tlmm_of_match); 1546