xref: /linux/drivers/pinctrl/intel/Kconfig (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1# SPDX-License-Identifier: GPL-2.0
2# Intel pin control drivers
3menu "Intel pinctrl drivers"
4	depends on (ACPI && X86) || COMPILE_TEST
5
6config PINCTRL_BAYTRAIL
7	bool "Intel Baytrail GPIO pin control"
8	select PINCTRL_INTEL
9	help
10	  driver for memory mapped GPIO functionality on Intel Baytrail
11	  platforms. Supports 3 banks with 102, 28 and 44 gpios.
12	  Most pins are usually muxed to some other functionality by firmware,
13	  so only a small amount is available for gpio use.
14
15	  Requires ACPI device enumeration code to set up a platform device.
16
17config PINCTRL_CHERRYVIEW
18	tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
19	select PINCTRL_INTEL
20	help
21	  Cherryview/Braswell pinctrl driver provides an interface that
22	  allows configuring of SoC pins and using them as GPIOs.
23
24config PINCTRL_LYNXPOINT
25	tristate "Intel Lynxpoint pinctrl and GPIO driver"
26	select PINCTRL_INTEL
27	help
28	  Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
29	  provides an interface that allows configuring of PCH pins and
30	  using them as GPIOs.
31
32config PINCTRL_INTEL
33	tristate
34	select PINMUX
35	select PINCONF
36	select GENERIC_PINCONF
37	select GPIOLIB
38	select GPIOLIB_IRQCHIP
39
40config PINCTRL_INTEL_PLATFORM
41	tristate "Intel pinctrl and GPIO platform driver"
42	depends on ACPI
43	select PINCTRL_INTEL
44	help
45	  This pinctrl driver provides an interface that allows configuring
46	  of Intel PCH pins and using them as GPIOs. Currently the following
47	  Intel SoCs / platforms require this to be functional:
48	  - Lunar Lake
49	  - Panther Lake
50
51config PINCTRL_ALDERLAKE
52	tristate "Intel Alder Lake pinctrl and GPIO driver"
53	select PINCTRL_INTEL
54	help
55	  This pinctrl driver provides an interface that allows configuring
56	  of Intel Alder Lake PCH pins and using them as GPIOs.
57
58config PINCTRL_BROXTON
59	tristate "Intel Broxton pinctrl and GPIO driver"
60	select PINCTRL_INTEL
61	help
62	  Broxton pinctrl driver provides an interface that allows
63	  configuring of SoC pins and using them as GPIOs.
64
65config PINCTRL_CANNONLAKE
66	tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
67	select PINCTRL_INTEL
68	help
69	  This pinctrl driver provides an interface that allows configuring
70	  of Intel Cannon Lake PCH pins and using them as GPIOs.
71
72config PINCTRL_CEDARFORK
73	tristate "Intel Cedar Fork pinctrl and GPIO driver"
74	select PINCTRL_INTEL
75	help
76	  This pinctrl driver provides an interface that allows configuring
77	  of Intel Cedar Fork PCH pins and using them as GPIOs.
78
79config PINCTRL_DENVERTON
80	tristate "Intel Denverton pinctrl and GPIO driver"
81	select PINCTRL_INTEL
82	help
83	  This pinctrl driver provides an interface that allows configuring
84	  of Intel Denverton SoC pins and using them as GPIOs.
85
86config PINCTRL_ELKHARTLAKE
87	tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver"
88	select PINCTRL_INTEL
89	help
90	  This pinctrl driver provides an interface that allows configuring
91	  of Intel Elkhart Lake SoC pins and using them as GPIOs.
92
93config PINCTRL_EMMITSBURG
94	tristate "Intel Emmitsburg pinctrl and GPIO driver"
95	select PINCTRL_INTEL
96	help
97	  This pinctrl driver provides an interface that allows configuring
98	  of Intel Emmitsburg pins and using them as GPIOs.
99
100config PINCTRL_GEMINILAKE
101	tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
102	select PINCTRL_INTEL
103	help
104	  This pinctrl driver provides an interface that allows configuring
105	  of Intel Gemini Lake SoC pins and using them as GPIOs.
106
107config PINCTRL_ICELAKE
108	tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
109	select PINCTRL_INTEL
110	help
111	  This pinctrl driver provides an interface that allows configuring
112	  of Intel Ice Lake PCH pins and using them as GPIOs.
113
114config PINCTRL_JASPERLAKE
115	tristate "Intel Jasper Lake PCH pinctrl and GPIO driver"
116	select PINCTRL_INTEL
117	help
118	  This pinctrl driver provides an interface that allows configuring
119	  of Intel Jasper Lake PCH pins and using them as GPIOs.
120
121config PINCTRL_LAKEFIELD
122	tristate "Intel Lakefield SoC pinctrl and GPIO driver"
123	select PINCTRL_INTEL
124	help
125	  This pinctrl driver provides an interface that allows configuring
126	  of Intel Lakefield SoC pins and using them as GPIOs.
127
128config PINCTRL_LEWISBURG
129	tristate "Intel Lewisburg pinctrl and GPIO driver"
130	select PINCTRL_INTEL
131	help
132	  This pinctrl driver provides an interface that allows configuring
133	  of Intel Lewisburg pins and using them as GPIOs.
134
135config PINCTRL_METEORLAKE
136	tristate "Intel Meteor Lake pinctrl and GPIO driver"
137	select PINCTRL_INTEL
138	help
139	  This pinctrl driver provides an interface that allows configuring
140	  of Intel Meteor Lake pins and using them as GPIOs.
141
142config PINCTRL_METEORPOINT
143	tristate "Intel Meteor Point pinctrl and GPIO driver"
144	depends on ACPI
145	select PINCTRL_INTEL
146	help
147	  Meteor Point is the PCH of Intel Meteor Lake. This pinctrl driver
148	  provides an interface that allows configuring of PCH pins and
149	  using them as GPIOs.
150
151config PINCTRL_SUNRISEPOINT
152	tristate "Intel Sunrisepoint pinctrl and GPIO driver"
153	select PINCTRL_INTEL
154	help
155	  Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
156	  provides an interface that allows configuring of PCH pins and
157	  using them as GPIOs.
158
159config PINCTRL_TIGERLAKE
160	tristate "Intel Tiger Lake pinctrl and GPIO driver"
161	select PINCTRL_INTEL
162	help
163	  This pinctrl driver provides an interface that allows configuring
164	  of Intel Tiger Lake PCH pins and using them as GPIOs.
165
166source "drivers/pinctrl/intel/Kconfig.tng"
167endmenu
168