1# SPDX-License-Identifier: GPL-2.0 2# Intel pin control drivers 3menu "Intel pinctrl drivers" 4 depends on (ACPI && X86) || COMPILE_TEST 5 6config PINCTRL_BAYTRAIL 7 bool "Intel Baytrail GPIO pin control" 8 select PINCTRL_INTEL 9 help 10 driver for memory mapped GPIO functionality on Intel Baytrail 11 platforms. Supports 3 banks with 102, 28 and 44 gpios. 12 Most pins are usually muxed to some other functionality by firmware, 13 so only a small amount is available for gpio use. 14 15 Requires ACPI device enumeration code to set up a platform device. 16 17config PINCTRL_CHERRYVIEW 18 tristate "Intel Cherryview/Braswell pinctrl and GPIO driver" 19 select PINCTRL_INTEL 20 help 21 Cherryview/Braswell pinctrl driver provides an interface that 22 allows configuring of SoC pins and using them as GPIOs. 23 24config PINCTRL_LYNXPOINT 25 tristate "Intel Lynxpoint pinctrl and GPIO driver" 26 select PINCTRL_INTEL 27 help 28 Lynxpoint is the PCH of Intel Haswell. This pinctrl driver 29 provides an interface that allows configuring of PCH pins and 30 using them as GPIOs. 31 32config PINCTRL_INTEL 33 tristate 34 select PINMUX 35 select PINCONF 36 select GENERIC_PINCONF 37 select GPIOLIB 38 select GPIOLIB_IRQCHIP 39 40config PINCTRL_INTEL_PLATFORM 41 tristate "Intel pinctrl and GPIO platform driver" 42 select PINCTRL_INTEL 43 help 44 This pinctrl driver provides an interface that allows configuring 45 of Intel PCH pins and using them as GPIOs. Currently the following 46 Intel SoCs / platforms require this to be functional: 47 - Lunar Lake 48 - Nova Lake 49 - Panther Lake 50 51config PINCTRL_ALDERLAKE 52 tristate "Intel Alder Lake pinctrl and GPIO driver" 53 select PINCTRL_INTEL 54 help 55 This pinctrl driver provides an interface that allows configuring 56 PCH pins of the following platforms and using them as GPIOs: 57 - Alder Lake HX, N, and S 58 - Raptor Lake HX, E, and S 59 - Twin Lake 60 61config PINCTRL_BROXTON 62 tristate "Intel Broxton pinctrl and GPIO driver" 63 select PINCTRL_INTEL 64 help 65 Broxton pinctrl driver provides an interface that allows 66 configuring of SoC pins and using them as GPIOs. 67 68config PINCTRL_CANNONLAKE 69 tristate "Intel Cannon Lake PCH pinctrl and GPIO driver" 70 select PINCTRL_INTEL 71 help 72 This pinctrl driver provides an interface that allows configuring 73 of Intel Cannon Lake PCH pins and using them as GPIOs. 74 75config PINCTRL_CEDARFORK 76 tristate "Intel Cedar Fork pinctrl and GPIO driver" 77 select PINCTRL_INTEL 78 help 79 This pinctrl driver provides an interface that allows configuring 80 of Intel Cedar Fork PCH pins and using them as GPIOs. 81 82config PINCTRL_DENVERTON 83 tristate "Intel Denverton pinctrl and GPIO driver" 84 select PINCTRL_INTEL 85 help 86 This pinctrl driver provides an interface that allows configuring 87 of Intel Denverton SoC pins and using them as GPIOs. 88 89config PINCTRL_ELKHARTLAKE 90 tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver" 91 select PINCTRL_INTEL 92 help 93 This pinctrl driver provides an interface that allows configuring 94 of Intel Elkhart Lake SoC pins and using them as GPIOs. 95 96config PINCTRL_EMMITSBURG 97 tristate "Intel Emmitsburg pinctrl and GPIO driver" 98 select PINCTRL_INTEL 99 help 100 This pinctrl driver provides an interface that allows configuring 101 of Intel Emmitsburg pins and using them as GPIOs. 102 103config PINCTRL_GEMINILAKE 104 tristate "Intel Gemini Lake SoC pinctrl and GPIO driver" 105 select PINCTRL_INTEL 106 help 107 This pinctrl driver provides an interface that allows configuring 108 of Intel Gemini Lake SoC pins and using them as GPIOs. 109 110config PINCTRL_ICELAKE 111 tristate "Intel Ice Lake PCH pinctrl and GPIO driver" 112 select PINCTRL_INTEL 113 help 114 This pinctrl driver provides an interface that allows configuring 115 of Intel Ice Lake PCH pins and using them as GPIOs. 116 117config PINCTRL_JASPERLAKE 118 tristate "Intel Jasper Lake PCH pinctrl and GPIO driver" 119 select PINCTRL_INTEL 120 help 121 This pinctrl driver provides an interface that allows configuring 122 of Intel Jasper Lake PCH pins and using them as GPIOs. 123 124config PINCTRL_LAKEFIELD 125 tristate "Intel Lakefield SoC pinctrl and GPIO driver" 126 select PINCTRL_INTEL 127 help 128 This pinctrl driver provides an interface that allows configuring 129 of Intel Lakefield SoC pins and using them as GPIOs. 130 131config PINCTRL_LEWISBURG 132 tristate "Intel Lewisburg pinctrl and GPIO driver" 133 select PINCTRL_INTEL 134 help 135 This pinctrl driver provides an interface that allows configuring 136 of Intel Lewisburg pins and using them as GPIOs. 137 138config PINCTRL_METEORLAKE 139 tristate "Intel Meteor Lake pinctrl and GPIO driver" 140 select PINCTRL_INTEL 141 help 142 This pinctrl driver provides an interface that allows configuring 143 SoC pins of the following platforms and using them as GPIOs: 144 - Arrow Lake (all variants) 145 - Meteor Lake (all variants) 146 147config PINCTRL_METEORPOINT 148 tristate "Intel Meteor Point pinctrl and GPIO driver" 149 select PINCTRL_INTEL 150 help 151 This pinctrl driver provides an interface that allows configuring 152 PCH pins of the following platforms and using them as GPIOs: 153 - Arrow Lake HX and S 154 155config PINCTRL_SUNRISEPOINT 156 tristate "Intel Sunrisepoint pinctrl and GPIO driver" 157 select PINCTRL_INTEL 158 help 159 Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver 160 provides an interface that allows configuring of PCH pins and 161 using them as GPIOs. 162 163config PINCTRL_TIGERLAKE 164 tristate "Intel Tiger Lake pinctrl and GPIO driver" 165 select PINCTRL_INTEL 166 help 167 This pinctrl driver provides an interface that allows configuring 168 PCH pins of the following platforms and using them as GPIOs: 169 - Alder Lake H, P, PS, and U 170 - Raptor Lake H, P, PS, PX, and U 171 - Rocket Lake S 172 - Tiger Lake (all variants) 173 174source "drivers/pinctrl/intel/Kconfig.tng" 175endmenu 176