xref: /linux/drivers/pinctrl/intel/Kconfig (revision 249ebf3f65f8530beb2cbfb91bff1d83ba88d23c)
1# SPDX-License-Identifier: GPL-2.0
2# Intel pin control drivers
3menu "Intel pinctrl drivers"
4	depends on (ACPI && X86) || COMPILE_TEST
5
6config PINCTRL_BAYTRAIL
7	bool "Intel Baytrail GPIO pin control"
8	select PINCTRL_INTEL
9	help
10	  driver for memory mapped GPIO functionality on Intel Baytrail
11	  platforms. Supports 3 banks with 102, 28 and 44 gpios.
12	  Most pins are usually muxed to some other functionality by firmware,
13	  so only a small amount is available for gpio use.
14
15	  Requires ACPI device enumeration code to set up a platform device.
16
17config PINCTRL_CHERRYVIEW
18	tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
19	select PINCTRL_INTEL
20	help
21	  Cherryview/Braswell pinctrl driver provides an interface that
22	  allows configuring of SoC pins and using them as GPIOs.
23
24config PINCTRL_LYNXPOINT
25	tristate "Intel Lynxpoint pinctrl and GPIO driver"
26	select PINCTRL_INTEL
27	help
28	  Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
29	  provides an interface that allows configuring of PCH pins and
30	  using them as GPIOs.
31
32config PINCTRL_INTEL
33	tristate
34	select PINMUX
35	select PINCONF
36	select GENERIC_PINCONF
37	select GPIOLIB
38	select GPIOLIB_IRQCHIP
39
40config PINCTRL_INTEL_PLATFORM
41	tristate "Intel pinctrl and GPIO platform driver"
42	depends on ACPI
43	select PINCTRL_INTEL
44	help
45	  This pinctrl driver provides an interface that allows configuring
46	  of Intel PCH pins and using them as GPIOs. Currently the following
47	  Intel SoCs / platforms require this to be functional:
48	  - Lunar Lake
49
50config PINCTRL_ALDERLAKE
51	tristate "Intel Alder Lake pinctrl and GPIO driver"
52	select PINCTRL_INTEL
53	help
54	  This pinctrl driver provides an interface that allows configuring
55	  of Intel Alder Lake PCH pins and using them as GPIOs.
56
57config PINCTRL_BROXTON
58	tristate "Intel Broxton pinctrl and GPIO driver"
59	select PINCTRL_INTEL
60	help
61	  Broxton pinctrl driver provides an interface that allows
62	  configuring of SoC pins and using them as GPIOs.
63
64config PINCTRL_CANNONLAKE
65	tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
66	select PINCTRL_INTEL
67	help
68	  This pinctrl driver provides an interface that allows configuring
69	  of Intel Cannon Lake PCH pins and using them as GPIOs.
70
71config PINCTRL_CEDARFORK
72	tristate "Intel Cedar Fork pinctrl and GPIO driver"
73	select PINCTRL_INTEL
74	help
75	  This pinctrl driver provides an interface that allows configuring
76	  of Intel Cedar Fork PCH pins and using them as GPIOs.
77
78config PINCTRL_DENVERTON
79	tristate "Intel Denverton pinctrl and GPIO driver"
80	select PINCTRL_INTEL
81	help
82	  This pinctrl driver provides an interface that allows configuring
83	  of Intel Denverton SoC pins and using them as GPIOs.
84
85config PINCTRL_ELKHARTLAKE
86	tristate "Intel Elkhart Lake SoC pinctrl and GPIO driver"
87	select PINCTRL_INTEL
88	help
89	  This pinctrl driver provides an interface that allows configuring
90	  of Intel Elkhart Lake SoC pins and using them as GPIOs.
91
92config PINCTRL_EMMITSBURG
93	tristate "Intel Emmitsburg pinctrl and GPIO driver"
94	select PINCTRL_INTEL
95	help
96	  This pinctrl driver provides an interface that allows configuring
97	  of Intel Emmitsburg pins and using them as GPIOs.
98
99config PINCTRL_GEMINILAKE
100	tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
101	select PINCTRL_INTEL
102	help
103	  This pinctrl driver provides an interface that allows configuring
104	  of Intel Gemini Lake SoC pins and using them as GPIOs.
105
106config PINCTRL_ICELAKE
107	tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
108	select PINCTRL_INTEL
109	help
110	  This pinctrl driver provides an interface that allows configuring
111	  of Intel Ice Lake PCH pins and using them as GPIOs.
112
113config PINCTRL_JASPERLAKE
114	tristate "Intel Jasper Lake PCH pinctrl and GPIO driver"
115	select PINCTRL_INTEL
116	help
117	  This pinctrl driver provides an interface that allows configuring
118	  of Intel Jasper Lake PCH pins and using them as GPIOs.
119
120config PINCTRL_LAKEFIELD
121	tristate "Intel Lakefield SoC pinctrl and GPIO driver"
122	select PINCTRL_INTEL
123	help
124	  This pinctrl driver provides an interface that allows configuring
125	  of Intel Lakefield SoC pins and using them as GPIOs.
126
127config PINCTRL_LEWISBURG
128	tristate "Intel Lewisburg pinctrl and GPIO driver"
129	select PINCTRL_INTEL
130	help
131	  This pinctrl driver provides an interface that allows configuring
132	  of Intel Lewisburg pins and using them as GPIOs.
133
134config PINCTRL_METEORLAKE
135	tristate "Intel Meteor Lake pinctrl and GPIO driver"
136	select PINCTRL_INTEL
137	help
138	  This pinctrl driver provides an interface that allows configuring
139	  of Intel Meteor Lake pins and using them as GPIOs.
140
141config PINCTRL_METEORPOINT
142	tristate "Intel Meteor Point pinctrl and GPIO driver"
143	depends on ACPI
144	select PINCTRL_INTEL
145	help
146	  Meteor Point is the PCH of Intel Meteor Lake. This pinctrl driver
147	  provides an interface that allows configuring of PCH pins and
148	  using them as GPIOs.
149
150config PINCTRL_SUNRISEPOINT
151	tristate "Intel Sunrisepoint pinctrl and GPIO driver"
152	select PINCTRL_INTEL
153	help
154	  Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
155	  provides an interface that allows configuring of PCH pins and
156	  using them as GPIOs.
157
158config PINCTRL_TIGERLAKE
159	tristate "Intel Tiger Lake pinctrl and GPIO driver"
160	select PINCTRL_INTEL
161	help
162	  This pinctrl driver provides an interface that allows configuring
163	  of Intel Tiger Lake PCH pins and using them as GPIOs.
164
165source "drivers/pinctrl/intel/Kconfig.tng"
166endmenu
167