xref: /linux/drivers/pinctrl/bcm/pinctrl-brcmstb.h (revision ec2e0fb07d789976c601bec19ecced7a501c3705)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Header for Broadcom brcmstb GPIO based drivers
4  *
5  * Copyright (C) 2024-2025 Ivan T. Ivanov, Andrea della Porta
6  * Copyright (C) 2021-3 Raspberry Pi Ltd.
7  * Copyright (C) 2012 Chris Boot, Simon Arlott, Stephen Warren
8  *
9  * Based heavily on the BCM2835 GPIO & pinctrl driver, which was inspired by:
10  * pinctrl-nomadik.c, please see original file for copyright information
11  * pinctrl-tegra.c, please see original file for copyright information
12  */
13 
14 #ifndef __PINCTRL_BRCMSTB_H__
15 #define __PINCTRL_BRCMSTB_H__
16 
17 #include <linux/types.h>
18 #include <linux/platform_device.h>
19 
20 #define BRCMSTB_FUNC(f) \
21 	[func_##f] = #f
22 
23 #define MUX_BIT_VALID		0x8000
24 #define PAD_BIT_INVALID		0xffff
25 
26 #define MUX_BIT(muxreg, muxshift) \
27 	(MUX_BIT_VALID + ((muxreg) << 5) + ((muxshift) << 2))
28 #define PAD_BIT(padreg, padshift) \
29 	(((padreg) << 5) + ((padshift) << 1))
30 
31 #define GPIO_REGS(n, muxreg, muxshift, padreg, padshift) \
32 	[n] = { MUX_BIT(muxreg, muxshift), PAD_BIT(padreg, padshift) }
33 
34 #define EMMC_REGS(n, padreg, padshift) \
35 	[n] = { 0, PAD_BIT(padreg, padshift) }
36 
37 #define AON_GPIO_REGS(n, muxreg, muxshift, padreg, padshift) \
38 	GPIO_REGS(n, muxreg, muxshift, padreg, padshift)
39 
40 #define AON_SGPIO_REGS(n, muxreg, muxshift) \
41 	[(n) + 32] = { MUX_BIT(muxreg, muxshift), PAD_BIT_INVALID }
42 
43 #define GPIO_PIN(n)		PINCTRL_PIN(n, "gpio" #n)
44 /**
45  * AON pins are in the Always-On power domain. SGPIOs are also 'Safe'
46  * being 5V tolerant (necessary for the HDMI I2C pins), and can be driven
47  * while the power is off.
48  */
49 #define AON_GPIO_PIN(n)		PINCTRL_PIN(n, "aon_gpio" #n)
50 #define AON_SGPIO_PIN(n)	PINCTRL_PIN((n) + 32, "aon_sgpio" #n)
51 
52 struct pin_regs {
53 	u16 mux_bit;
54 	u16 pad_bit;
55 };
56 
57 /**
58  * struct brcmstb_pin_funcs - pins provide their primary/alternate
59  * functions in this struct
60  * @func_mask: mask representing valid bits of the function selector
61  *	in the registers
62  * @funcs: array of function identifiers
63  * @n_funcs: number of identifiers of the @funcs array above
64  */
65 struct brcmstb_pin_funcs {
66 	const u32 func_mask;
67 	const u8 *funcs;
68 	const unsigned int n_funcs;
69 };
70 
71 /**
72  * struct brcmstb_pdata - specific data for a pinctrl chip implementation
73  * @pctl_desc: pin controller descriptor for this implementation
74  * @gpio_range: range of GPIOs served by this controller
75  * @pin_regs: array of register descriptors for each pin
76  * @pin_funcs: array of all possible assignable function for each pin
77  * @func_count: total number of functions
78  * @func_gpio: which function number is GPIO (usually 0)
79  * @func_names: an array listing all function names
80  */
81 struct brcmstb_pdata {
82 	const struct pinctrl_desc *pctl_desc;
83 	const struct pinctrl_gpio_range *gpio_range;
84 	const struct pin_regs *pin_regs;
85 	const struct brcmstb_pin_funcs *pin_funcs;
86 	const unsigned int func_count;
87 	const unsigned int func_gpio;
88 	const char * const *func_names;
89 };
90 
91 int brcmstb_pinctrl_probe(struct platform_device *pdev);
92 
93 #endif
94