xref: /linux/drivers/pinctrl/bcm/Kconfig (revision c0c914eca7f251c70facc37dfebeaf176601918d)
1#
2# Broadcom pinctrl drivers
3#
4
5config PINCTRL_BCM281XX
6	bool "Broadcom BCM281xx pinctrl driver"
7	depends on OF && (ARCH_BCM_MOBILE || COMPILE_TEST)
8	select PINMUX
9	select PINCONF
10	select GENERIC_PINCONF
11	select REGMAP_MMIO
12	default ARCH_BCM_MOBILE
13	help
14	  Say Y here to support Broadcom BCM281xx pinctrl driver, which is used
15	  for the BCM281xx SoC family, including BCM11130, BCM11140, BCM11351,
16	  BCM28145, and BCM28155 SoCs.  This driver requires the pinctrl
17	  framework.  GPIO is provided by a separate GPIO driver.
18
19config PINCTRL_BCM2835
20	bool
21	select PINMUX
22	select PINCONF
23
24config PINCTRL_IPROC_GPIO
25	bool "Broadcom iProc GPIO (with PINCONF) driver"
26	depends on OF_GPIO && (ARCH_BCM_IPROC || COMPILE_TEST)
27	select GPIOLIB_IRQCHIP
28	select PINCONF
29	select GENERIC_PINCONF
30	default ARCH_BCM_IPROC
31	help
32	  Say yes here to enable the Broadcom iProc GPIO driver.
33
34	  The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
35	  same GPIO Controller IP hence this driver could be used for all.
36
37	  The Broadcom Cygnus SoC has 3 GPIO controllers including the ASIU
38	  GPIO controller (ASIU), the chipCommonG GPIO controller (CCM), and
39	  the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
40	  supported by this driver.
41
42	  The Broadcom NSP has two GPIO controllers including the ChipcommonA
43	  GPIO, the ChipcommonB GPIO. Later controller is supported by this
44	  driver.
45
46	  The Broadcom NS2 has two GPIO controller including the CRMU GPIO,
47	  the ChipcommonG GPIO. Both controllers are supported by this driver.
48
49	  The Broadcom Stingray GPIO controllers are supported by this driver.
50
51	  All above SoCs GPIO controllers support basic PINCONF functions such
52	  as bias pull up, pull down, and drive strength configurations, when
53	  these pins are muxed to GPIO.
54
55	  It provides the framework where pins from the individual GPIO can be
56	  individually muxed to GPIO function, through interaction with the
57	  SoCs IOMUX controller. This features could be used only on SoCs which
58	  support individual pin muxing.
59
60config PINCTRL_CYGNUS_MUX
61	bool "Broadcom Cygnus IOMUX driver"
62	depends on (ARCH_BCM_CYGNUS || COMPILE_TEST)
63	select PINMUX
64	select GENERIC_PINCONF
65	default ARCH_BCM_CYGNUS
66	help
67	  Say yes here to enable the Broadcom Cygnus IOMUX driver.
68
69	  The Broadcom Cygnus IOMUX driver supports group based IOMUX
70	  configuration, with the exception that certain individual pins
71	  can be overrided to GPIO function
72
73config PINCTRL_NSP_GPIO
74	bool "Broadcom NSP GPIO (with PINCONF) driver"
75	depends on OF_GPIO && (ARCH_BCM_NSP || COMPILE_TEST)
76	select GPIOLIB_IRQCHIP
77	select PINCONF
78	select GENERIC_PINCONF
79	default ARCH_BCM_NSP
80	help
81	  Say yes here to enable the Broadcom NSP GPIO driver.
82
83	  The Broadcom Northstar Plus SoC ChipcommonA GPIO controller is
84	  supported by this driver.
85
86	  The ChipcommonA GPIO controller support basic PINCONF functions such
87	  as bias pull up, pull down, and drive strength configurations, when
88	  these pins are muxed to GPIO.
89