1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2024, Linaro Limited 4 */ 5 6 #ifndef QCOM_PHY_QMP_QSERDES_TXRX_UFS_V7_H_ 7 #define QCOM_PHY_QMP_QSERDES_TXRX_UFS_V7_H_ 8 9 #define QSERDES_UFS_V7_TX_RES_CODE_LANE_TX 0x28 10 #define QSERDES_UFS_V7_TX_RES_CODE_LANE_RX 0x2c 11 #define QSERDES_UFS_V7_TX_RES_CODE_LANE_OFFSET_TX 0x30 12 #define QSERDES_UFS_V7_TX_RES_CODE_LANE_OFFSET_RX 0x34 13 #define QSERDES_UFS_V7_TX_LANE_MODE_1 0x7c 14 #define QSERDES_UFS_V7_TX_FR_DCC_CTRL 0x108 15 16 #define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_FO_GAIN_RATE4 0x10 17 #define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_SO_GAIN_RATE4 0x24 18 #define QSERDES_UFS_V7_RX_UCDR_SO_SATURATION 0x28 19 #define QSERDES_UFS_V7_RX_UCDR_FASTLOCK_COUNT_HIGH_RATE4 0x54 20 #define QSERDES_UFS_V7_RX_UCDR_PI_CTRL1 0x58 21 #define QSERDES_UFS_V7_RX_TERM_BW_CTRL0 0xc4 22 #define QSERDES_UFS_V7_RX_UCDR_FO_GAIN_RATE2 0xd4 23 #define QSERDES_UFS_V7_RX_UCDR_FO_GAIN_RATE4 0xdc 24 #define QSERDES_UFS_V7_RX_UCDR_SO_GAIN_RATE4 0xf0 25 #define QSERDES_UFS_V7_RX_UCDR_PI_CONTROLS 0xf4 26 #define QSERDES_UFS_V7_RX_VGA_CAL_MAN_VAL 0x178 27 #define QSERDES_UFS_V7_RX_EQU_ADAPTOR_CNTRL4 0x1b4 28 #define QSERDES_UFS_V7_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x1cc 29 #define QSERDES_UFS_V7_RX_OFFSET_ADAPTOR_CNTRL3 0x1d4 30 #define QSERDES_UFS_V7_RX_INTERFACE_MODE 0x1f0 31 #define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B0 0x218 32 #define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B1 0x21C 33 #define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B2 0x220 34 #define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B3 0x224 35 #define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B4 0x228 36 #define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B6 0x230 37 #define QSERDES_UFS_V7_RX_MODE_RATE_0_1_B7 0x234 38 #define QSERDES_UFS_V7_RX_MODE_RATE2_B3 0x248 39 #define QSERDES_UFS_V7_RX_MODE_RATE2_B6 0x254 40 #define QSERDES_UFS_V7_RX_MODE_RATE2_B7 0x258 41 #define QSERDES_UFS_V7_RX_MODE_RATE3_B0 0x260 42 #define QSERDES_UFS_V7_RX_MODE_RATE3_B1 0x264 43 #define QSERDES_UFS_V7_RX_MODE_RATE3_B2 0x268 44 #define QSERDES_UFS_V7_RX_MODE_RATE3_B3 0x26c 45 #define QSERDES_UFS_V7_RX_MODE_RATE3_B4 0x270 46 #define QSERDES_UFS_V7_RX_MODE_RATE3_B5 0x274 47 #define QSERDES_UFS_V7_RX_MODE_RATE3_B7 0x27c 48 #define QSERDES_UFS_V7_RX_MODE_RATE3_B8 0x280 49 #define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B0 0x284 50 #define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B1 0x288 51 #define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B2 0x28c 52 #define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B3 0x290 53 #define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B4 0x294 54 #define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B5 0x298 55 #define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B6 0x29c 56 #define QSERDES_UFS_V7_RX_MODE_RATE4_SA_B7 0x2a0 57 #define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B0 0x2a8 58 #define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B1 0x2ac 59 #define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B2 0x2b0 60 #define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B3 0x2b4 61 #define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B4 0x2b8 62 #define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B5 0x2bc 63 #define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B6 0x2c0 64 #define QSERDES_UFS_V7_RX_MODE_RATE4_SB_B7 0x2c4 65 #define QSERDES_UFS_V7_RX_DLL0_FTUNE_CTRL 0x348 66 #define QSERDES_UFS_V7_RX_SIGDET_CAL_TRIM 0x380 67 #endif 68