1# SPDX-License-Identifier: GPL-2.0-only 2# 3# Phy drivers for Qualcomm and Atheros platforms 4# 5config PHY_ATH79_USB 6 tristate "Atheros AR71XX/9XXX USB PHY driver" 7 depends on OF && (ATH79 || COMPILE_TEST) 8 default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM 9 select RESET_CONTROLLER 10 select GENERIC_PHY 11 help 12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs. 13 14config PHY_QCOM_APQ8064_SATA 15 tristate "Qualcomm APQ8064 SATA SerDes/PHY driver" 16 depends on ARCH_QCOM 17 depends on HAS_IOMEM 18 depends on OF 19 select GENERIC_PHY 20 21config PHY_QCOM_IPQ4019_USB 22 tristate "Qualcomm IPQ4019 USB PHY driver" 23 depends on OF && (ARCH_QCOM || COMPILE_TEST) 24 select GENERIC_PHY 25 help 26 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s. 27 28config PHY_QCOM_IPQ806X_SATA 29 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver" 30 depends on ARCH_QCOM 31 depends on HAS_IOMEM 32 depends on OF 33 select GENERIC_PHY 34 35config PHY_QCOM_PCIE2 36 tristate "Qualcomm PCIe Gen2 PHY Driver" 37 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST) 38 select GENERIC_PHY 39 help 40 Enable this to support the Qualcomm PCIe PHY, used with the Synopsys 41 based PCIe controller. 42 43config PHY_QCOM_QMP 44 tristate "Qualcomm QMP PHY Driver" 45 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST) 46 select GENERIC_PHY 47 help 48 Enable this to support the QMP PHY transceiver that is used 49 with controllers such as PCIe, UFS, and USB on Qualcomm chips. 50 51config PHY_QCOM_QUSB2 52 tristate "Qualcomm QUSB2 PHY Driver" 53 depends on OF && (ARCH_QCOM || COMPILE_TEST) 54 depends on NVMEM || !NVMEM 55 select GENERIC_PHY 56 help 57 Enable this to support the HighSpeed QUSB2 PHY transceiver for USB 58 controllers on Qualcomm chips. This driver supports the high-speed 59 PHY which is usually paired with either the ChipIdea or Synopsys DWC3 60 USB IPs on MSM SOCs. 61 62config PHY_QCOM_UFS 63 tristate "Qualcomm UFS PHY driver" 64 depends on OF && ARCH_QCOM 65 select GENERIC_PHY 66 help 67 Support for UFS PHY on QCOM chipsets. 68 69if PHY_QCOM_UFS 70 71config PHY_QCOM_UFS_14NM 72 tristate 73 default PHY_QCOM_UFS 74 help 75 Support for 14nm UFS QMP phy present on QCOM chipsets. 76 77config PHY_QCOM_UFS_20NM 78 tristate 79 default PHY_QCOM_UFS 80 depends on BROKEN 81 help 82 Support for 20nm UFS QMP phy present on QCOM chipsets. 83 84endif 85 86config PHY_QCOM_USB_HS 87 tristate "Qualcomm USB HS PHY module" 88 depends on USB_ULPI_BUS 89 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in 90 select GENERIC_PHY 91 help 92 Support for the USB high-speed ULPI compliant phy on Qualcomm 93 chipsets. 94 95config PHY_QCOM_USB_SNPS_FEMTO_V2 96 tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module" 97 depends on OF && (ARCH_QCOM || COMPILE_TEST) 98 select GENERIC_PHY 99 help 100 Enable support for the USB high-speed SNPS Femto phy on Qualcomm 101 chipsets. This PHY has differences in the register map compared 102 to the V1 variants. The PHY is paired with a Synopsys DWC3 USB 103 controller on Qualcomm SOCs. 104 105config PHY_QCOM_USB_HSIC 106 tristate "Qualcomm USB HSIC ULPI PHY module" 107 depends on USB_ULPI_BUS 108 select GENERIC_PHY 109 help 110 Support for the USB HSIC ULPI compliant PHY on QCOM chipsets. 111 112config PHY_QCOM_USB_HS_28NM 113 tristate "Qualcomm 28nm High-Speed PHY" 114 depends on ARCH_QCOM || COMPILE_TEST 115 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in 116 select GENERIC_PHY 117 help 118 Enable this to support the Qualcomm Synopsys DesignWare Core 28nm 119 High-Speed PHY driver. This driver supports the Hi-Speed PHY which 120 is usually paired with either the ChipIdea or Synopsys DWC3 USB 121 IPs on MSM SOCs. 122 123config PHY_QCOM_USB_SS 124 tristate "Qualcomm USB Super-Speed PHY driver" 125 depends on ARCH_QCOM || COMPILE_TEST 126 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in 127 select GENERIC_PHY 128 help 129 Enable this to support the Super-Speed USB transceiver on various 130 Qualcomm chipsets. 131