xref: /linux/drivers/phy/phy-nxp-tja1145.c (revision 3d5e48944e824bddc20d7b874e784f7b279636fe)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2025 Liebherr-Electronics and Drives GmbH
4  */
5 #include <linux/module.h>
6 #include <linux/regmap.h>
7 
8 #include <linux/phy/phy.h>
9 #include <linux/spi/spi.h>
10 
11 #define TJA1145_MODE_CTRL		0x01
12 #define TJA1145_MODE_CTRL_MC		GENMASK(2, 0)
13 #define TJA1145_MODE_CTRL_STBY		BIT(2)
14 #define TJA1145_MODE_CTRL_NORMAL	TJA1145_MODE_CTRL_MC
15 
16 #define TJA1145_CAN_CTRL		0x20
17 #define TJA1145_CAN_CTRL_CMC		GENMASK(1, 0)
18 #define TJA1145_CAN_CTRL_ACTIVE		BIT(1)
19 
20 #define TJA1145_IDENT			0x7e
21 #define TJA1145_IDENT_TJA1145T		0x70
22 
23 #define TJA1145_SPI_READ_BIT		BIT(0)
24 #define TJA1145T_MAX_BITRATE		1000000
25 
26 static int tja1145_phy_power_on(struct phy *phy)
27 {
28 	struct regmap *map = phy_get_drvdata(phy);
29 	int ret;
30 
31 	/*
32 	 * Switch operating mode to normal which is the active operating mode.
33 	 * In this mode, the device is fully operational.
34 	 */
35 	ret = regmap_update_bits(map, TJA1145_MODE_CTRL, TJA1145_MODE_CTRL_MC,
36 				 TJA1145_MODE_CTRL_NORMAL);
37 	if (ret)
38 		return ret;
39 
40 	/*
41 	 * Switch to CAN operating mode active where the PHY can transmit and
42 	 * receive data.
43 	 */
44 	return regmap_update_bits(map, TJA1145_CAN_CTRL, TJA1145_CAN_CTRL_CMC,
45 				  TJA1145_CAN_CTRL_ACTIVE);
46 }
47 
48 static int tja1145_phy_power_off(struct phy *phy)
49 {
50 	struct regmap *map = phy_get_drvdata(phy);
51 
52 	/*
53 	 * Switch to operating mode standby, the PHY is unable to transmit or
54 	 * receive data in standby mode.
55 	 */
56 	return regmap_update_bits(map, TJA1145_MODE_CTRL, TJA1145_MODE_CTRL_MC,
57 				  TJA1145_MODE_CTRL_STBY);
58 }
59 
60 static const struct phy_ops tja1145_phy_ops = {
61 	.power_on = tja1145_phy_power_on,
62 	.power_off = tja1145_phy_power_off,
63 	.owner = THIS_MODULE,
64 };
65 
66 static const struct regmap_range tja1145_wr_holes_ranges[] = {
67 	regmap_reg_range(0x00, 0x00),
68 	regmap_reg_range(0x02, 0x03),
69 	regmap_reg_range(0x05, 0x05),
70 	regmap_reg_range(0x0b, 0x1f),
71 	regmap_reg_range(0x21, 0x22),
72 	regmap_reg_range(0x24, 0x25),
73 	regmap_reg_range(0x30, 0x4b),
74 	regmap_reg_range(0x4d, 0x60),
75 	regmap_reg_range(0x62, 0x62),
76 	regmap_reg_range(0x65, 0x67),
77 	regmap_reg_range(0x70, 0xff),
78 };
79 
80 static const struct regmap_access_table tja1145_wr_table = {
81 	.no_ranges = tja1145_wr_holes_ranges,
82 	.n_no_ranges = ARRAY_SIZE(tja1145_wr_holes_ranges),
83 };
84 
85 static const struct regmap_range tja1145_rd_holes_ranges[] = {
86 	regmap_reg_range(0x00, 0x00),
87 	regmap_reg_range(0x02, 0x02),
88 	regmap_reg_range(0x05, 0x05),
89 	regmap_reg_range(0x0b, 0x1f),
90 	regmap_reg_range(0x21, 0x21),
91 	regmap_reg_range(0x24, 0x25),
92 	regmap_reg_range(0x30, 0x4a),
93 	regmap_reg_range(0x4d, 0x5f),
94 	regmap_reg_range(0x62, 0x62),
95 	regmap_reg_range(0x65, 0x67),
96 	regmap_reg_range(0x70, 0x7d),
97 	regmap_reg_range(0x7f, 0xff),
98 };
99 
100 static const struct regmap_access_table tja1145_rd_table = {
101 	.no_ranges = tja1145_rd_holes_ranges,
102 	.n_no_ranges = ARRAY_SIZE(tja1145_rd_holes_ranges),
103 };
104 
105 static const struct regmap_config tja1145_regmap_config = {
106 	.reg_bits = 8,
107 	.reg_shift = -1,
108 	.val_bits = 8,
109 	.wr_table = &tja1145_wr_table,
110 	.rd_table = &tja1145_rd_table,
111 	.read_flag_mask = TJA1145_SPI_READ_BIT,
112 	.max_register = TJA1145_IDENT,
113 };
114 
115 static int tja1145_check_ident(struct device *dev, struct regmap *map)
116 {
117 	unsigned int val;
118 	int ret;
119 
120 	ret = regmap_read(map, TJA1145_IDENT, &val);
121 	if (ret)
122 		return ret;
123 
124 	if (val != TJA1145_IDENT_TJA1145T) {
125 		dev_err(dev, "Expected device id: 0x%02x, got: 0x%02x\n",
126 			TJA1145_IDENT_TJA1145T, val);
127 		return -ENODEV;
128 	}
129 
130 	return 0;
131 }
132 
133 static int tja1145_probe(struct spi_device *spi)
134 {
135 	struct phy_provider *phy_provider;
136 	struct device *dev = &spi->dev;
137 	struct regmap *map;
138 	struct phy *phy;
139 	int ret;
140 
141 	map = devm_regmap_init_spi(spi, &tja1145_regmap_config);
142 	if (IS_ERR(map))
143 		return dev_err_probe(dev, PTR_ERR(map), "failed to init regmap\n");
144 
145 	ret = tja1145_check_ident(dev, map);
146 	if (ret)
147 		return dev_err_probe(dev, ret, "failed to identify device\n");
148 
149 	phy = devm_phy_create(dev, dev->of_node, &tja1145_phy_ops);
150 	if (IS_ERR(phy))
151 		return dev_err_probe(dev, PTR_ERR(phy), "failed to create PHY\n");
152 
153 	phy->attrs.max_link_rate = TJA1145T_MAX_BITRATE;
154 	phy_set_drvdata(phy, map);
155 	phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
156 
157 	return PTR_ERR_OR_ZERO(phy_provider);
158 }
159 
160 static const struct spi_device_id tja1145_spi_id[] = {
161 	{ "tja1145" },
162 	{ }
163 };
164 MODULE_DEVICE_TABLE(spi, tja1145_spi_id);
165 
166 static const struct of_device_id tja1145_of_match[] = {
167 	{ .compatible = "nxp,tja1145" },
168 	{ }
169 };
170 MODULE_DEVICE_TABLE(of, tja1145_of_match);
171 
172 static struct spi_driver tja1145_driver = {
173 	.driver = {
174 		.name = "tja1145",
175 		.of_match_table = tja1145_of_match,
176 	},
177 	.probe = tja1145_probe,
178 	.id_table = tja1145_spi_id,
179 };
180 module_spi_driver(tja1145_driver);
181 
182 MODULE_DESCRIPTION("NXP TJA1145 CAN transceiver PHY driver");
183 MODULE_AUTHOR("Dimitri Fedrau <dimitri.fedrau@liebherr.com>");
184 MODULE_LICENSE("GPL");
185