1# SPDX-License-Identifier: GPL-2.0-only 2# 3# PHY 4# 5 6menu "PHY Subsystem" 7 8config PHY_COMMON_PROPS 9 bool "PHY common properties" if KUNIT_ALL_TESTS 10 help 11 This parses properties common between generic PHYs and Ethernet PHYs. 12 13 Select this from consumer drivers to gain access to helpers for 14 parsing properties from the 15 Documentation/devicetree/bindings/phy/phy-common-props.yaml schema. 16 17config PHY_COMMON_PROPS_TEST 18 tristate "KUnit tests for PHY common props" if !KUNIT_ALL_TESTS 19 depends on KUNIT && PHY_COMMON_PROPS 20 default KUNIT_ALL_TESTS 21 help 22 This builds KUnit tests for the PHY common property API. 23 24 For more information on KUnit and unit tests in general, 25 please refer to the KUnit documentation in Documentation/dev-tools/kunit/. 26 27 When in doubt, say N. 28 29config GENERIC_PHY 30 bool "PHY Core" 31 help 32 Generic PHY support. 33 34 This framework is designed to provide a generic interface for PHY 35 devices present in the kernel. This layer will have the generic 36 API by which phy drivers can create PHY using the phy framework and 37 phy users can obtain reference to the PHY. All the users of this 38 framework should select this config. 39 40config GENERIC_PHY_MIPI_DPHY 41 bool 42 select GENERIC_PHY 43 help 44 Generic MIPI D-PHY support. 45 46 Provides a number of helpers a core functions for MIPI D-PHY 47 drivers to us. 48 49config PHY_AIROHA_PCIE 50 tristate "Airoha PCIe-PHY Driver" 51 depends on ARCH_AIROHA || COMPILE_TEST 52 depends on OF 53 select GENERIC_PHY 54 help 55 Say Y here to add support for Airoha PCIe PHY driver. 56 This driver create the basic PHY instance and provides initialize 57 callback for PCIe GEN3 port. 58 59config PHY_CAN_TRANSCEIVER 60 tristate "CAN transceiver PHY" 61 select GENERIC_PHY 62 select MULTIPLEXER 63 help 64 This option enables support for CAN transceivers as a PHY. This 65 driver provides function for putting the transceivers in various 66 functional modes using gpios and sets the attribute max link 67 rate, for CAN drivers. 68 69config PHY_GOOGLE_USB 70 tristate "Google Tensor SoC USB PHY driver" 71 select GENERIC_PHY 72 depends on TYPEC 73 help 74 Enable support for the USB PHY on Google Tensor SoCs, starting with 75 the G5 generation (Laguna). This driver provides the PHY interfaces 76 to interact with the SNPS eUSB2 and USB 3.2/DisplayPort Combo PHY, 77 both of which are integrated with the DWC3 USB DRD controller. 78 This driver currently supports USB high-speed. 79 80config USB_LGM_PHY 81 tristate "INTEL Lightning Mountain USB PHY Driver" 82 depends on USB_SUPPORT 83 depends on X86 || COMPILE_TEST 84 select USB_PHY 85 select REGULATOR 86 select REGULATOR_FIXED_VOLTAGE 87 help 88 Enable this to support Intel DWC3 PHY USB phy. This driver provides 89 interface to interact with USB GEN-II and USB 3.x PHY that is part 90 of the Intel network SOC. 91 92config PHY_LPC18XX_USB_OTG 93 tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" 94 depends on OF && (ARCH_LPC18XX || COMPILE_TEST) 95 depends on MFD_SYSCON 96 select GENERIC_PHY 97 help 98 Enable this to support NXP LPC18xx/43xx internal USB OTG PHY. 99 100 This driver is need for USB0 support on LPC18xx/43xx and takes 101 care of enabling and clock setup. 102 103config PHY_NXP_PTN3222 104 tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver" 105 depends on I2C 106 depends on OF 107 select GENERIC_PHY 108 help 109 Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver. 110 This redriver performs translation between eUSB2 and USB2 signalling 111 schemes. It supports all three USB 2.0 data rates: Low Speed, Full 112 Speed and High Speed. 113 114config PHY_PISTACHIO_USB 115 tristate "IMG Pistachio USB2.0 PHY driver" 116 depends on MIPS || COMPILE_TEST 117 select GENERIC_PHY 118 help 119 Enable this to support the USB2.0 PHY on the IMG Pistachio SoC. 120 121config PHY_SNPS_EUSB2 122 tristate "SNPS eUSB2 PHY Driver" 123 depends on OF && (ARCH_EXYNOS || ARCH_QCOM || COMPILE_TEST) 124 select GENERIC_PHY 125 help 126 Enable support for the USB high-speed SNPS eUSB2 phy on select 127 SoCs. The PHY is usually paired with a Synopsys DWC3 USB controller. 128 129config PHY_XGENE 130 tristate "APM X-Gene 15Gbps PHY support" 131 depends on HAS_IOMEM && OF && (ARCH_XGENE || COMPILE_TEST) 132 select GENERIC_PHY 133 help 134 This option enables support for APM X-Gene SoC multi-purpose PHY. 135 136source "drivers/phy/allwinner/Kconfig" 137source "drivers/phy/amlogic/Kconfig" 138source "drivers/phy/apple/Kconfig" 139source "drivers/phy/broadcom/Kconfig" 140source "drivers/phy/cadence/Kconfig" 141source "drivers/phy/canaan/Kconfig" 142source "drivers/phy/eswin/Kconfig" 143source "drivers/phy/freescale/Kconfig" 144source "drivers/phy/hisilicon/Kconfig" 145source "drivers/phy/ingenic/Kconfig" 146source "drivers/phy/intel/Kconfig" 147source "drivers/phy/lantiq/Kconfig" 148source "drivers/phy/marvell/Kconfig" 149source "drivers/phy/mediatek/Kconfig" 150source "drivers/phy/microchip/Kconfig" 151source "drivers/phy/motorola/Kconfig" 152source "drivers/phy/mscc/Kconfig" 153source "drivers/phy/nuvoton/Kconfig" 154source "drivers/phy/qualcomm/Kconfig" 155source "drivers/phy/ralink/Kconfig" 156source "drivers/phy/realtek/Kconfig" 157source "drivers/phy/renesas/Kconfig" 158source "drivers/phy/rockchip/Kconfig" 159source "drivers/phy/samsung/Kconfig" 160source "drivers/phy/socionext/Kconfig" 161source "drivers/phy/sophgo/Kconfig" 162source "drivers/phy/spacemit/Kconfig" 163source "drivers/phy/st/Kconfig" 164source "drivers/phy/starfive/Kconfig" 165source "drivers/phy/sunplus/Kconfig" 166source "drivers/phy/tegra/Kconfig" 167source "drivers/phy/ti/Kconfig" 168source "drivers/phy/xilinx/Kconfig" 169 170endmenu 171