xref: /linux/drivers/phy/Kconfig (revision dee40773abe543723adab47319bc25dc70de10a2)
1# SPDX-License-Identifier: GPL-2.0-only
2#
3# PHY
4#
5
6menu "PHY Subsystem"
7
8config PHY_COMMON_PROPS
9	bool
10	help
11	  This parses properties common between generic PHYs and Ethernet PHYs.
12
13	  Select this from consumer drivers to gain access to helpers for
14	  parsing properties from the
15	  Documentation/devicetree/bindings/phy/phy-common-props.yaml schema.
16
17config PHY_COMMON_PROPS_TEST
18	tristate "KUnit tests for PHY common props" if !KUNIT_ALL_TESTS
19	select PHY_COMMON_PROPS
20	depends on KUNIT
21	default KUNIT_ALL_TESTS
22	help
23	  This builds KUnit tests for the PHY common property API.
24
25	  For more information on KUnit and unit tests in general,
26	  please refer to the KUnit documentation in Documentation/dev-tools/kunit/.
27
28	  When in doubt, say N.
29
30config GENERIC_PHY
31	bool "PHY Core"
32	help
33	  Generic PHY support.
34
35	  This framework is designed to provide a generic interface for PHY
36	  devices present in the kernel. This layer will have the generic
37	  API by which phy drivers can create PHY using the phy framework and
38	  phy users can obtain reference to the PHY. All the users of this
39	  framework should select this config.
40
41config GENERIC_PHY_MIPI_DPHY
42	bool
43	select GENERIC_PHY
44	help
45	  Generic MIPI D-PHY support.
46
47	  Provides a number of helpers a core functions for MIPI D-PHY
48	  drivers to us.
49
50config PHY_AIROHA_PCIE
51	tristate "Airoha PCIe-PHY Driver"
52	depends on ARCH_AIROHA || COMPILE_TEST
53	depends on OF
54	select GENERIC_PHY
55	help
56	  Say Y here to add support for Airoha PCIe PHY driver.
57	  This driver create the basic PHY instance and provides initialize
58	  callback for PCIe GEN3 port.
59
60config PHY_CAN_TRANSCEIVER
61	tristate "CAN transceiver PHY"
62	select GENERIC_PHY
63	select MULTIPLEXER
64	help
65	  This option enables support for CAN transceivers as a PHY. This
66	  driver provides function for putting the transceivers in various
67	  functional modes using gpios and sets the attribute max link
68	  rate, for CAN drivers.
69
70config PHY_GOOGLE_USB
71	tristate "Google Tensor SoC USB PHY driver"
72	select GENERIC_PHY
73	depends on TYPEC
74	help
75	  Enable support for the USB PHY on Google Tensor SoCs, starting with
76	  the G5 generation (Laguna). This driver provides the PHY interfaces
77	  to interact with the SNPS eUSB2 and USB 3.2/DisplayPort Combo PHY,
78	  both of which are integrated with the DWC3 USB DRD controller.
79	  This driver currently supports USB high-speed.
80
81config USB_LGM_PHY
82	tristate "INTEL Lightning Mountain USB PHY Driver"
83	depends on USB_SUPPORT
84	depends on X86 || COMPILE_TEST
85	select USB_PHY
86	select REGULATOR
87	select REGULATOR_FIXED_VOLTAGE
88	help
89	  Enable this to support Intel DWC3 PHY USB phy. This driver provides
90	  interface to interact with USB GEN-II and USB 3.x PHY that is part
91	  of the Intel network SOC.
92
93config PHY_LPC18XX_USB_OTG
94	tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
95	depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
96	depends on MFD_SYSCON
97	select GENERIC_PHY
98	help
99	  Enable this to support NXP LPC18xx/43xx internal USB OTG PHY.
100
101	  This driver is need for USB0 support on LPC18xx/43xx and takes
102	  care of enabling and clock setup.
103
104config PHY_NXP_PTN3222
105	tristate "NXP PTN3222 1-port eUSB2 to USB2 redriver"
106	depends on I2C
107	depends on OF
108	select GENERIC_PHY
109	help
110	  Enable this to support NXP PTN3222 1-port eUSB2 to USB2 Redriver.
111	  This redriver performs translation between eUSB2 and USB2 signalling
112	  schemes. It supports all three USB 2.0 data rates: Low Speed, Full
113	  Speed and High Speed.
114
115config PHY_PISTACHIO_USB
116	tristate "IMG Pistachio USB2.0 PHY driver"
117	depends on MIPS || COMPILE_TEST
118	select GENERIC_PHY
119	help
120	  Enable this to support the USB2.0 PHY on the IMG Pistachio SoC.
121
122config PHY_SNPS_EUSB2
123	tristate "SNPS eUSB2 PHY Driver"
124	depends on OF && (ARCH_EXYNOS || ARCH_QCOM || COMPILE_TEST)
125	select GENERIC_PHY
126	help
127	  Enable support for the USB high-speed SNPS eUSB2 phy on select
128	  SoCs. The PHY is usually paired with a Synopsys DWC3 USB controller.
129
130config PHY_XGENE
131	tristate "APM X-Gene 15Gbps PHY support"
132	depends on HAS_IOMEM && OF && (ARCH_XGENE || COMPILE_TEST)
133	select GENERIC_PHY
134	help
135	  This option enables support for APM X-Gene SoC multi-purpose PHY.
136
137source "drivers/phy/allwinner/Kconfig"
138source "drivers/phy/amlogic/Kconfig"
139source "drivers/phy/apple/Kconfig"
140source "drivers/phy/broadcom/Kconfig"
141source "drivers/phy/cadence/Kconfig"
142source "drivers/phy/freescale/Kconfig"
143source "drivers/phy/hisilicon/Kconfig"
144source "drivers/phy/ingenic/Kconfig"
145source "drivers/phy/intel/Kconfig"
146source "drivers/phy/lantiq/Kconfig"
147source "drivers/phy/marvell/Kconfig"
148source "drivers/phy/mediatek/Kconfig"
149source "drivers/phy/microchip/Kconfig"
150source "drivers/phy/motorola/Kconfig"
151source "drivers/phy/mscc/Kconfig"
152source "drivers/phy/nuvoton/Kconfig"
153source "drivers/phy/qualcomm/Kconfig"
154source "drivers/phy/ralink/Kconfig"
155source "drivers/phy/realtek/Kconfig"
156source "drivers/phy/renesas/Kconfig"
157source "drivers/phy/rockchip/Kconfig"
158source "drivers/phy/samsung/Kconfig"
159source "drivers/phy/socionext/Kconfig"
160source "drivers/phy/sophgo/Kconfig"
161source "drivers/phy/spacemit/Kconfig"
162source "drivers/phy/st/Kconfig"
163source "drivers/phy/starfive/Kconfig"
164source "drivers/phy/sunplus/Kconfig"
165source "drivers/phy/tegra/Kconfig"
166source "drivers/phy/ti/Kconfig"
167source "drivers/phy/xilinx/Kconfig"
168
169endmenu
170