1# SPDX-License-Identifier: GPL-2.0-only 2# 3# PHY 4# 5 6menu "PHY Subsystem" 7 8config GENERIC_PHY 9 bool "PHY Core" 10 help 11 Generic PHY support. 12 13 This framework is designed to provide a generic interface for PHY 14 devices present in the kernel. This layer will have the generic 15 API by which phy drivers can create PHY using the phy framework and 16 phy users can obtain reference to the PHY. All the users of this 17 framework should select this config. 18 19config GENERIC_PHY_MIPI_DPHY 20 bool 21 help 22 Generic MIPI D-PHY support. 23 24 Provides a number of helpers a core functions for MIPI D-PHY 25 drivers to us. 26 27config PHY_LPC18XX_USB_OTG 28 tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" 29 depends on OF && (ARCH_LPC18XX || COMPILE_TEST) 30 depends on MFD_SYSCON 31 select GENERIC_PHY 32 help 33 Enable this to support NXP LPC18xx/43xx internal USB OTG PHY. 34 35 This driver is need for USB0 support on LPC18xx/43xx and takes 36 care of enabling and clock setup. 37 38config PHY_PISTACHIO_USB 39 tristate "IMG Pistachio USB2.0 PHY driver" 40 depends on MIPS || COMPILE_TEST 41 select GENERIC_PHY 42 help 43 Enable this to support the USB2.0 PHY on the IMG Pistachio SoC. 44 45config PHY_XGENE 46 tristate "APM X-Gene 15Gbps PHY support" 47 depends on HAS_IOMEM && OF && (ARM64 || COMPILE_TEST) 48 select GENERIC_PHY 49 help 50 This option enables support for APM X-Gene SoC multi-purpose PHY. 51 52config USB_LGM_PHY 53 tristate "INTEL Lightning Mountain USB PHY Driver" 54 depends on USB_SUPPORT 55 depends on X86 || COMPILE_TEST 56 select USB_PHY 57 select REGULATOR 58 select REGULATOR_FIXED_VOLTAGE 59 help 60 Enable this to support Intel DWC3 PHY USB phy. This driver provides 61 interface to interact with USB GEN-II and USB 3.x PHY that is part 62 of the Intel network SOC. 63 64config PHY_CAN_TRANSCEIVER 65 tristate "CAN transceiver PHY" 66 select GENERIC_PHY 67 select MULTIPLEXER 68 help 69 This option enables support for CAN transceivers as a PHY. This 70 driver provides function for putting the transceivers in various 71 functional modes using gpios and sets the attribute max link 72 rate, for CAN drivers. 73 74source "drivers/phy/allwinner/Kconfig" 75source "drivers/phy/amlogic/Kconfig" 76source "drivers/phy/broadcom/Kconfig" 77source "drivers/phy/cadence/Kconfig" 78source "drivers/phy/freescale/Kconfig" 79source "drivers/phy/hisilicon/Kconfig" 80source "drivers/phy/ingenic/Kconfig" 81source "drivers/phy/lantiq/Kconfig" 82source "drivers/phy/marvell/Kconfig" 83source "drivers/phy/mediatek/Kconfig" 84source "drivers/phy/microchip/Kconfig" 85source "drivers/phy/motorola/Kconfig" 86source "drivers/phy/mscc/Kconfig" 87source "drivers/phy/qualcomm/Kconfig" 88source "drivers/phy/ralink/Kconfig" 89source "drivers/phy/renesas/Kconfig" 90source "drivers/phy/rockchip/Kconfig" 91source "drivers/phy/samsung/Kconfig" 92source "drivers/phy/socionext/Kconfig" 93source "drivers/phy/st/Kconfig" 94source "drivers/phy/sunplus/Kconfig" 95source "drivers/phy/tegra/Kconfig" 96source "drivers/phy/ti/Kconfig" 97source "drivers/phy/intel/Kconfig" 98source "drivers/phy/xilinx/Kconfig" 99 100endmenu 101