xref: /linux/drivers/pci/controller/dwc/Kconfig (revision a98d2187efd9e6d554efb50e3ed3a2983d340fe5)
16e0832faSShawn Lin# SPDX-License-Identifier: GPL-2.0
26e0832faSShawn Lin
36e0832faSShawn Linmenu "DesignWare PCI Core Support"
46e0832faSShawn Lin	depends on PCI
56e0832faSShawn Lin
66e0832faSShawn Linconfig PCIE_DW
76e0832faSShawn Lin	bool
86e0832faSShawn Lin
96e0832faSShawn Linconfig PCIE_DW_HOST
106e0832faSShawn Lin	bool
116e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
126e0832faSShawn Lin	select PCIE_DW
136e0832faSShawn Lin
146e0832faSShawn Linconfig PCIE_DW_EP
156e0832faSShawn Lin	bool
166e0832faSShawn Lin	depends on PCI_ENDPOINT
176e0832faSShawn Lin	select PCIE_DW
186e0832faSShawn Lin
196e0832faSShawn Linconfig PCI_DRA7XX
206e0832faSShawn Lin	bool
216e0832faSShawn Lin
226e0832faSShawn Linconfig PCI_DRA7XX_HOST
236e0832faSShawn Lin	bool "TI DRA7xx PCIe controller Host Mode"
246e0832faSShawn Lin	depends on SOC_DRA7XX || COMPILE_TEST
256e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
266e0832faSShawn Lin	depends on OF && HAS_IOMEM && TI_PIPE3
276e0832faSShawn Lin	select PCIE_DW_HOST
286e0832faSShawn Lin	select PCI_DRA7XX
2994b84ac1SBjorn Helgaas	default y if SOC_DRA7XX
306e0832faSShawn Lin	help
316e0832faSShawn Lin	  Enables support for the PCIe controller in the DRA7xx SoC to work in
326e0832faSShawn Lin	  host mode. There are two instances of PCIe controller in DRA7xx.
336e0832faSShawn Lin	  This controller can work either as EP or RC. In order to enable
346e0832faSShawn Lin	  host-specific features PCI_DRA7XX_HOST must be selected and in order
356e0832faSShawn Lin	  to enable device-specific features PCI_DRA7XX_EP must be selected.
366e0832faSShawn Lin	  This uses the DesignWare core.
376e0832faSShawn Lin
386e0832faSShawn Linconfig PCI_DRA7XX_EP
396e0832faSShawn Lin	bool "TI DRA7xx PCIe controller Endpoint Mode"
406e0832faSShawn Lin	depends on SOC_DRA7XX || COMPILE_TEST
416e0832faSShawn Lin	depends on PCI_ENDPOINT
426e0832faSShawn Lin	depends on OF && HAS_IOMEM && TI_PIPE3
436e0832faSShawn Lin	select PCIE_DW_EP
446e0832faSShawn Lin	select PCI_DRA7XX
456e0832faSShawn Lin	help
466e0832faSShawn Lin	  Enables support for the PCIe controller in the DRA7xx SoC to work in
476e0832faSShawn Lin	  endpoint mode. There are two instances of PCIe controller in DRA7xx.
486e0832faSShawn Lin	  This controller can work either as EP or RC. In order to enable
496e0832faSShawn Lin	  host-specific features PCI_DRA7XX_HOST must be selected and in order
506e0832faSShawn Lin	  to enable device-specific features PCI_DRA7XX_EP must be selected.
516e0832faSShawn Lin	  This uses the DesignWare core.
526e0832faSShawn Lin
536e0832faSShawn Linconfig PCIE_DW_PLAT
546e0832faSShawn Lin	bool
556e0832faSShawn Lin
566e0832faSShawn Linconfig PCIE_DW_PLAT_HOST
576e0832faSShawn Lin	bool "Platform bus based DesignWare PCIe Controller - Host mode"
586e0832faSShawn Lin	depends on PCI && PCI_MSI_IRQ_DOMAIN
596e0832faSShawn Lin	select PCIE_DW_HOST
606e0832faSShawn Lin	select PCIE_DW_PLAT
616e0832faSShawn Lin	help
626e0832faSShawn Lin	  Enables support for the PCIe controller in the Designware IP to
636e0832faSShawn Lin	  work in host mode. There are two instances of PCIe controller in
646e0832faSShawn Lin	  Designware IP.
656e0832faSShawn Lin	  This controller can work either as EP or RC. In order to enable
666e0832faSShawn Lin	  host-specific features PCIE_DW_PLAT_HOST must be selected and in
676e0832faSShawn Lin	  order to enable device-specific features PCI_DW_PLAT_EP must be
686e0832faSShawn Lin	  selected.
696e0832faSShawn Lin
706e0832faSShawn Linconfig PCIE_DW_PLAT_EP
716e0832faSShawn Lin	bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
726e0832faSShawn Lin	depends on PCI && PCI_MSI_IRQ_DOMAIN
736e0832faSShawn Lin	depends on PCI_ENDPOINT
746e0832faSShawn Lin	select PCIE_DW_EP
756e0832faSShawn Lin	select PCIE_DW_PLAT
766e0832faSShawn Lin	help
776e0832faSShawn Lin	  Enables support for the PCIe controller in the Designware IP to
786e0832faSShawn Lin	  work in endpoint mode. There are two instances of PCIe controller
796e0832faSShawn Lin	  in Designware IP.
806e0832faSShawn Lin	  This controller can work either as EP or RC. In order to enable
816e0832faSShawn Lin	  host-specific features PCIE_DW_PLAT_HOST must be selected and in
826e0832faSShawn Lin	  order to enable device-specific features PCI_DW_PLAT_EP must be
836e0832faSShawn Lin	  selected.
846e0832faSShawn Lin
856e0832faSShawn Linconfig PCI_EXYNOS
866e0832faSShawn Lin	bool "Samsung Exynos PCIe controller"
876e0832faSShawn Lin	depends on SOC_EXYNOS5440 || COMPILE_TEST
886e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
896e0832faSShawn Lin	select PCIE_DW_HOST
906e0832faSShawn Lin
916e0832faSShawn Linconfig PCI_IMX6
922d8ed461SAndrey Smirnov	bool "Freescale i.MX6/7/8 PCIe controller"
937e8ab1b2SLeonard Crestez	depends on ARCH_MXC || COMPILE_TEST
946e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
956e0832faSShawn Lin	select PCIE_DW_HOST
966e0832faSShawn Lin
976e0832faSShawn Linconfig PCIE_SPEAR13XX
986e0832faSShawn Lin	bool "STMicroelectronics SPEAr PCIe controller"
996e0832faSShawn Lin	depends on ARCH_SPEAR13XX || COMPILE_TEST
1006e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
1016e0832faSShawn Lin	select PCIE_DW_HOST
1026e0832faSShawn Lin	help
1036e0832faSShawn Lin	  Say Y here if you want PCIe support on SPEAr13XX SoCs.
1046e0832faSShawn Lin
1056e0832faSShawn Linconfig PCI_KEYSTONE
10623284ad6SKishon Vijay Abraham I	bool
10723284ad6SKishon Vijay Abraham I
10823284ad6SKishon Vijay Abraham Iconfig PCI_KEYSTONE_HOST
10923284ad6SKishon Vijay Abraham I	bool "PCI Keystone Host Mode"
11018b0415bSKishon Vijay Abraham I	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
1116e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
1126e0832faSShawn Lin	select PCIE_DW_HOST
11323284ad6SKishon Vijay Abraham I	select PCI_KEYSTONE
1146e0832faSShawn Lin	help
11523284ad6SKishon Vijay Abraham I	  Enables support for the PCIe controller in the Keystone SoC to
11623284ad6SKishon Vijay Abraham I	  work in host mode. The PCI controller on Keystone is based on
11723284ad6SKishon Vijay Abraham I	  DesignWare hardware and therefore the driver re-uses the
11823284ad6SKishon Vijay Abraham I	  DesignWare core functions to implement the driver.
11923284ad6SKishon Vijay Abraham I
12023284ad6SKishon Vijay Abraham Iconfig PCI_KEYSTONE_EP
12123284ad6SKishon Vijay Abraham I	bool "PCI Keystone Endpoint Mode"
12223284ad6SKishon Vijay Abraham I	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
12323284ad6SKishon Vijay Abraham I	depends on PCI_ENDPOINT
12423284ad6SKishon Vijay Abraham I	select PCIE_DW_EP
12523284ad6SKishon Vijay Abraham I	select PCI_KEYSTONE
12623284ad6SKishon Vijay Abraham I	help
12723284ad6SKishon Vijay Abraham I	  Enables support for the PCIe controller in the Keystone SoC to
12823284ad6SKishon Vijay Abraham I	  work in endpoint mode. The PCI controller on Keystone is based
12923284ad6SKishon Vijay Abraham I	  on DesignWare hardware and therefore the driver re-uses the
13023284ad6SKishon Vijay Abraham I	  DesignWare core functions to implement the driver.
1316e0832faSShawn Lin
1326e0832faSShawn Linconfig PCI_LAYERSCAPE
133b5b24617SXiaowei Bao	bool "Freescale Layerscape PCIe controller - Host mode"
1346e0832faSShawn Lin	depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
1356e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
1366e0832faSShawn Lin	select MFD_SYSCON
1376e0832faSShawn Lin	select PCIE_DW_HOST
1386e0832faSShawn Lin	help
139b5b24617SXiaowei Bao	  Say Y here if you want to enable PCIe controller support on Layerscape
140b5b24617SXiaowei Bao	  SoCs to work in Host mode.
141b5b24617SXiaowei Bao	  This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
142b5b24617SXiaowei Bao	  determines which PCIe controller works in EP mode and which PCIe
143b5b24617SXiaowei Bao	  controller works in RC mode.
144b5b24617SXiaowei Bao
145b5b24617SXiaowei Baoconfig PCI_LAYERSCAPE_EP
146b5b24617SXiaowei Bao	bool "Freescale Layerscape PCIe controller - Endpoint mode"
147b5b24617SXiaowei Bao	depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
148b5b24617SXiaowei Bao	depends on PCI_ENDPOINT
149b5b24617SXiaowei Bao	select PCIE_DW_EP
150b5b24617SXiaowei Bao	help
151b5b24617SXiaowei Bao	  Say Y here if you want to enable PCIe controller support on Layerscape
152b5b24617SXiaowei Bao	  SoCs to work in Endpoint mode.
153b5b24617SXiaowei Bao	  This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
154b5b24617SXiaowei Bao	  determines which PCIe controller works in EP mode and which PCIe
155b5b24617SXiaowei Bao	  controller works in RC mode.
1566e0832faSShawn Lin
1576e0832faSShawn Linconfig PCI_HISI
1586e0832faSShawn Lin	depends on OF && (ARM64 || COMPILE_TEST)
1596e0832faSShawn Lin	bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
1606e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
1616e0832faSShawn Lin	select PCIE_DW_HOST
1626e0832faSShawn Lin	select PCI_HOST_COMMON
1636e0832faSShawn Lin	help
1646e0832faSShawn Lin	  Say Y here if you want PCIe controller support on HiSilicon
1656e0832faSShawn Lin	  Hip05 and Hip06 SoCs
1666e0832faSShawn Lin
1676e0832faSShawn Linconfig PCIE_QCOM
1686e0832faSShawn Lin	bool "Qualcomm PCIe controller"
1696e0832faSShawn Lin	depends on OF && (ARCH_QCOM || COMPILE_TEST)
1706e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
1716e0832faSShawn Lin	select PCIE_DW_HOST
1726e0832faSShawn Lin	help
1736e0832faSShawn Lin	  Say Y here to enable PCIe controller support on Qualcomm SoCs. The
1746e0832faSShawn Lin	  PCIe controller uses the DesignWare core plus Qualcomm-specific
1756e0832faSShawn Lin	  hardware wrappers.
1766e0832faSShawn Lin
1776e0832faSShawn Linconfig PCIE_ARMADA_8K
1786e0832faSShawn Lin	bool "Marvell Armada-8K PCIe controller"
1796e0832faSShawn Lin	depends on ARCH_MVEBU || COMPILE_TEST
1806e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
1816e0832faSShawn Lin	select PCIE_DW_HOST
1826e0832faSShawn Lin	help
1836e0832faSShawn Lin	  Say Y here if you want to enable PCIe controller support on
1846e0832faSShawn Lin	  Armada-8K SoCs. The PCIe controller on Armada-8K is based on
1856e0832faSShawn Lin	  DesignWare hardware and therefore the driver re-uses the
1866e0832faSShawn Lin	  DesignWare core functions to implement the driver.
1876e0832faSShawn Lin
1886e0832faSShawn Linconfig PCIE_ARTPEC6
1896e0832faSShawn Lin	bool
1906e0832faSShawn Lin
1916e0832faSShawn Linconfig PCIE_ARTPEC6_HOST
1926e0832faSShawn Lin	bool "Axis ARTPEC-6 PCIe controller Host Mode"
1936e0832faSShawn Lin	depends on MACH_ARTPEC6 || COMPILE_TEST
1946e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
1956e0832faSShawn Lin	select PCIE_DW_HOST
1966e0832faSShawn Lin	select PCIE_ARTPEC6
1976e0832faSShawn Lin	help
1986e0832faSShawn Lin	  Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
1996e0832faSShawn Lin	  host mode. This uses the DesignWare core.
2006e0832faSShawn Lin
2016e0832faSShawn Linconfig PCIE_ARTPEC6_EP
2026e0832faSShawn Lin	bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
2036e0832faSShawn Lin	depends on MACH_ARTPEC6 || COMPILE_TEST
2046e0832faSShawn Lin	depends on PCI_ENDPOINT
2056e0832faSShawn Lin	select PCIE_DW_EP
2066e0832faSShawn Lin	select PCIE_ARTPEC6
2076e0832faSShawn Lin	help
2086e0832faSShawn Lin	  Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
2096e0832faSShawn Lin	  endpoint mode. This uses the DesignWare core.
2106e0832faSShawn Lin
211ed22aaaeSDilip Kotaconfig PCIE_INTEL_GW
212ed22aaaeSDilip Kota	bool "Intel Gateway PCIe host controller support"
213ed22aaaeSDilip Kota	depends on OF && (X86 || COMPILE_TEST)
214ed22aaaeSDilip Kota	depends on PCI_MSI_IRQ_DOMAIN
215ed22aaaeSDilip Kota	select PCIE_DW_HOST
216ed22aaaeSDilip Kota	help
217ed22aaaeSDilip Kota	  Say 'Y' here to enable PCIe Host controller support on Intel
218ed22aaaeSDilip Kota	  Gateway SoCs.
219ed22aaaeSDilip Kota	  The PCIe controller uses the DesignWare core plus Intel-specific
220ed22aaaeSDilip Kota	  hardware wrappers.
221ed22aaaeSDilip Kota
2226e0832faSShawn Linconfig PCIE_KIRIN
2236e0832faSShawn Lin	depends on OF && (ARM64 || COMPILE_TEST)
2246e0832faSShawn Lin	bool "HiSilicon Kirin series SoCs PCIe controllers"
2256e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
2266e0832faSShawn Lin	select PCIE_DW_HOST
2276e0832faSShawn Lin	help
2286e0832faSShawn Lin	  Say Y here if you want PCIe controller support
2296e0832faSShawn Lin	  on HiSilicon Kirin series SoCs.
2306e0832faSShawn Lin
2316e0832faSShawn Linconfig PCIE_HISI_STB
2326e0832faSShawn Lin	bool "HiSilicon STB SoCs PCIe controllers"
2336e0832faSShawn Lin	depends on ARCH_HISI || COMPILE_TEST
2346e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
2356e0832faSShawn Lin	select PCIE_DW_HOST
2366e0832faSShawn Lin	help
2376e0832faSShawn Lin	  Say Y here if you want PCIe controller support on HiSilicon STB SoCs
2386e0832faSShawn Lin
2399c0ef6d3SYue Wangconfig PCI_MESON
240*a98d2187SKevin Hilman	tristate "MESON PCIe controller"
2419c0ef6d3SYue Wang	depends on PCI_MSI_IRQ_DOMAIN
242*a98d2187SKevin Hilman	default m if ARCH_MESON
2439c0ef6d3SYue Wang	select PCIE_DW_HOST
2449c0ef6d3SYue Wang	help
2459c0ef6d3SYue Wang	  Say Y here if you want to enable PCI controller support on Amlogic
2469c0ef6d3SYue Wang	  SoCs. The PCI controller on Amlogic is based on DesignWare hardware
2479c0ef6d3SYue Wang	  and therefore the driver re-uses the DesignWare core functions to
2489c0ef6d3SYue Wang	  implement the driver.
2499c0ef6d3SYue Wang
25056e15a23SVidya Sagarconfig PCIE_TEGRA194
251c57247f9SVidya Sagar	tristate
252c57247f9SVidya Sagar
253c57247f9SVidya Sagarconfig PCIE_TEGRA194_HOST
254c57247f9SVidya Sagar	tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode"
25556e15a23SVidya Sagar	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
25656e15a23SVidya Sagar	depends on PCI_MSI_IRQ_DOMAIN
25756e15a23SVidya Sagar	select PCIE_DW_HOST
25856e15a23SVidya Sagar	select PHY_TEGRA194_P2U
259c57247f9SVidya Sagar	select PCIE_TEGRA194
26056e15a23SVidya Sagar	help
261c57247f9SVidya Sagar	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
262c57247f9SVidya Sagar	  work in host mode. There are two instances of PCIe controllers in
263c57247f9SVidya Sagar	  Tegra194. This controller can work either as EP or RC. In order to
264c57247f9SVidya Sagar	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
265c57247f9SVidya Sagar	  in order to enable device-specific features PCIE_TEGRA194_EP must be
266c57247f9SVidya Sagar	  selected. This uses the DesignWare core.
267c57247f9SVidya Sagar
268c57247f9SVidya Sagarconfig PCIE_TEGRA194_EP
269c57247f9SVidya Sagar	tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode"
270c57247f9SVidya Sagar	depends on ARCH_TEGRA_194_SOC || COMPILE_TEST
271c57247f9SVidya Sagar	depends on PCI_ENDPOINT
272c57247f9SVidya Sagar	select PCIE_DW_EP
273c57247f9SVidya Sagar	select PHY_TEGRA194_P2U
274c57247f9SVidya Sagar	select PCIE_TEGRA194
275c57247f9SVidya Sagar	help
276c57247f9SVidya Sagar	  Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
277c57247f9SVidya Sagar	  work in host mode. There are two instances of PCIe controllers in
278c57247f9SVidya Sagar	  Tegra194. This controller can work either as EP or RC. In order to
279c57247f9SVidya Sagar	  enable host-specific features PCIE_TEGRA194_HOST must be selected and
280c57247f9SVidya Sagar	  in order to enable device-specific features PCIE_TEGRA194_EP must be
281c57247f9SVidya Sagar	  selected. This uses the DesignWare core.
28256e15a23SVidya Sagar
2837e6d5cd8SKunihiko Hayashiconfig PCIE_UNIPHIER
2848d7e33d6SKunihiko Hayashi	bool "Socionext UniPhier PCIe host controllers"
2857e6d5cd8SKunihiko Hayashi	depends on ARCH_UNIPHIER || COMPILE_TEST
2867e6d5cd8SKunihiko Hayashi	depends on OF && HAS_IOMEM
2877e6d5cd8SKunihiko Hayashi	depends on PCI_MSI_IRQ_DOMAIN
2887e6d5cd8SKunihiko Hayashi	select PCIE_DW_HOST
2897e6d5cd8SKunihiko Hayashi	help
2908d7e33d6SKunihiko Hayashi	  Say Y here if you want PCIe host controller support on UniPhier SoCs.
2917e6d5cd8SKunihiko Hayashi	  This driver supports LD20 and PXs3 SoCs.
2927e6d5cd8SKunihiko Hayashi
2938d7e33d6SKunihiko Hayashiconfig PCIE_UNIPHIER_EP
2948d7e33d6SKunihiko Hayashi	bool "Socionext UniPhier PCIe endpoint controllers"
2958d7e33d6SKunihiko Hayashi	depends on ARCH_UNIPHIER || COMPILE_TEST
2968d7e33d6SKunihiko Hayashi	depends on OF && HAS_IOMEM
2978d7e33d6SKunihiko Hayashi	depends on PCI_ENDPOINT
2988d7e33d6SKunihiko Hayashi	select PCIE_DW_EP
2998d7e33d6SKunihiko Hayashi	help
3008d7e33d6SKunihiko Hayashi	  Say Y here if you want PCIe endpoint controller support on
3018d7e33d6SKunihiko Hayashi	  UniPhier SoCs. This driver supports Pro5 SoC.
3028d7e33d6SKunihiko Hayashi
303a8daea94SJonathan Chocronconfig PCIE_AL
304a8daea94SJonathan Chocron	bool "Amazon Annapurna Labs PCIe controller"
305a8daea94SJonathan Chocron	depends on OF && (ARM64 || COMPILE_TEST)
306a8daea94SJonathan Chocron	depends on PCI_MSI_IRQ_DOMAIN
307a8daea94SJonathan Chocron	select PCIE_DW_HOST
308a8daea94SJonathan Chocron	help
309a8daea94SJonathan Chocron	  Say Y here to enable support of the Amazon's Annapurna Labs PCIe
310a8daea94SJonathan Chocron	  controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
311a8daea94SJonathan Chocron	  core plus Annapurna Labs proprietary hardware wrappers. This is
312a8daea94SJonathan Chocron	  required only for DT-based platforms. ACPI platforms with the
313a8daea94SJonathan Chocron	  Annapurna Labs PCIe controller don't need to enable this.
314a8daea94SJonathan Chocron
3156e0832faSShawn Linendmenu
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