16e0832faSShawn Lin# SPDX-License-Identifier: GPL-2.0 26e0832faSShawn Lin 36e0832faSShawn Linmenu "DesignWare PCI Core Support" 46e0832faSShawn Lin depends on PCI 56e0832faSShawn Lin 66e0832faSShawn Linconfig PCIE_DW 76e0832faSShawn Lin bool 86e0832faSShawn Lin 96e0832faSShawn Linconfig PCIE_DW_HOST 106e0832faSShawn Lin bool 116e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 126e0832faSShawn Lin select PCIE_DW 136e0832faSShawn Lin 146e0832faSShawn Linconfig PCIE_DW_EP 156e0832faSShawn Lin bool 166e0832faSShawn Lin depends on PCI_ENDPOINT 176e0832faSShawn Lin select PCIE_DW 186e0832faSShawn Lin 196e0832faSShawn Linconfig PCI_DRA7XX 206e0832faSShawn Lin bool 216e0832faSShawn Lin 226e0832faSShawn Linconfig PCI_DRA7XX_HOST 236e0832faSShawn Lin bool "TI DRA7xx PCIe controller Host Mode" 246e0832faSShawn Lin depends on SOC_DRA7XX || COMPILE_TEST 256e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 266e0832faSShawn Lin depends on OF && HAS_IOMEM && TI_PIPE3 276e0832faSShawn Lin select PCIE_DW_HOST 286e0832faSShawn Lin select PCI_DRA7XX 2994b84ac1SBjorn Helgaas default y if SOC_DRA7XX 306e0832faSShawn Lin help 316e0832faSShawn Lin Enables support for the PCIe controller in the DRA7xx SoC to work in 326e0832faSShawn Lin host mode. There are two instances of PCIe controller in DRA7xx. 336e0832faSShawn Lin This controller can work either as EP or RC. In order to enable 346e0832faSShawn Lin host-specific features PCI_DRA7XX_HOST must be selected and in order 356e0832faSShawn Lin to enable device-specific features PCI_DRA7XX_EP must be selected. 366e0832faSShawn Lin This uses the DesignWare core. 376e0832faSShawn Lin 386e0832faSShawn Linconfig PCI_DRA7XX_EP 396e0832faSShawn Lin bool "TI DRA7xx PCIe controller Endpoint Mode" 406e0832faSShawn Lin depends on SOC_DRA7XX || COMPILE_TEST 416e0832faSShawn Lin depends on PCI_ENDPOINT 426e0832faSShawn Lin depends on OF && HAS_IOMEM && TI_PIPE3 436e0832faSShawn Lin select PCIE_DW_EP 446e0832faSShawn Lin select PCI_DRA7XX 456e0832faSShawn Lin help 466e0832faSShawn Lin Enables support for the PCIe controller in the DRA7xx SoC to work in 476e0832faSShawn Lin endpoint mode. There are two instances of PCIe controller in DRA7xx. 486e0832faSShawn Lin This controller can work either as EP or RC. In order to enable 496e0832faSShawn Lin host-specific features PCI_DRA7XX_HOST must be selected and in order 506e0832faSShawn Lin to enable device-specific features PCI_DRA7XX_EP must be selected. 516e0832faSShawn Lin This uses the DesignWare core. 526e0832faSShawn Lin 536e0832faSShawn Linconfig PCIE_DW_PLAT 546e0832faSShawn Lin bool 556e0832faSShawn Lin 566e0832faSShawn Linconfig PCIE_DW_PLAT_HOST 576e0832faSShawn Lin bool "Platform bus based DesignWare PCIe Controller - Host mode" 586e0832faSShawn Lin depends on PCI && PCI_MSI_IRQ_DOMAIN 596e0832faSShawn Lin select PCIE_DW_HOST 606e0832faSShawn Lin select PCIE_DW_PLAT 616e0832faSShawn Lin help 626e0832faSShawn Lin Enables support for the PCIe controller in the Designware IP to 636e0832faSShawn Lin work in host mode. There are two instances of PCIe controller in 646e0832faSShawn Lin Designware IP. 656e0832faSShawn Lin This controller can work either as EP or RC. In order to enable 666e0832faSShawn Lin host-specific features PCIE_DW_PLAT_HOST must be selected and in 676e0832faSShawn Lin order to enable device-specific features PCI_DW_PLAT_EP must be 686e0832faSShawn Lin selected. 696e0832faSShawn Lin 706e0832faSShawn Linconfig PCIE_DW_PLAT_EP 716e0832faSShawn Lin bool "Platform bus based DesignWare PCIe Controller - Endpoint mode" 726e0832faSShawn Lin depends on PCI && PCI_MSI_IRQ_DOMAIN 736e0832faSShawn Lin depends on PCI_ENDPOINT 746e0832faSShawn Lin select PCIE_DW_EP 756e0832faSShawn Lin select PCIE_DW_PLAT 766e0832faSShawn Lin help 776e0832faSShawn Lin Enables support for the PCIe controller in the Designware IP to 786e0832faSShawn Lin work in endpoint mode. There are two instances of PCIe controller 796e0832faSShawn Lin in Designware IP. 806e0832faSShawn Lin This controller can work either as EP or RC. In order to enable 816e0832faSShawn Lin host-specific features PCIE_DW_PLAT_HOST must be selected and in 826e0832faSShawn Lin order to enable device-specific features PCI_DW_PLAT_EP must be 836e0832faSShawn Lin selected. 846e0832faSShawn Lin 856e0832faSShawn Linconfig PCI_EXYNOS 86778f7c19SJaehoon Chung tristate "Samsung Exynos PCIe controller" 87778f7c19SJaehoon Chung depends on ARCH_EXYNOS || COMPILE_TEST 886e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 896e0832faSShawn Lin select PCIE_DW_HOST 90778f7c19SJaehoon Chung help 91778f7c19SJaehoon Chung Enables support for the PCIe controller in the Samsung Exynos SoCs 92778f7c19SJaehoon Chung to work in host mode. The PCI controller is based on the DesignWare 93778f7c19SJaehoon Chung hardware and therefore the driver re-uses the DesignWare core 94778f7c19SJaehoon Chung functions to implement the driver. 956e0832faSShawn Lin 966e0832faSShawn Linconfig PCI_IMX6 972d8ed461SAndrey Smirnov bool "Freescale i.MX6/7/8 PCIe controller" 987e8ab1b2SLeonard Crestez depends on ARCH_MXC || COMPILE_TEST 996e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 1006e0832faSShawn Lin select PCIE_DW_HOST 1016e0832faSShawn Lin 1026e0832faSShawn Linconfig PCIE_SPEAR13XX 1036e0832faSShawn Lin bool "STMicroelectronics SPEAr PCIe controller" 1046e0832faSShawn Lin depends on ARCH_SPEAR13XX || COMPILE_TEST 1056e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 1066e0832faSShawn Lin select PCIE_DW_HOST 1076e0832faSShawn Lin help 1086e0832faSShawn Lin Say Y here if you want PCIe support on SPEAr13XX SoCs. 1096e0832faSShawn Lin 1106e0832faSShawn Linconfig PCI_KEYSTONE 11123284ad6SKishon Vijay Abraham I bool 11223284ad6SKishon Vijay Abraham I 11323284ad6SKishon Vijay Abraham Iconfig PCI_KEYSTONE_HOST 11423284ad6SKishon Vijay Abraham I bool "PCI Keystone Host Mode" 115476b70b4SAlex Dewar depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST 1166e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 1176e0832faSShawn Lin select PCIE_DW_HOST 11823284ad6SKishon Vijay Abraham I select PCI_KEYSTONE 1196e0832faSShawn Lin help 12023284ad6SKishon Vijay Abraham I Enables support for the PCIe controller in the Keystone SoC to 12123284ad6SKishon Vijay Abraham I work in host mode. The PCI controller on Keystone is based on 12223284ad6SKishon Vijay Abraham I DesignWare hardware and therefore the driver re-uses the 12323284ad6SKishon Vijay Abraham I DesignWare core functions to implement the driver. 12423284ad6SKishon Vijay Abraham I 12523284ad6SKishon Vijay Abraham Iconfig PCI_KEYSTONE_EP 12623284ad6SKishon Vijay Abraham I bool "PCI Keystone Endpoint Mode" 127476b70b4SAlex Dewar depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST 12823284ad6SKishon Vijay Abraham I depends on PCI_ENDPOINT 12923284ad6SKishon Vijay Abraham I select PCIE_DW_EP 13023284ad6SKishon Vijay Abraham I select PCI_KEYSTONE 13123284ad6SKishon Vijay Abraham I help 13223284ad6SKishon Vijay Abraham I Enables support for the PCIe controller in the Keystone SoC to 13323284ad6SKishon Vijay Abraham I work in endpoint mode. The PCI controller on Keystone is based 13423284ad6SKishon Vijay Abraham I on DesignWare hardware and therefore the driver re-uses the 13523284ad6SKishon Vijay Abraham I DesignWare core functions to implement the driver. 1366e0832faSShawn Lin 1376e0832faSShawn Linconfig PCI_LAYERSCAPE 138b5b24617SXiaowei Bao bool "Freescale Layerscape PCIe controller - Host mode" 1396e0832faSShawn Lin depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) 1406e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 1416e0832faSShawn Lin select MFD_SYSCON 1426e0832faSShawn Lin select PCIE_DW_HOST 1436e0832faSShawn Lin help 144b5b24617SXiaowei Bao Say Y here if you want to enable PCIe controller support on Layerscape 145b5b24617SXiaowei Bao SoCs to work in Host mode. 146b5b24617SXiaowei Bao This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] 147b5b24617SXiaowei Bao determines which PCIe controller works in EP mode and which PCIe 148b5b24617SXiaowei Bao controller works in RC mode. 149b5b24617SXiaowei Bao 150b5b24617SXiaowei Baoconfig PCI_LAYERSCAPE_EP 151b5b24617SXiaowei Bao bool "Freescale Layerscape PCIe controller - Endpoint mode" 152b5b24617SXiaowei Bao depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) 153b5b24617SXiaowei Bao depends on PCI_ENDPOINT 154b5b24617SXiaowei Bao select PCIE_DW_EP 155b5b24617SXiaowei Bao help 156b5b24617SXiaowei Bao Say Y here if you want to enable PCIe controller support on Layerscape 157b5b24617SXiaowei Bao SoCs to work in Endpoint mode. 158b5b24617SXiaowei Bao This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] 159b5b24617SXiaowei Bao determines which PCIe controller works in EP mode and which PCIe 160b5b24617SXiaowei Bao controller works in RC mode. 1616e0832faSShawn Lin 1626e0832faSShawn Linconfig PCI_HISI 1636e0832faSShawn Lin depends on OF && (ARM64 || COMPILE_TEST) 1646e0832faSShawn Lin bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers" 1656e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 1666e0832faSShawn Lin select PCIE_DW_HOST 1676e0832faSShawn Lin select PCI_HOST_COMMON 1686e0832faSShawn Lin help 1696e0832faSShawn Lin Say Y here if you want PCIe controller support on HiSilicon 1706e0832faSShawn Lin Hip05 and Hip06 SoCs 1716e0832faSShawn Lin 1726e0832faSShawn Linconfig PCIE_QCOM 1736e0832faSShawn Lin bool "Qualcomm PCIe controller" 1746e0832faSShawn Lin depends on OF && (ARCH_QCOM || COMPILE_TEST) 1756e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 1766e0832faSShawn Lin select PCIE_DW_HOST 1774c939882SManivannan Sadhasivam select CRC8 1786e0832faSShawn Lin help 1796e0832faSShawn Lin Say Y here to enable PCIe controller support on Qualcomm SoCs. The 1806e0832faSShawn Lin PCIe controller uses the DesignWare core plus Qualcomm-specific 1816e0832faSShawn Lin hardware wrappers. 1826e0832faSShawn Lin 1836e0832faSShawn Linconfig PCIE_ARMADA_8K 1846e0832faSShawn Lin bool "Marvell Armada-8K PCIe controller" 1856e0832faSShawn Lin depends on ARCH_MVEBU || COMPILE_TEST 1866e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 1876e0832faSShawn Lin select PCIE_DW_HOST 1886e0832faSShawn Lin help 1896e0832faSShawn Lin Say Y here if you want to enable PCIe controller support on 1906e0832faSShawn Lin Armada-8K SoCs. The PCIe controller on Armada-8K is based on 1916e0832faSShawn Lin DesignWare hardware and therefore the driver re-uses the 1926e0832faSShawn Lin DesignWare core functions to implement the driver. 1936e0832faSShawn Lin 1946e0832faSShawn Linconfig PCIE_ARTPEC6 1956e0832faSShawn Lin bool 1966e0832faSShawn Lin 1976e0832faSShawn Linconfig PCIE_ARTPEC6_HOST 1986e0832faSShawn Lin bool "Axis ARTPEC-6 PCIe controller Host Mode" 1996e0832faSShawn Lin depends on MACH_ARTPEC6 || COMPILE_TEST 2006e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 2016e0832faSShawn Lin select PCIE_DW_HOST 2026e0832faSShawn Lin select PCIE_ARTPEC6 2036e0832faSShawn Lin help 2046e0832faSShawn Lin Enables support for the PCIe controller in the ARTPEC-6 SoC to work in 2056e0832faSShawn Lin host mode. This uses the DesignWare core. 2066e0832faSShawn Lin 2076e0832faSShawn Linconfig PCIE_ARTPEC6_EP 2086e0832faSShawn Lin bool "Axis ARTPEC-6 PCIe controller Endpoint Mode" 2096e0832faSShawn Lin depends on MACH_ARTPEC6 || COMPILE_TEST 2106e0832faSShawn Lin depends on PCI_ENDPOINT 2116e0832faSShawn Lin select PCIE_DW_EP 2126e0832faSShawn Lin select PCIE_ARTPEC6 2136e0832faSShawn Lin help 2146e0832faSShawn Lin Enables support for the PCIe controller in the ARTPEC-6 SoC to work in 2156e0832faSShawn Lin endpoint mode. This uses the DesignWare core. 2166e0832faSShawn Lin 217ed22aaaeSDilip Kotaconfig PCIE_INTEL_GW 218ed22aaaeSDilip Kota bool "Intel Gateway PCIe host controller support" 219ed22aaaeSDilip Kota depends on OF && (X86 || COMPILE_TEST) 220ed22aaaeSDilip Kota depends on PCI_MSI_IRQ_DOMAIN 221ed22aaaeSDilip Kota select PCIE_DW_HOST 222ed22aaaeSDilip Kota help 223ed22aaaeSDilip Kota Say 'Y' here to enable PCIe Host controller support on Intel 224ed22aaaeSDilip Kota Gateway SoCs. 225ed22aaaeSDilip Kota The PCIe controller uses the DesignWare core plus Intel-specific 226ed22aaaeSDilip Kota hardware wrappers. 227ed22aaaeSDilip Kota 2286e0832faSShawn Linconfig PCIE_KIRIN 2296e0832faSShawn Lin depends on OF && (ARM64 || COMPILE_TEST) 2306e0832faSShawn Lin bool "HiSilicon Kirin series SoCs PCIe controllers" 2316e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 2326e0832faSShawn Lin select PCIE_DW_HOST 2336e0832faSShawn Lin help 2346e0832faSShawn Lin Say Y here if you want PCIe controller support 2356e0832faSShawn Lin on HiSilicon Kirin series SoCs. 2366e0832faSShawn Lin 2376e0832faSShawn Linconfig PCIE_HISI_STB 2386e0832faSShawn Lin bool "HiSilicon STB SoCs PCIe controllers" 2396e0832faSShawn Lin depends on ARCH_HISI || COMPILE_TEST 2406e0832faSShawn Lin depends on PCI_MSI_IRQ_DOMAIN 2416e0832faSShawn Lin select PCIE_DW_HOST 2426e0832faSShawn Lin help 2436e0832faSShawn Lin Say Y here if you want PCIe controller support on HiSilicon STB SoCs 2446e0832faSShawn Lin 2459c0ef6d3SYue Wangconfig PCI_MESON 246a98d2187SKevin Hilman tristate "MESON PCIe controller" 2479c0ef6d3SYue Wang depends on PCI_MSI_IRQ_DOMAIN 248a98d2187SKevin Hilman default m if ARCH_MESON 2499c0ef6d3SYue Wang select PCIE_DW_HOST 2509c0ef6d3SYue Wang help 2519c0ef6d3SYue Wang Say Y here if you want to enable PCI controller support on Amlogic 2529c0ef6d3SYue Wang SoCs. The PCI controller on Amlogic is based on DesignWare hardware 2539c0ef6d3SYue Wang and therefore the driver re-uses the DesignWare core functions to 2549c0ef6d3SYue Wang implement the driver. 2559c0ef6d3SYue Wang 25656e15a23SVidya Sagarconfig PCIE_TEGRA194 257c57247f9SVidya Sagar tristate 258c57247f9SVidya Sagar 259c57247f9SVidya Sagarconfig PCIE_TEGRA194_HOST 260c57247f9SVidya Sagar tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode" 26156e15a23SVidya Sagar depends on ARCH_TEGRA_194_SOC || COMPILE_TEST 26256e15a23SVidya Sagar depends on PCI_MSI_IRQ_DOMAIN 26356e15a23SVidya Sagar select PCIE_DW_HOST 26456e15a23SVidya Sagar select PHY_TEGRA194_P2U 265c57247f9SVidya Sagar select PCIE_TEGRA194 26656e15a23SVidya Sagar help 267c57247f9SVidya Sagar Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to 268c57247f9SVidya Sagar work in host mode. There are two instances of PCIe controllers in 269c57247f9SVidya Sagar Tegra194. This controller can work either as EP or RC. In order to 270c57247f9SVidya Sagar enable host-specific features PCIE_TEGRA194_HOST must be selected and 271c57247f9SVidya Sagar in order to enable device-specific features PCIE_TEGRA194_EP must be 272c57247f9SVidya Sagar selected. This uses the DesignWare core. 273c57247f9SVidya Sagar 274c57247f9SVidya Sagarconfig PCIE_TEGRA194_EP 275c57247f9SVidya Sagar tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode" 276c57247f9SVidya Sagar depends on ARCH_TEGRA_194_SOC || COMPILE_TEST 277c57247f9SVidya Sagar depends on PCI_ENDPOINT 278c57247f9SVidya Sagar select PCIE_DW_EP 279c57247f9SVidya Sagar select PHY_TEGRA194_P2U 280c57247f9SVidya Sagar select PCIE_TEGRA194 281c57247f9SVidya Sagar help 282c57247f9SVidya Sagar Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to 283*10739e2aSWesley Sheng work in endpoint mode. There are two instances of PCIe controllers in 284c57247f9SVidya Sagar Tegra194. This controller can work either as EP or RC. In order to 285c57247f9SVidya Sagar enable host-specific features PCIE_TEGRA194_HOST must be selected and 286c57247f9SVidya Sagar in order to enable device-specific features PCIE_TEGRA194_EP must be 287c57247f9SVidya Sagar selected. This uses the DesignWare core. 28856e15a23SVidya Sagar 2897e6d5cd8SKunihiko Hayashiconfig PCIE_UNIPHIER 2908d7e33d6SKunihiko Hayashi bool "Socionext UniPhier PCIe host controllers" 2917e6d5cd8SKunihiko Hayashi depends on ARCH_UNIPHIER || COMPILE_TEST 2927e6d5cd8SKunihiko Hayashi depends on OF && HAS_IOMEM 2937e6d5cd8SKunihiko Hayashi depends on PCI_MSI_IRQ_DOMAIN 2947e6d5cd8SKunihiko Hayashi select PCIE_DW_HOST 2957e6d5cd8SKunihiko Hayashi help 2968d7e33d6SKunihiko Hayashi Say Y here if you want PCIe host controller support on UniPhier SoCs. 2977e6d5cd8SKunihiko Hayashi This driver supports LD20 and PXs3 SoCs. 2987e6d5cd8SKunihiko Hayashi 2998d7e33d6SKunihiko Hayashiconfig PCIE_UNIPHIER_EP 3008d7e33d6SKunihiko Hayashi bool "Socionext UniPhier PCIe endpoint controllers" 3018d7e33d6SKunihiko Hayashi depends on ARCH_UNIPHIER || COMPILE_TEST 3028d7e33d6SKunihiko Hayashi depends on OF && HAS_IOMEM 3038d7e33d6SKunihiko Hayashi depends on PCI_ENDPOINT 3048d7e33d6SKunihiko Hayashi select PCIE_DW_EP 3058d7e33d6SKunihiko Hayashi help 3068d7e33d6SKunihiko Hayashi Say Y here if you want PCIe endpoint controller support on 3078d7e33d6SKunihiko Hayashi UniPhier SoCs. This driver supports Pro5 SoC. 3088d7e33d6SKunihiko Hayashi 309a8daea94SJonathan Chocronconfig PCIE_AL 310a8daea94SJonathan Chocron bool "Amazon Annapurna Labs PCIe controller" 311a8daea94SJonathan Chocron depends on OF && (ARM64 || COMPILE_TEST) 312a8daea94SJonathan Chocron depends on PCI_MSI_IRQ_DOMAIN 313a8daea94SJonathan Chocron select PCIE_DW_HOST 314a8daea94SJonathan Chocron help 315a8daea94SJonathan Chocron Say Y here to enable support of the Amazon's Annapurna Labs PCIe 316a8daea94SJonathan Chocron controller IP on Amazon SoCs. The PCIe controller uses the DesignWare 317a8daea94SJonathan Chocron core plus Annapurna Labs proprietary hardware wrappers. This is 318a8daea94SJonathan Chocron required only for DT-based platforms. ACPI platforms with the 319a8daea94SJonathan Chocron Annapurna Labs PCIe controller don't need to enable this. 320a8daea94SJonathan Chocron 3216e0832faSShawn Linendmenu 322