1*6e0832faSShawn Lin# SPDX-License-Identifier: GPL-2.0 2*6e0832faSShawn Linobj-$(CONFIG_PCIE_CADENCE) += pcie-cadence.o 3*6e0832faSShawn Linobj-$(CONFIG_PCIE_CADENCE_HOST) += pcie-cadence-host.o 4*6e0832faSShawn Linobj-$(CONFIG_PCIE_CADENCE_EP) += pcie-cadence-ep.o 5*6e0832faSShawn Linobj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o 6*6e0832faSShawn Linobj-$(CONFIG_PCI_HYPERV) += pci-hyperv.o 7*6e0832faSShawn Linobj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o 8*6e0832faSShawn Linobj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o 9*6e0832faSShawn Linobj-$(CONFIG_PCI_TEGRA) += pci-tegra.o 10*6e0832faSShawn Linobj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o 11*6e0832faSShawn Linobj-$(CONFIG_PCIE_RCAR) += pcie-rcar.o 12*6e0832faSShawn Linobj-$(CONFIG_PCI_HOST_COMMON) += pci-host-common.o 13*6e0832faSShawn Linobj-$(CONFIG_PCI_HOST_GENERIC) += pci-host-generic.o 14*6e0832faSShawn Linobj-$(CONFIG_PCIE_XILINX) += pcie-xilinx.o 15*6e0832faSShawn Linobj-$(CONFIG_PCIE_XILINX_NWL) += pcie-xilinx-nwl.o 16*6e0832faSShawn Linobj-$(CONFIG_PCI_V3_SEMI) += pci-v3-semi.o 17*6e0832faSShawn Linobj-$(CONFIG_PCI_XGENE_MSI) += pci-xgene-msi.o 18*6e0832faSShawn Linobj-$(CONFIG_PCI_VERSATILE) += pci-versatile.o 19*6e0832faSShawn Linobj-$(CONFIG_PCIE_IPROC) += pcie-iproc.o 20*6e0832faSShawn Linobj-$(CONFIG_PCIE_IPROC_MSI) += pcie-iproc-msi.o 21*6e0832faSShawn Linobj-$(CONFIG_PCIE_IPROC_PLATFORM) += pcie-iproc-platform.o 22*6e0832faSShawn Linobj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-iproc-bcma.o 23*6e0832faSShawn Linobj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o 24*6e0832faSShawn Linobj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o 25*6e0832faSShawn Linobj-$(CONFIG_PCIE_ROCKCHIP) += pcie-rockchip.o 26*6e0832faSShawn Linobj-$(CONFIG_PCIE_ROCKCHIP_EP) += pcie-rockchip-ep.o 27*6e0832faSShawn Linobj-$(CONFIG_PCIE_ROCKCHIP_HOST) += pcie-rockchip-host.o 28*6e0832faSShawn Linobj-$(CONFIG_PCIE_MEDIATEK) += pcie-mediatek.o 29*6e0832faSShawn Linobj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o 30*6e0832faSShawn Linobj-$(CONFIG_VMD) += vmd.o 31*6e0832faSShawn Lin# pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW 32*6e0832faSShawn Linobj-y += dwc/ 33*6e0832faSShawn Lin 34*6e0832faSShawn Lin 35*6e0832faSShawn Lin# The following drivers are for devices that use the generic ACPI 36*6e0832faSShawn Lin# pci_root.c driver but don't support standard ECAM config access. 37*6e0832faSShawn Lin# They contain MCFG quirks to replace the generic ECAM accessors with 38*6e0832faSShawn Lin# device-specific ones that are shared with the DT driver. 39*6e0832faSShawn Lin 40*6e0832faSShawn Lin# The ACPI driver is generic and should not require driver-specific 41*6e0832faSShawn Lin# config options to be enabled, so we always build these drivers on 42*6e0832faSShawn Lin# ARM64 and use internal ifdefs to only build the pieces we need 43*6e0832faSShawn Lin# depending on whether ACPI, the DT driver, or both are enabled. 44*6e0832faSShawn Lin 45*6e0832faSShawn Linifdef CONFIG_PCI 46*6e0832faSShawn Linobj-$(CONFIG_ARM64) += pci-thunder-ecam.o 47*6e0832faSShawn Linobj-$(CONFIG_ARM64) += pci-thunder-pem.o 48*6e0832faSShawn Linobj-$(CONFIG_ARM64) += pci-xgene.o 49*6e0832faSShawn Linendif 50