xref: /linux/drivers/pci/controller/Kconfig (revision 6e0832fa432ec99c94caee733c8f5851cf85560b)
1*6e0832faSShawn Lin# SPDX-License-Identifier: GPL-2.0
2*6e0832faSShawn Lin
3*6e0832faSShawn Linmenu "PCI controller drivers"
4*6e0832faSShawn Lin	depends on PCI
5*6e0832faSShawn Lin
6*6e0832faSShawn Linconfig PCI_MVEBU
7*6e0832faSShawn Lin	bool "Marvell EBU PCIe controller"
8*6e0832faSShawn Lin	depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST
9*6e0832faSShawn Lin	depends on MVEBU_MBUS
10*6e0832faSShawn Lin	depends on ARM
11*6e0832faSShawn Lin	depends on OF
12*6e0832faSShawn Lin
13*6e0832faSShawn Linconfig PCI_AARDVARK
14*6e0832faSShawn Lin	bool "Aardvark PCIe controller"
15*6e0832faSShawn Lin	depends on (ARCH_MVEBU && ARM64) || COMPILE_TEST
16*6e0832faSShawn Lin	depends on OF
17*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
18*6e0832faSShawn Lin	help
19*6e0832faSShawn Lin	 Add support for Aardvark 64bit PCIe Host Controller. This
20*6e0832faSShawn Lin	 controller is part of the South Bridge of the Marvel Armada
21*6e0832faSShawn Lin	 3700 SoC.
22*6e0832faSShawn Lin
23*6e0832faSShawn Linmenu "Cadence PCIe controllers support"
24*6e0832faSShawn Lin
25*6e0832faSShawn Linconfig PCIE_CADENCE
26*6e0832faSShawn Lin	bool
27*6e0832faSShawn Lin
28*6e0832faSShawn Linconfig PCIE_CADENCE_HOST
29*6e0832faSShawn Lin	bool "Cadence PCIe host controller"
30*6e0832faSShawn Lin	depends on OF
31*6e0832faSShawn Lin	depends on PCI
32*6e0832faSShawn Lin	select IRQ_DOMAIN
33*6e0832faSShawn Lin	select PCIE_CADENCE
34*6e0832faSShawn Lin	help
35*6e0832faSShawn Lin	  Say Y here if you want to support the Cadence PCIe controller in host
36*6e0832faSShawn Lin	  mode. This PCIe controller may be embedded into many different vendors
37*6e0832faSShawn Lin	  SoCs.
38*6e0832faSShawn Lin
39*6e0832faSShawn Linconfig PCIE_CADENCE_EP
40*6e0832faSShawn Lin	bool "Cadence PCIe endpoint controller"
41*6e0832faSShawn Lin	depends on OF
42*6e0832faSShawn Lin	depends on PCI_ENDPOINT
43*6e0832faSShawn Lin	select PCIE_CADENCE
44*6e0832faSShawn Lin	help
45*6e0832faSShawn Lin	  Say Y here if you want to support the Cadence PCIe  controller in
46*6e0832faSShawn Lin	  endpoint mode. This PCIe controller may be embedded into many
47*6e0832faSShawn Lin	  different vendors SoCs.
48*6e0832faSShawn Lin
49*6e0832faSShawn Linendmenu
50*6e0832faSShawn Lin
51*6e0832faSShawn Linconfig PCIE_XILINX_NWL
52*6e0832faSShawn Lin	bool "NWL PCIe Core"
53*6e0832faSShawn Lin	depends on ARCH_ZYNQMP || COMPILE_TEST
54*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
55*6e0832faSShawn Lin	help
56*6e0832faSShawn Lin	 Say 'Y' here if you want kernel support for Xilinx
57*6e0832faSShawn Lin	 NWL PCIe controller. The controller can act as Root Port
58*6e0832faSShawn Lin	 or End Point. The current option selection will only
59*6e0832faSShawn Lin	 support root port enabling.
60*6e0832faSShawn Lin
61*6e0832faSShawn Linconfig PCI_FTPCI100
62*6e0832faSShawn Lin	bool "Faraday Technology FTPCI100 PCI controller"
63*6e0832faSShawn Lin	depends on OF
64*6e0832faSShawn Lin	default ARCH_GEMINI
65*6e0832faSShawn Lin
66*6e0832faSShawn Linconfig PCI_TEGRA
67*6e0832faSShawn Lin	bool "NVIDIA Tegra PCIe controller"
68*6e0832faSShawn Lin	depends on ARCH_TEGRA || COMPILE_TEST
69*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
70*6e0832faSShawn Lin	help
71*6e0832faSShawn Lin	  Say Y here if you want support for the PCIe host controller found
72*6e0832faSShawn Lin	  on NVIDIA Tegra SoCs.
73*6e0832faSShawn Lin
74*6e0832faSShawn Linconfig PCI_RCAR_GEN2
75*6e0832faSShawn Lin	bool "Renesas R-Car Gen2 Internal PCI controller"
76*6e0832faSShawn Lin	depends on ARCH_RENESAS || COMPILE_TEST
77*6e0832faSShawn Lin	depends on ARM
78*6e0832faSShawn Lin	help
79*6e0832faSShawn Lin	  Say Y here if you want internal PCI support on R-Car Gen2 SoC.
80*6e0832faSShawn Lin	  There are 3 internal PCI controllers available with a single
81*6e0832faSShawn Lin	  built-in EHCI/OHCI host controller present on each one.
82*6e0832faSShawn Lin
83*6e0832faSShawn Linconfig PCIE_RCAR
84*6e0832faSShawn Lin	bool "Renesas R-Car PCIe controller"
85*6e0832faSShawn Lin	depends on ARCH_RENESAS || COMPILE_TEST
86*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
87*6e0832faSShawn Lin	help
88*6e0832faSShawn Lin	  Say Y here if you want PCIe controller support on R-Car SoCs.
89*6e0832faSShawn Lin
90*6e0832faSShawn Linconfig PCI_HOST_COMMON
91*6e0832faSShawn Lin	bool
92*6e0832faSShawn Lin	select PCI_ECAM
93*6e0832faSShawn Lin
94*6e0832faSShawn Linconfig PCI_HOST_GENERIC
95*6e0832faSShawn Lin	bool "Generic PCI host controller"
96*6e0832faSShawn Lin	depends on OF
97*6e0832faSShawn Lin	select PCI_HOST_COMMON
98*6e0832faSShawn Lin	select IRQ_DOMAIN
99*6e0832faSShawn Lin	select PCI_DOMAINS
100*6e0832faSShawn Lin	help
101*6e0832faSShawn Lin	  Say Y here if you want to support a simple generic PCI host
102*6e0832faSShawn Lin	  controller, such as the one emulated by kvmtool.
103*6e0832faSShawn Lin
104*6e0832faSShawn Linconfig PCIE_XILINX
105*6e0832faSShawn Lin	bool "Xilinx AXI PCIe host bridge support"
106*6e0832faSShawn Lin	depends on ARCH_ZYNQ || MICROBLAZE || (MIPS && PCI_DRIVERS_GENERIC) || COMPILE_TEST
107*6e0832faSShawn Lin	help
108*6e0832faSShawn Lin	  Say 'Y' here if you want kernel to support the Xilinx AXI PCIe
109*6e0832faSShawn Lin	  Host Bridge driver.
110*6e0832faSShawn Lin
111*6e0832faSShawn Linconfig PCI_XGENE
112*6e0832faSShawn Lin	bool "X-Gene PCIe controller"
113*6e0832faSShawn Lin	depends on ARM64 || COMPILE_TEST
114*6e0832faSShawn Lin	depends on OF || (ACPI && PCI_QUIRKS)
115*6e0832faSShawn Lin	help
116*6e0832faSShawn Lin	  Say Y here if you want internal PCI support on APM X-Gene SoC.
117*6e0832faSShawn Lin	  There are 5 internal PCIe ports available. Each port is GEN3 capable
118*6e0832faSShawn Lin	  and have varied lanes from x1 to x8.
119*6e0832faSShawn Lin
120*6e0832faSShawn Linconfig PCI_XGENE_MSI
121*6e0832faSShawn Lin	bool "X-Gene v1 PCIe MSI feature"
122*6e0832faSShawn Lin	depends on PCI_XGENE
123*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
124*6e0832faSShawn Lin	default y
125*6e0832faSShawn Lin	help
126*6e0832faSShawn Lin	  Say Y here if you want PCIe MSI support for the APM X-Gene v1 SoC.
127*6e0832faSShawn Lin	  This MSI driver supports 5 PCIe ports on the APM X-Gene v1 SoC.
128*6e0832faSShawn Lin
129*6e0832faSShawn Linconfig PCI_V3_SEMI
130*6e0832faSShawn Lin	bool "V3 Semiconductor PCI controller"
131*6e0832faSShawn Lin	depends on OF
132*6e0832faSShawn Lin	depends on ARM || COMPILE_TEST
133*6e0832faSShawn Lin	default ARCH_INTEGRATOR_AP
134*6e0832faSShawn Lin
135*6e0832faSShawn Linconfig PCI_VERSATILE
136*6e0832faSShawn Lin	bool "ARM Versatile PB PCI controller"
137*6e0832faSShawn Lin	depends on ARCH_VERSATILE
138*6e0832faSShawn Lin
139*6e0832faSShawn Linconfig PCIE_IPROC
140*6e0832faSShawn Lin	tristate
141*6e0832faSShawn Lin	select PCI_DOMAINS
142*6e0832faSShawn Lin	help
143*6e0832faSShawn Lin	  This enables the iProc PCIe core controller support for Broadcom's
144*6e0832faSShawn Lin	  iProc family of SoCs. An appropriate bus interface driver needs
145*6e0832faSShawn Lin	  to be enabled to select this.
146*6e0832faSShawn Lin
147*6e0832faSShawn Linconfig PCIE_IPROC_PLATFORM
148*6e0832faSShawn Lin	tristate "Broadcom iProc PCIe platform bus driver"
149*6e0832faSShawn Lin	depends on ARCH_BCM_IPROC || (ARM && COMPILE_TEST)
150*6e0832faSShawn Lin	depends on OF
151*6e0832faSShawn Lin	select PCIE_IPROC
152*6e0832faSShawn Lin	default ARCH_BCM_IPROC
153*6e0832faSShawn Lin	help
154*6e0832faSShawn Lin	  Say Y here if you want to use the Broadcom iProc PCIe controller
155*6e0832faSShawn Lin	  through the generic platform bus interface
156*6e0832faSShawn Lin
157*6e0832faSShawn Linconfig PCIE_IPROC_BCMA
158*6e0832faSShawn Lin	tristate "Broadcom iProc PCIe BCMA bus driver"
159*6e0832faSShawn Lin	depends on ARM && (ARCH_BCM_IPROC || COMPILE_TEST)
160*6e0832faSShawn Lin	select PCIE_IPROC
161*6e0832faSShawn Lin	select BCMA
162*6e0832faSShawn Lin	default ARCH_BCM_5301X
163*6e0832faSShawn Lin	help
164*6e0832faSShawn Lin	  Say Y here if you want to use the Broadcom iProc PCIe controller
165*6e0832faSShawn Lin	  through the BCMA bus interface
166*6e0832faSShawn Lin
167*6e0832faSShawn Linconfig PCIE_IPROC_MSI
168*6e0832faSShawn Lin	bool "Broadcom iProc PCIe MSI support"
169*6e0832faSShawn Lin	depends on PCIE_IPROC_PLATFORM || PCIE_IPROC_BCMA
170*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
171*6e0832faSShawn Lin	default ARCH_BCM_IPROC
172*6e0832faSShawn Lin	help
173*6e0832faSShawn Lin	  Say Y here if you want to enable MSI support for Broadcom's iProc
174*6e0832faSShawn Lin	  PCIe controller
175*6e0832faSShawn Lin
176*6e0832faSShawn Linconfig PCIE_ALTERA
177*6e0832faSShawn Lin	bool "Altera PCIe controller"
178*6e0832faSShawn Lin	depends on ARM || NIOS2 || COMPILE_TEST
179*6e0832faSShawn Lin	select PCI_DOMAINS
180*6e0832faSShawn Lin	help
181*6e0832faSShawn Lin	  Say Y here if you want to enable PCIe controller support on Altera
182*6e0832faSShawn Lin	  FPGA.
183*6e0832faSShawn Lin
184*6e0832faSShawn Linconfig PCIE_ALTERA_MSI
185*6e0832faSShawn Lin	bool "Altera PCIe MSI feature"
186*6e0832faSShawn Lin	depends on PCIE_ALTERA
187*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
188*6e0832faSShawn Lin	help
189*6e0832faSShawn Lin	  Say Y here if you want PCIe MSI support for the Altera FPGA.
190*6e0832faSShawn Lin	  This MSI driver supports Altera MSI to GIC controller IP.
191*6e0832faSShawn Lin
192*6e0832faSShawn Linconfig PCI_HOST_THUNDER_PEM
193*6e0832faSShawn Lin	bool "Cavium Thunder PCIe controller to off-chip devices"
194*6e0832faSShawn Lin	depends on ARM64 || COMPILE_TEST
195*6e0832faSShawn Lin	depends on OF || (ACPI && PCI_QUIRKS)
196*6e0832faSShawn Lin	select PCI_HOST_COMMON
197*6e0832faSShawn Lin	help
198*6e0832faSShawn Lin	  Say Y here if you want PCIe support for CN88XX Cavium Thunder SoCs.
199*6e0832faSShawn Lin
200*6e0832faSShawn Linconfig PCI_HOST_THUNDER_ECAM
201*6e0832faSShawn Lin	bool "Cavium Thunder ECAM controller to on-chip devices on pass-1.x silicon"
202*6e0832faSShawn Lin	depends on ARM64 || COMPILE_TEST
203*6e0832faSShawn Lin	depends on OF || (ACPI && PCI_QUIRKS)
204*6e0832faSShawn Lin	select PCI_HOST_COMMON
205*6e0832faSShawn Lin	help
206*6e0832faSShawn Lin	  Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs.
207*6e0832faSShawn Lin
208*6e0832faSShawn Linconfig PCIE_ROCKCHIP
209*6e0832faSShawn Lin	bool
210*6e0832faSShawn Lin	depends on PCI
211*6e0832faSShawn Lin
212*6e0832faSShawn Linconfig PCIE_ROCKCHIP_HOST
213*6e0832faSShawn Lin	tristate "Rockchip PCIe host controller"
214*6e0832faSShawn Lin	depends on ARCH_ROCKCHIP || COMPILE_TEST
215*6e0832faSShawn Lin	depends on OF
216*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
217*6e0832faSShawn Lin	select MFD_SYSCON
218*6e0832faSShawn Lin	select PCIE_ROCKCHIP
219*6e0832faSShawn Lin	help
220*6e0832faSShawn Lin	  Say Y here if you want internal PCI support on Rockchip SoC.
221*6e0832faSShawn Lin	  There is 1 internal PCIe port available to support GEN2 with
222*6e0832faSShawn Lin	  4 slots.
223*6e0832faSShawn Lin
224*6e0832faSShawn Linconfig PCIE_ROCKCHIP_EP
225*6e0832faSShawn Lin	bool "Rockchip PCIe endpoint controller"
226*6e0832faSShawn Lin	depends on ARCH_ROCKCHIP || COMPILE_TEST
227*6e0832faSShawn Lin	depends on OF
228*6e0832faSShawn Lin	depends on PCI_ENDPOINT
229*6e0832faSShawn Lin	select MFD_SYSCON
230*6e0832faSShawn Lin	select PCIE_ROCKCHIP
231*6e0832faSShawn Lin	help
232*6e0832faSShawn Lin	  Say Y here if you want to support Rockchip PCIe controller in
233*6e0832faSShawn Lin	  endpoint mode on Rockchip SoC. There is 1 internal PCIe port
234*6e0832faSShawn Lin	  available to support GEN2 with 4 slots.
235*6e0832faSShawn Lin
236*6e0832faSShawn Linconfig PCIE_MEDIATEK
237*6e0832faSShawn Lin	bool "MediaTek PCIe controller"
238*6e0832faSShawn Lin	depends on ARCH_MEDIATEK || COMPILE_TEST
239*6e0832faSShawn Lin	depends on OF
240*6e0832faSShawn Lin	depends on PCI_MSI_IRQ_DOMAIN
241*6e0832faSShawn Lin	help
242*6e0832faSShawn Lin	  Say Y here if you want to enable PCIe controller support on
243*6e0832faSShawn Lin	  MediaTek SoCs.
244*6e0832faSShawn Lin
245*6e0832faSShawn Linconfig PCIE_TANGO_SMP8759
246*6e0832faSShawn Lin	bool "Tango SMP8759 PCIe controller (DANGEROUS)"
247*6e0832faSShawn Lin	depends on ARCH_TANGO && PCI_MSI && OF
248*6e0832faSShawn Lin	depends on BROKEN
249*6e0832faSShawn Lin	select PCI_HOST_COMMON
250*6e0832faSShawn Lin	help
251*6e0832faSShawn Lin	  Say Y here to enable PCIe controller support for Sigma Designs
252*6e0832faSShawn Lin	  Tango SMP8759-based systems.
253*6e0832faSShawn Lin
254*6e0832faSShawn Lin	  Note: The SMP8759 controller multiplexes PCI config and MMIO
255*6e0832faSShawn Lin	  accesses, and Linux doesn't provide a way to serialize them.
256*6e0832faSShawn Lin	  This can lead to data corruption if drivers perform concurrent
257*6e0832faSShawn Lin	  config and MMIO accesses.
258*6e0832faSShawn Lin
259*6e0832faSShawn Linconfig VMD
260*6e0832faSShawn Lin	depends on PCI_MSI && X86_64 && SRCU
261*6e0832faSShawn Lin	tristate "Intel Volume Management Device Driver"
262*6e0832faSShawn Lin	---help---
263*6e0832faSShawn Lin	  Adds support for the Intel Volume Management Device (VMD). VMD is a
264*6e0832faSShawn Lin	  secondary PCI host bridge that allows PCI Express root ports,
265*6e0832faSShawn Lin	  and devices attached to them, to be removed from the default
266*6e0832faSShawn Lin	  PCI domain and placed within the VMD domain. This provides
267*6e0832faSShawn Lin	  more bus resources than are otherwise possible with a
268*6e0832faSShawn Lin	  single domain. If you know your system provides one of these and
269*6e0832faSShawn Lin	  has devices attached to it, say Y; if you are not sure, say N.
270*6e0832faSShawn Lin
271*6e0832faSShawn Lin	  To compile this driver as a module, choose M here: the
272*6e0832faSShawn Lin	  module will be called vmd.
273*6e0832faSShawn Lin
274*6e0832faSShawn Linsource "drivers/pci/controller/dwc/Kconfig"
275*6e0832faSShawn Linendmenu
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