1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for 93xx46 EEPROMs 4 * 5 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de> 6 */ 7 8 #include <linux/array_size.h> 9 #include <linux/bits.h> 10 #include <linux/delay.h> 11 #include <linux/device.h> 12 #include <linux/gpio/consumer.h> 13 #include <linux/kstrtox.h> 14 #include <linux/log2.h> 15 #include <linux/module.h> 16 #include <linux/mutex.h> 17 #include <linux/property.h> 18 #include <linux/slab.h> 19 #include <linux/spi/spi.h> 20 #include <linux/string_choices.h> 21 22 #include <linux/nvmem-provider.h> 23 24 struct eeprom_93xx46_platform_data { 25 unsigned char flags; 26 #define EE_ADDR8 0x01 /* 8 bit addr. cfg */ 27 #define EE_ADDR16 0x02 /* 16 bit addr. cfg */ 28 #define EE_READONLY 0x08 /* forbid writing */ 29 #define EE_SIZE1K 0x10 /* 1 kb of data, that is a 93xx46 */ 30 #define EE_SIZE2K 0x20 /* 2 kb of data, that is a 93xx56 */ 31 #define EE_SIZE4K 0x40 /* 4 kb of data, that is a 93xx66 */ 32 33 unsigned int quirks; 34 /* Single word read transfers only; no sequential read. */ 35 #define EEPROM_93XX46_QUIRK_SINGLE_WORD_READ (1 << 0) 36 /* Instructions such as EWEN are (addrlen + 2) in length. */ 37 #define EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH (1 << 1) 38 /* Add extra cycle after address during a read */ 39 #define EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE BIT(2) 40 41 struct gpio_desc *select; 42 }; 43 44 #define OP_START 0x4 45 #define OP_WRITE (OP_START | 0x1) 46 #define OP_READ (OP_START | 0x2) 47 /* The following addresses are offset for the 1K EEPROM variant in 16-bit mode */ 48 #define ADDR_EWDS 0x00 49 #define ADDR_ERAL 0x20 50 #define ADDR_EWEN 0x30 51 52 struct eeprom_93xx46_devtype_data { 53 unsigned int quirks; 54 unsigned char flags; 55 }; 56 57 static const struct eeprom_93xx46_devtype_data at93c46_data = { 58 .flags = EE_SIZE1K, 59 }; 60 61 static const struct eeprom_93xx46_devtype_data at93c56_data = { 62 .flags = EE_SIZE2K, 63 }; 64 65 static const struct eeprom_93xx46_devtype_data at93c66_data = { 66 .flags = EE_SIZE4K, 67 }; 68 69 static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = { 70 .flags = EE_SIZE1K, 71 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ | 72 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH, 73 }; 74 75 static const struct eeprom_93xx46_devtype_data microchip_93lc46b_data = { 76 .flags = EE_SIZE1K, 77 .quirks = EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE, 78 }; 79 80 struct eeprom_93xx46_dev { 81 struct spi_device *spi; 82 struct eeprom_93xx46_platform_data *pdata; 83 struct mutex lock; 84 struct nvmem_config nvmem_config; 85 struct nvmem_device *nvmem; 86 int addrlen; 87 int size; 88 }; 89 90 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev) 91 { 92 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ; 93 } 94 95 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev) 96 { 97 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH; 98 } 99 100 static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev) 101 { 102 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE; 103 } 104 105 static int eeprom_93xx46_read(void *priv, unsigned int off, 106 void *val, size_t count) 107 { 108 struct eeprom_93xx46_dev *edev = priv; 109 char *buf = val; 110 int err = 0; 111 int bits; 112 113 if (unlikely(off >= edev->size)) 114 return 0; 115 if ((off + count) > edev->size) 116 count = edev->size - off; 117 if (unlikely(!count)) 118 return count; 119 120 mutex_lock(&edev->lock); 121 122 gpiod_set_value_cansleep(edev->pdata->select, 1); 123 124 /* The opcode in front of the address is three bits. */ 125 bits = edev->addrlen + 3; 126 127 while (count) { 128 struct spi_message m; 129 struct spi_transfer t[2] = {}; 130 u16 cmd_addr = OP_READ << edev->addrlen; 131 size_t nbytes = count; 132 133 if (edev->pdata->flags & EE_ADDR8) { 134 cmd_addr |= off; 135 if (has_quirk_single_word_read(edev)) 136 nbytes = 1; 137 } else { 138 cmd_addr |= (off >> 1); 139 if (has_quirk_single_word_read(edev)) 140 nbytes = 2; 141 } 142 143 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n", 144 cmd_addr, edev->spi->max_speed_hz); 145 146 if (has_quirk_extra_read_cycle(edev)) { 147 cmd_addr <<= 1; 148 bits += 1; 149 } 150 151 t[0].tx_buf = (char *)&cmd_addr; 152 t[0].len = 2; 153 t[0].bits_per_word = bits; 154 155 t[1].rx_buf = buf; 156 t[1].len = count; 157 t[1].bits_per_word = 8; 158 159 spi_message_init_with_transfers(&m, t, ARRAY_SIZE(t)); 160 161 err = spi_sync(edev->spi, &m); 162 /* have to wait at least Tcsl ns */ 163 ndelay(250); 164 165 if (err) { 166 dev_err(&edev->spi->dev, "read %zu bytes at %u: err. %d\n", 167 nbytes, off, err); 168 break; 169 } 170 171 buf += nbytes; 172 off += nbytes; 173 count -= nbytes; 174 } 175 176 gpiod_set_value_cansleep(edev->pdata->select, 0); 177 178 mutex_unlock(&edev->lock); 179 180 return err; 181 } 182 183 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on) 184 { 185 struct spi_message m; 186 struct spi_transfer t = {}; 187 int bits, ret; 188 u16 cmd_addr; 189 190 /* The opcode in front of the address is three bits. */ 191 bits = edev->addrlen + 3; 192 193 cmd_addr = OP_START << edev->addrlen; 194 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << (edev->addrlen - 6); 195 196 if (has_quirk_instruction_length(edev)) { 197 cmd_addr <<= 2; 198 bits += 2; 199 } 200 201 dev_dbg(&edev->spi->dev, "ew %s cmd 0x%04x, %d bits\n", 202 str_enable_disable(is_on), cmd_addr, bits); 203 204 t.tx_buf = &cmd_addr; 205 t.len = 2; 206 t.bits_per_word = bits; 207 208 spi_message_init_with_transfers(&m, &t, 1); 209 210 mutex_lock(&edev->lock); 211 212 gpiod_set_value_cansleep(edev->pdata->select, 1); 213 214 ret = spi_sync(edev->spi, &m); 215 /* have to wait at least Tcsl ns */ 216 ndelay(250); 217 if (ret) 218 dev_err(&edev->spi->dev, "erase/write %s error %d\n", 219 str_enable_disable(is_on), ret); 220 221 gpiod_set_value_cansleep(edev->pdata->select, 0); 222 223 mutex_unlock(&edev->lock); 224 return ret; 225 } 226 227 static ssize_t 228 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev, 229 const char *buf, unsigned int off) 230 { 231 struct spi_message m; 232 struct spi_transfer t[2] = {}; 233 int bits, data_len, ret; 234 u16 cmd_addr; 235 236 if (unlikely(off >= edev->size)) 237 return -EINVAL; 238 239 /* The opcode in front of the address is three bits. */ 240 bits = edev->addrlen + 3; 241 242 cmd_addr = OP_WRITE << edev->addrlen; 243 244 if (edev->pdata->flags & EE_ADDR8) { 245 cmd_addr |= off; 246 data_len = 1; 247 } else { 248 cmd_addr |= (off >> 1); 249 data_len = 2; 250 } 251 252 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr); 253 254 t[0].tx_buf = (char *)&cmd_addr; 255 t[0].len = 2; 256 t[0].bits_per_word = bits; 257 258 t[1].tx_buf = buf; 259 t[1].len = data_len; 260 t[1].bits_per_word = 8; 261 262 spi_message_init_with_transfers(&m, t, ARRAY_SIZE(t)); 263 264 ret = spi_sync(edev->spi, &m); 265 /* have to wait program cycle time Twc ms */ 266 mdelay(6); 267 return ret; 268 } 269 270 static int eeprom_93xx46_write(void *priv, unsigned int off, 271 void *val, size_t count) 272 { 273 struct eeprom_93xx46_dev *edev = priv; 274 char *buf = val; 275 int ret, step = 1; 276 unsigned int i; 277 278 if (unlikely(off >= edev->size)) 279 return -EFBIG; 280 if ((off + count) > edev->size) 281 count = edev->size - off; 282 if (unlikely(!count)) 283 return count; 284 285 /* only write even number of bytes on 16-bit devices */ 286 if (edev->pdata->flags & EE_ADDR16) { 287 step = 2; 288 count &= ~1; 289 } 290 291 /* erase/write enable */ 292 ret = eeprom_93xx46_ew(edev, 1); 293 if (ret) 294 return ret; 295 296 mutex_lock(&edev->lock); 297 298 gpiod_set_value_cansleep(edev->pdata->select, 1); 299 300 for (i = 0; i < count; i += step) { 301 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i); 302 if (ret) { 303 dev_err(&edev->spi->dev, "write failed at %u: %d\n", off + i, ret); 304 break; 305 } 306 } 307 308 gpiod_set_value_cansleep(edev->pdata->select, 0); 309 310 mutex_unlock(&edev->lock); 311 312 /* erase/write disable */ 313 eeprom_93xx46_ew(edev, 0); 314 return ret; 315 } 316 317 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev) 318 { 319 struct spi_message m; 320 struct spi_transfer t = {}; 321 int bits, ret; 322 u16 cmd_addr; 323 324 /* The opcode in front of the address is three bits. */ 325 bits = edev->addrlen + 3; 326 327 cmd_addr = OP_START << edev->addrlen; 328 cmd_addr |= ADDR_ERAL << (edev->addrlen - 6); 329 330 if (has_quirk_instruction_length(edev)) { 331 cmd_addr <<= 2; 332 bits += 2; 333 } 334 335 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits); 336 337 t.tx_buf = &cmd_addr; 338 t.len = 2; 339 t.bits_per_word = bits; 340 341 spi_message_init_with_transfers(&m, &t, 1); 342 343 mutex_lock(&edev->lock); 344 345 gpiod_set_value_cansleep(edev->pdata->select, 1); 346 347 ret = spi_sync(edev->spi, &m); 348 if (ret) 349 dev_err(&edev->spi->dev, "erase error %d\n", ret); 350 /* have to wait erase cycle time Tec ms */ 351 mdelay(6); 352 353 gpiod_set_value_cansleep(edev->pdata->select, 0); 354 355 mutex_unlock(&edev->lock); 356 return ret; 357 } 358 359 static ssize_t erase_store(struct device *dev, struct device_attribute *attr, 360 const char *buf, size_t count) 361 { 362 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev); 363 bool erase; 364 int ret; 365 366 ret = kstrtobool(buf, &erase); 367 if (ret) 368 return ret; 369 370 if (erase) { 371 ret = eeprom_93xx46_ew(edev, 1); 372 if (ret) 373 return ret; 374 ret = eeprom_93xx46_eral(edev); 375 if (ret) 376 return ret; 377 ret = eeprom_93xx46_ew(edev, 0); 378 if (ret) 379 return ret; 380 } 381 return count; 382 } 383 static DEVICE_ATTR_WO(erase); 384 385 static const struct of_device_id eeprom_93xx46_of_table[] = { 386 { .compatible = "eeprom-93xx46", .data = &at93c46_data, }, 387 { .compatible = "atmel,at93c46", .data = &at93c46_data, }, 388 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, }, 389 { .compatible = "atmel,at93c56", .data = &at93c56_data, }, 390 { .compatible = "atmel,at93c66", .data = &at93c66_data, }, 391 { .compatible = "microchip,93lc46b", .data = µchip_93lc46b_data, }, 392 {} 393 }; 394 MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table); 395 396 static const struct spi_device_id eeprom_93xx46_spi_ids[] = { 397 { .name = "eeprom-93xx46", 398 .driver_data = (kernel_ulong_t)&at93c46_data, }, 399 { .name = "at93c46", 400 .driver_data = (kernel_ulong_t)&at93c46_data, }, 401 { .name = "at93c46d", 402 .driver_data = (kernel_ulong_t)&atmel_at93c46d_data, }, 403 { .name = "at93c56", 404 .driver_data = (kernel_ulong_t)&at93c56_data, }, 405 { .name = "at93c66", 406 .driver_data = (kernel_ulong_t)&at93c66_data, }, 407 { .name = "93lc46b", 408 .driver_data = (kernel_ulong_t)µchip_93lc46b_data, }, 409 {} 410 }; 411 MODULE_DEVICE_TABLE(spi, eeprom_93xx46_spi_ids); 412 413 static int eeprom_93xx46_probe_fw(struct device *dev) 414 { 415 const struct eeprom_93xx46_devtype_data *data; 416 struct eeprom_93xx46_platform_data *pd; 417 u32 tmp; 418 int ret; 419 420 pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL); 421 if (!pd) 422 return -ENOMEM; 423 424 ret = device_property_read_u32(dev, "data-size", &tmp); 425 if (ret < 0) { 426 dev_err(dev, "data-size property not found\n"); 427 return ret; 428 } 429 430 if (tmp == 8) { 431 pd->flags |= EE_ADDR8; 432 } else if (tmp == 16) { 433 pd->flags |= EE_ADDR16; 434 } else { 435 dev_err(dev, "invalid data-size (%d)\n", tmp); 436 return -EINVAL; 437 } 438 439 if (device_property_read_bool(dev, "read-only")) 440 pd->flags |= EE_READONLY; 441 442 pd->select = devm_gpiod_get_optional(dev, "select", GPIOD_OUT_LOW); 443 if (IS_ERR(pd->select)) 444 return PTR_ERR(pd->select); 445 gpiod_set_consumer_name(pd->select, "93xx46 EEPROMs OE"); 446 447 data = spi_get_device_match_data(to_spi_device(dev)); 448 if (data) { 449 pd->quirks = data->quirks; 450 pd->flags |= data->flags; 451 } 452 453 dev->platform_data = pd; 454 455 return 0; 456 } 457 458 static int eeprom_93xx46_probe(struct spi_device *spi) 459 { 460 struct eeprom_93xx46_platform_data *pd; 461 struct eeprom_93xx46_dev *edev; 462 struct device *dev = &spi->dev; 463 int err; 464 465 err = eeprom_93xx46_probe_fw(dev); 466 if (err < 0) 467 return err; 468 469 pd = spi->dev.platform_data; 470 if (!pd) { 471 dev_err(&spi->dev, "missing platform data\n"); 472 return -ENODEV; 473 } 474 475 edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL); 476 if (!edev) 477 return -ENOMEM; 478 479 if (pd->flags & EE_SIZE1K) 480 edev->size = 128; 481 else if (pd->flags & EE_SIZE2K) 482 edev->size = 256; 483 else if (pd->flags & EE_SIZE4K) 484 edev->size = 512; 485 else { 486 dev_err(&spi->dev, "unspecified size\n"); 487 return -EINVAL; 488 } 489 490 if (pd->flags & EE_ADDR8) 491 edev->addrlen = ilog2(edev->size); 492 else if (pd->flags & EE_ADDR16) 493 edev->addrlen = ilog2(edev->size) - 1; 494 else { 495 dev_err(&spi->dev, "unspecified address type\n"); 496 return -EINVAL; 497 } 498 499 mutex_init(&edev->lock); 500 501 edev->spi = spi; 502 edev->pdata = pd; 503 504 edev->nvmem_config.type = NVMEM_TYPE_EEPROM; 505 edev->nvmem_config.name = dev_name(&spi->dev); 506 edev->nvmem_config.dev = &spi->dev; 507 edev->nvmem_config.read_only = pd->flags & EE_READONLY; 508 edev->nvmem_config.root_only = true; 509 edev->nvmem_config.owner = THIS_MODULE; 510 edev->nvmem_config.compat = true; 511 edev->nvmem_config.base_dev = &spi->dev; 512 edev->nvmem_config.reg_read = eeprom_93xx46_read; 513 edev->nvmem_config.reg_write = eeprom_93xx46_write; 514 edev->nvmem_config.priv = edev; 515 edev->nvmem_config.stride = 4; 516 edev->nvmem_config.word_size = 1; 517 edev->nvmem_config.size = edev->size; 518 519 edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config); 520 if (IS_ERR(edev->nvmem)) 521 return PTR_ERR(edev->nvmem); 522 523 dev_info(&spi->dev, "%d-bit eeprom containing %d bytes %s\n", 524 (pd->flags & EE_ADDR8) ? 8 : 16, 525 edev->size, 526 (pd->flags & EE_READONLY) ? "(readonly)" : ""); 527 528 if (!(pd->flags & EE_READONLY)) { 529 if (device_create_file(&spi->dev, &dev_attr_erase)) 530 dev_err(&spi->dev, "can't create erase interface\n"); 531 } 532 533 spi_set_drvdata(spi, edev); 534 return 0; 535 } 536 537 static void eeprom_93xx46_remove(struct spi_device *spi) 538 { 539 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi); 540 541 if (!(edev->pdata->flags & EE_READONLY)) 542 device_remove_file(&spi->dev, &dev_attr_erase); 543 } 544 545 static struct spi_driver eeprom_93xx46_driver = { 546 .driver = { 547 .name = "93xx46", 548 .of_match_table = eeprom_93xx46_of_table, 549 }, 550 .probe = eeprom_93xx46_probe, 551 .remove = eeprom_93xx46_remove, 552 .id_table = eeprom_93xx46_spi_ids, 553 }; 554 555 module_spi_driver(eeprom_93xx46_driver); 556 557 MODULE_LICENSE("GPL"); 558 MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs"); 559 MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>"); 560 MODULE_ALIAS("spi:93xx46"); 561