xref: /linux/drivers/net/wireless/ath/ath12k/wifi7/hal_rx_desc.h (revision 37a93dd5c49b5fda807fd204edf2547c3493319c)
18658abc7SPavankumar Nandeshwar /* SPDX-License-Identifier: BSD-3-Clause-Clear */
28658abc7SPavankumar Nandeshwar /*
38658abc7SPavankumar Nandeshwar  * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved.
48658abc7SPavankumar Nandeshwar  * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
58658abc7SPavankumar Nandeshwar  */
68658abc7SPavankumar Nandeshwar #ifndef ATH12K_RX_DESC_H
78658abc7SPavankumar Nandeshwar #define ATH12K_RX_DESC_H
88658abc7SPavankumar Nandeshwar 
98658abc7SPavankumar Nandeshwar enum rx_desc_decrypt_status_code {
108658abc7SPavankumar Nandeshwar 	RX_DESC_DECRYPT_STATUS_CODE_OK,
118658abc7SPavankumar Nandeshwar 	RX_DESC_DECRYPT_STATUS_CODE_UNPROTECTED_FRAME,
128658abc7SPavankumar Nandeshwar 	RX_DESC_DECRYPT_STATUS_CODE_DATA_ERR,
138658abc7SPavankumar Nandeshwar 	RX_DESC_DECRYPT_STATUS_CODE_KEY_INVALID,
148658abc7SPavankumar Nandeshwar 	RX_DESC_DECRYPT_STATUS_CODE_PEER_ENTRY_INVALID,
158658abc7SPavankumar Nandeshwar 	RX_DESC_DECRYPT_STATUS_CODE_OTHER,
168658abc7SPavankumar Nandeshwar };
178658abc7SPavankumar Nandeshwar 
188658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_REO_DEST_IND		GENMASK(4, 0)
198658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_LMAC_PEER_ID_MSB		GENMASK(6, 5)
208658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ		BIT(7)
218658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA	BIT(8)
228658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA	BIT(9)
238658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR		BIT(10)
248658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_RXDMA0_SRC_RING_SEL		GENMASK(13, 11)
258658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_RXDMA0_DST_RING_SEL		GENMASK(16, 14)
268658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN		BIT(17)
278658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN		BIT(18)
288658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_INTRA_BSS_CHECK_EN		BIT(19)
298658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_USE_PPE			BIT(20)
308658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO0_PPE_ROUTING_EN		BIT(21)
318658abc7SPavankumar Nandeshwar 
328658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO1_REO_QUEUE_DESC_HI		GENMASK(7, 0)
338658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO1_RECV_QUEUE_NUM		GENMASK(23, 8)
348658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO1_PRE_DELIM_ERR_WARN		BIT(24)
358658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO1_FIRST_DELIM_ERR		BIT(25)
368658abc7SPavankumar Nandeshwar 
378658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO2_EPD_EN			BIT(0)
388658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO2_ALL_FRAME_ENCPD		BIT(1)
398658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO2_ENC_TYPE			GENMASK(5, 2)
408658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO2_VAR_WEP_KEY_WIDTH		GENMASK(7, 6)
418658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO2_MESH_STA			GENMASK(9, 8)
428658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO2_BSSID_HIT			BIT(10)
438658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO2_BSSID_NUM			GENMASK(14, 11)
448658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO2_TID				GENMASK(18, 15)
458658abc7SPavankumar Nandeshwar 
468658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO3_RXPCU_MPDU_FLTR		GENMASK(1, 0)
478658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO3_SW_FRAME_GRP_ID		GENMASK(8, 2)
488658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO3_NDP_FRAME			BIT(9)
498658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO3_PHY_ERR			BIT(10)
508658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO3_PHY_ERR_MPDU_HDR		BIT(11)
518658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO3_PROTO_VER_ERR		BIT(12)
528658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO3_AST_LOOKUP_VALID		BIT(13)
538658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO3_RANGING			BIT(14)
548658abc7SPavankumar Nandeshwar 
558658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MPDU_FCTRL_VALID		BIT(0)
568658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MPDU_DUR_VALID		BIT(1)
578658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MAC_ADDR1_VALID		BIT(2)
588658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MAC_ADDR2_VALID		BIT(3)
598658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MAC_ADDR3_VALID		BIT(4)
608658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MAC_ADDR4_VALID		BIT(5)
618658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MPDU_SEQ_CTRL_VALID		BIT(6)
628658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MPDU_QOS_CTRL_VALID		BIT(7)
638658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MPDU_HT_CTRL_VALID		BIT(8)
648658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_ENCRYPT_INFO_VALID		BIT(9)
658658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MPDU_FRAG_NUMBER		GENMASK(13, 10)
668658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MORE_FRAG_FLAG		BIT(14)
678658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_FROM_DS			BIT(16)
688658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_TO_DS			BIT(17)
698658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_ENCRYPTED			BIT(18)
708658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MPDU_RETRY			BIT(19)
718658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO4_MPDU_SEQ_NUM		GENMASK(31, 20)
728658abc7SPavankumar Nandeshwar 
738658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_KEY_ID			GENMASK(7, 0)
748658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_NEW_PEER_ENTRY		BIT(8)
758658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_DECRYPT_NEEDED		BIT(9)
768658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_DECAP_TYPE			GENMASK(11, 10)
778658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_VLAN_TAG_C_PADDING		BIT(12)
788658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_VLAN_TAG_S_PADDING		BIT(13)
798658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_C		BIT(14)
808658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_S		BIT(15)
818658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_PRE_DELIM_COUNT		GENMASK(27, 16)
828658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_AMPDU_FLAG			BIT(28)
838658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_BAR_FRAME			BIT(29)
848658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO5_RAW_MPDU			BIT(30)
858658abc7SPavankumar Nandeshwar 
868658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_MPDU_LEN			GENMASK(13, 0)
878658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_FIRST_MPDU			BIT(14)
888658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_MCAST_BCAST			BIT(15)
898658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_AST_IDX_NOT_FOUND		BIT(16)
908658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_AST_IDX_TIMEOUT		BIT(17)
918658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_POWER_MGMT			BIT(18)
928658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_NON_QOS			BIT(19)
938658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_NULL_DATA			BIT(20)
948658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_MGMT_TYPE			BIT(21)
958658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_CTRL_TYPE			BIT(22)
968658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_MORE_DATA			BIT(23)
978658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_EOSP			BIT(24)
988658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_FRAGMENT			BIT(25)
998658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_ORDER			BIT(26)
1008658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_UAPSD_TRIGGER		BIT(27)
1018658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_ENCRYPT_REQUIRED		BIT(28)
1028658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_DIRECTED			BIT(29)
1038658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO6_AMSDU_PRESENT		BIT(30)
1048658abc7SPavankumar Nandeshwar 
1058658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO7_VDEV_ID			GENMASK(7, 0)
1068658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO7_SERVICE_CODE		GENMASK(16, 8)
1078658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO7_PRIORITY_VALID		BIT(17)
1088658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO7_SRC_INFO			GENMASK(29, 18)
1098658abc7SPavankumar Nandeshwar 
1108658abc7SPavankumar Nandeshwar #define RX_MPDU_START_INFO8_AUTH_TO_SEND_WDS		BIT(0)
1118658abc7SPavankumar Nandeshwar 
1128658abc7SPavankumar Nandeshwar struct rx_mpdu_start_qcn9274 {
1138658abc7SPavankumar Nandeshwar 	__le32 info0;
1148658abc7SPavankumar Nandeshwar 	__le32 reo_queue_desc_lo;
1158658abc7SPavankumar Nandeshwar 	__le32 info1;
1168658abc7SPavankumar Nandeshwar 	__le32 pn[4];
1178658abc7SPavankumar Nandeshwar 	__le32 info2;
1188658abc7SPavankumar Nandeshwar 	__le32 peer_meta_data;
1198658abc7SPavankumar Nandeshwar 	__le16 info3;
1208658abc7SPavankumar Nandeshwar 	__le16 phy_ppdu_id;
1218658abc7SPavankumar Nandeshwar 	__le16 ast_index;
1228658abc7SPavankumar Nandeshwar 	__le16 sw_peer_id;
1238658abc7SPavankumar Nandeshwar 	__le32 info4;
1248658abc7SPavankumar Nandeshwar 	__le32 info5;
1258658abc7SPavankumar Nandeshwar 	__le32 info6;
1268658abc7SPavankumar Nandeshwar 	__le16 frame_ctrl;
1278658abc7SPavankumar Nandeshwar 	__le16 duration;
1288658abc7SPavankumar Nandeshwar 	u8 addr1[ETH_ALEN];
1298658abc7SPavankumar Nandeshwar 	u8 addr2[ETH_ALEN];
1308658abc7SPavankumar Nandeshwar 	u8 addr3[ETH_ALEN];
1318658abc7SPavankumar Nandeshwar 	__le16 seq_ctrl;
1328658abc7SPavankumar Nandeshwar 	u8 addr4[ETH_ALEN];
1338658abc7SPavankumar Nandeshwar 	__le16 qos_ctrl;
1348658abc7SPavankumar Nandeshwar 	__le32 ht_ctrl;
1358658abc7SPavankumar Nandeshwar 	__le32 info7;
1368658abc7SPavankumar Nandeshwar 	u8 multi_link_addr1[ETH_ALEN];
1378658abc7SPavankumar Nandeshwar 	u8 multi_link_addr2[ETH_ALEN];
1388658abc7SPavankumar Nandeshwar 	__le32 info8;
1398658abc7SPavankumar Nandeshwar 	__le32 res0;
1408658abc7SPavankumar Nandeshwar 	__le32 res1;
1418658abc7SPavankumar Nandeshwar } __packed;
1428658abc7SPavankumar Nandeshwar 
1438658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_MPDU_START_TAG			BIT(0)
1448658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_INFO0_REO_QUEUE_DESC_LO		BIT(1)
1458658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_INFO1_PN_31_0				BIT(2)
1468658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_PN_95_32				BIT(3)
1478658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_PN_127_96_INFO2			BIT(4)
1488658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_PEER_MDATA_INFO3_PHY_PPDU_ID		BIT(5)
1498658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_AST_IDX_SW_PEER_ID_INFO4		BIT(6)
1508658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_INFO5_INFO6				BIT(7)
1518658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_FRAME_CTRL_DURATION_ADDR1_31_0	BIT(8)
1528658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_ADDR2_47_0_ADDR1_47_32		BIT(9)
1538658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_ADDR3_47_0_SEQ_CTRL			BIT(10)
1548658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_ADDR4_47_0_QOS_CTRL			BIT(11)
1558658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_HT_CTRL_INFO7				BIT(12)
1568658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_ML_ADDR1_47_0_ML_ADDR2_15_0		BIT(13)
1578658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_ML_ADDR2_47_16_INFO8			BIT(14)
1588658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_SELECT_RES_0_RES_1				BIT(15)
1598658abc7SPavankumar Nandeshwar 
1608658abc7SPavankumar Nandeshwar #define QCN9274_MPDU_START_WMASK (QCN9274_MPDU_START_SELECT_INFO1_PN_31_0 |	\
1618658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_PN_95_32 |				\
1628658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_PN_127_96_INFO2 |			\
1638658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_PEER_MDATA_INFO3_PHY_PPDU_ID |	\
1648658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_AST_IDX_SW_PEER_ID_INFO4 |		\
1658658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_INFO5_INFO6 |				\
1668658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_FRAME_CTRL_DURATION_ADDR1_31_0 |	\
1678658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_ADDR2_47_0_ADDR1_47_32 |		\
1688658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_ADDR3_47_0_SEQ_CTRL |			\
1698658abc7SPavankumar Nandeshwar 		QCN9274_MPDU_START_SELECT_ADDR4_47_0_QOS_CTRL)
1708658abc7SPavankumar Nandeshwar 
1718658abc7SPavankumar Nandeshwar /* The below rx_mpdu_start_qcn9274_compact structure is tied with the mask
1728658abc7SPavankumar Nandeshwar  * value QCN9274_MPDU_START_WMASK. If the mask value changes the structure
1738658abc7SPavankumar Nandeshwar  * will also change.
1748658abc7SPavankumar Nandeshwar  */
1758658abc7SPavankumar Nandeshwar 
1768658abc7SPavankumar Nandeshwar struct rx_mpdu_start_qcn9274_compact {
1778658abc7SPavankumar Nandeshwar 	__le32 info1;
1788658abc7SPavankumar Nandeshwar 	__le32 pn[4];
1798658abc7SPavankumar Nandeshwar 	__le32 info2;
1808658abc7SPavankumar Nandeshwar 	__le32 peer_meta_data;
1818658abc7SPavankumar Nandeshwar 	__le16 info3;
1828658abc7SPavankumar Nandeshwar 	__le16 phy_ppdu_id;
1838658abc7SPavankumar Nandeshwar 	__le16 ast_index;
1848658abc7SPavankumar Nandeshwar 	__le16 sw_peer_id;
1858658abc7SPavankumar Nandeshwar 	__le32 info4;
1868658abc7SPavankumar Nandeshwar 	__le32 info5;
1878658abc7SPavankumar Nandeshwar 	__le32 info6;
1888658abc7SPavankumar Nandeshwar 	__le16 frame_ctrl;
1898658abc7SPavankumar Nandeshwar 	__le16 duration;
1908658abc7SPavankumar Nandeshwar 	u8 addr1[ETH_ALEN];
1918658abc7SPavankumar Nandeshwar 	u8 addr2[ETH_ALEN];
1928658abc7SPavankumar Nandeshwar 	u8 addr3[ETH_ALEN];
1938658abc7SPavankumar Nandeshwar 	__le16 seq_ctrl;
1948658abc7SPavankumar Nandeshwar 	u8 addr4[ETH_ALEN];
1958658abc7SPavankumar Nandeshwar 	__le16 qos_ctrl;
1968658abc7SPavankumar Nandeshwar } __packed;
1978658abc7SPavankumar Nandeshwar 
1988658abc7SPavankumar Nandeshwar /* rx_mpdu_start
1998658abc7SPavankumar Nandeshwar  *
2008658abc7SPavankumar Nandeshwar  * reo_destination_indication
2018658abc7SPavankumar Nandeshwar  *		The id of the reo exit ring where the msdu frame shall push
2028658abc7SPavankumar Nandeshwar  *		after (MPDU level) reordering has finished. Values are defined
2038658abc7SPavankumar Nandeshwar  *		in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_.
2048658abc7SPavankumar Nandeshwar  *
2058658abc7SPavankumar Nandeshwar  * lmac_peer_id_msb
2068658abc7SPavankumar Nandeshwar  *
2078658abc7SPavankumar Nandeshwar  *		If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb
2088658abc7SPavankumar Nandeshwar  *		is 2'b00, Rx OLE uses a REO destination indicati'n of {1'b1,
2098658abc7SPavankumar Nandeshwar  *		hash[3:0]} using the chosen Toeplitz hash from Common Parser
2108658abc7SPavankumar Nandeshwar  *		if flow search fails.
2118658abc7SPavankumar Nandeshwar  *		If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb
2128658abc7SPavankumar Nandeshwar  *		's not 2'b00, Rx OLE uses a REO destination indication of
2138658abc7SPavankumar Nandeshwar  *		{lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz
2148658abc7SPavankumar Nandeshwar  *		hash from Common Parser if flow search fails.
2158658abc7SPavankumar Nandeshwar  *
2168658abc7SPavankumar Nandeshwar  * use_flow_id_toeplitz_clfy
2178658abc7SPavankumar Nandeshwar  *		Indication to Rx OLE to enable REO destination routing based
2188658abc7SPavankumar Nandeshwar  *		on the chosen Toeplitz hash from Common Parser, in case
2198658abc7SPavankumar Nandeshwar  *		flow search fails
2208658abc7SPavankumar Nandeshwar  *
2218658abc7SPavankumar Nandeshwar  * pkt_selection_fp_ucast_data
2228658abc7SPavankumar Nandeshwar  *		Filter pass Unicast data frame (matching rxpcu_filter_pass
2238658abc7SPavankumar Nandeshwar  *		and sw_frame_group_Unicast_data) routing selection
2248658abc7SPavankumar Nandeshwar  *
2258658abc7SPavankumar Nandeshwar  * pkt_selection_fp_mcast_data
2268658abc7SPavankumar Nandeshwar  *		Filter pass Multicast data frame (matching rxpcu_filter_pass
2278658abc7SPavankumar Nandeshwar  *		and sw_frame_group_Multicast_data) routing selection
2288658abc7SPavankumar Nandeshwar  *
2298658abc7SPavankumar Nandeshwar  * pkt_selection_fp_ctrl_bar
2308658abc7SPavankumar Nandeshwar  *		Filter pass BAR frame (matching rxpcu_filter_pass
2318658abc7SPavankumar Nandeshwar  *		and sw_frame_group_ctrl_1000) routing selection
2328658abc7SPavankumar Nandeshwar  *
2338658abc7SPavankumar Nandeshwar  * rxdma0_src_ring_selection
2348658abc7SPavankumar Nandeshwar  *		Field only valid when for the received frame type the corresponding
2358658abc7SPavankumar Nandeshwar  *		pkt_selection_fp_... bit is set
2368658abc7SPavankumar Nandeshwar  *
2378658abc7SPavankumar Nandeshwar  * rxdma0_dst_ring_selection
2388658abc7SPavankumar Nandeshwar  *		Field only valid when for the received frame type the corresponding
2398658abc7SPavankumar Nandeshwar  *		pkt_selection_fp_... bit is set
2408658abc7SPavankumar Nandeshwar  *
2418658abc7SPavankumar Nandeshwar  * mcast_echo_drop_enable
2428658abc7SPavankumar Nandeshwar  *		If set, for multicast packets, multicast echo check (i.e.
2438658abc7SPavankumar Nandeshwar  *		SA search with mcast_echo_check = 1) shall be performed
2448658abc7SPavankumar Nandeshwar  *		by RXOLE, and any multicast echo packets should be indicated
2458658abc7SPavankumar Nandeshwar  *		 to RXDMA for release to WBM
2468658abc7SPavankumar Nandeshwar  *
2478658abc7SPavankumar Nandeshwar  * wds_learning_detect_en
2488658abc7SPavankumar Nandeshwar  *		If set, WDS learning detection based on SA search and notification
2498658abc7SPavankumar Nandeshwar  *		to FW (using RXDMA0 status ring) is enabled and the "timestamp"
2508658abc7SPavankumar Nandeshwar  *		field in address search failure cache-only entry should
2518658abc7SPavankumar Nandeshwar  *		be used to avoid multiple WDS learning notifications.
2528658abc7SPavankumar Nandeshwar  *
2538658abc7SPavankumar Nandeshwar  * intrabss_check_en
2548658abc7SPavankumar Nandeshwar  *		If set, intra-BSS routing detection is enabled
2558658abc7SPavankumar Nandeshwar  *
2568658abc7SPavankumar Nandeshwar  * use_ppe
2578658abc7SPavankumar Nandeshwar  *		Indicates to RXDMA to ignore the REO_destination_indication
2588658abc7SPavankumar Nandeshwar  *		and use a programmed value corresponding to the REO2PPE
2598658abc7SPavankumar Nandeshwar  *		ring
2608658abc7SPavankumar Nandeshwar  *		This override to REO2PPE for packets requiring multiple
2618658abc7SPavankumar Nandeshwar  *		buffers shall be disabled based on an RXDMA configuration,
2628658abc7SPavankumar Nandeshwar  *		as PPE may not support such packets.
2638658abc7SPavankumar Nandeshwar  *
2648658abc7SPavankumar Nandeshwar  *		Supported only in full AP chips, not in client/soft
2658658abc7SPavankumar Nandeshwar  *		chips
2668658abc7SPavankumar Nandeshwar  *
2678658abc7SPavankumar Nandeshwar  * ppe_routing_enable
2688658abc7SPavankumar Nandeshwar  *		Global enable/disable bit for routing to PPE, used to disable
2698658abc7SPavankumar Nandeshwar  *		PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE'
2708658abc7SPavankumar Nandeshwar  *		This is set by SW for peers which are being handled by a
2718658abc7SPavankumar Nandeshwar  *		host SW/accelerator subsystem that also handles packet
2728658abc7SPavankumar Nandeshwar  *		buffer management for WiFi-to-PPE routing.
2738658abc7SPavankumar Nandeshwar  *
2748658abc7SPavankumar Nandeshwar  *		This is cleared by SW for peers which are being handled
2758658abc7SPavankumar Nandeshwar  *		by a different subsystem, completely disabling WiFi-to-PPE
2768658abc7SPavankumar Nandeshwar  *		routing for such peers.
2778658abc7SPavankumar Nandeshwar  *
2788658abc7SPavankumar Nandeshwar  * rx_reo_queue_desc_addr_lo
2798658abc7SPavankumar Nandeshwar  *		Address (lower 32 bits) of the REO queue descriptor.
2808658abc7SPavankumar Nandeshwar  *
2818658abc7SPavankumar Nandeshwar  * rx_reo_queue_desc_addr_hi
2828658abc7SPavankumar Nandeshwar  *		Address (upper 8 bits) of the REO queue descriptor.
2838658abc7SPavankumar Nandeshwar  *
2848658abc7SPavankumar Nandeshwar  * receive_queue_number
2858658abc7SPavankumar Nandeshwar  *		Indicates the MPDU queue ID to which this MPDU link
2868658abc7SPavankumar Nandeshwar  *		descriptor belongs.
2878658abc7SPavankumar Nandeshwar  *
2888658abc7SPavankumar Nandeshwar  * pre_delim_err_warning
2898658abc7SPavankumar Nandeshwar  *		Indicates that a delimiter FCS error was found in between the
2908658abc7SPavankumar Nandeshwar  *		previous MPDU and this MPDU. Note that this is just a warning,
2918658abc7SPavankumar Nandeshwar  *		and does not mean that this MPDU is corrupted in any way. If
2928658abc7SPavankumar Nandeshwar  *		it is, there will be other errors indicated such as FCS or
2938658abc7SPavankumar Nandeshwar  *		decrypt errors.
2948658abc7SPavankumar Nandeshwar  *
2958658abc7SPavankumar Nandeshwar  * first_delim_err
2968658abc7SPavankumar Nandeshwar  *		Indicates that the first delimiter had a FCS failure.
2978658abc7SPavankumar Nandeshwar  *
2988658abc7SPavankumar Nandeshwar  * pn
2998658abc7SPavankumar Nandeshwar  *		The PN number.
3008658abc7SPavankumar Nandeshwar  *
3018658abc7SPavankumar Nandeshwar  * epd_en
3028658abc7SPavankumar Nandeshwar  *		Field only valid when AST_based_lookup_valid == 1.
3038658abc7SPavankumar Nandeshwar  *		In case of ndp or phy_err or AST_based_lookup_valid == 0,
3048658abc7SPavankumar Nandeshwar  *		this field will be set to 0
3058658abc7SPavankumar Nandeshwar  *		If set to one use EPD instead of LPD
3068658abc7SPavankumar Nandeshwar  *		In case of ndp or phy_err, this field will never be set.
3078658abc7SPavankumar Nandeshwar  *
3088658abc7SPavankumar Nandeshwar  * all_frames_shall_be_encrypted
3098658abc7SPavankumar Nandeshwar  *		In case of ndp or phy_err or AST_based_lookup_valid == 0,
3108658abc7SPavankumar Nandeshwar  *		this field will be set to 0
3118658abc7SPavankumar Nandeshwar  *
3128658abc7SPavankumar Nandeshwar  *		When set, all frames (data only ?) shall be encrypted. If
3138658abc7SPavankumar Nandeshwar  *		not, RX CRYPTO shall set an error flag.
3148658abc7SPavankumar Nandeshwar  *
3158658abc7SPavankumar Nandeshwar  *
3168658abc7SPavankumar Nandeshwar  * encrypt_type
3178658abc7SPavankumar Nandeshwar  *		In case of ndp or phy_err or AST_based_lookup_valid == 0,
3188658abc7SPavankumar Nandeshwar  *		this field will be set to 0
3198658abc7SPavankumar Nandeshwar  *
3208658abc7SPavankumar Nandeshwar  *		Indicates type of decrypt cipher used (as defined in the
3218658abc7SPavankumar Nandeshwar  *		peer entry)
3228658abc7SPavankumar Nandeshwar  *
3238658abc7SPavankumar Nandeshwar  * wep_key_width_for_variable_key
3248658abc7SPavankumar Nandeshwar  *
3258658abc7SPavankumar Nandeshwar  *		Field only valid when key_type is set to wep_varied_width.
3268658abc7SPavankumar Nandeshwar  *
3278658abc7SPavankumar Nandeshwar  * mesh_sta
3288658abc7SPavankumar Nandeshwar  *
3298658abc7SPavankumar Nandeshwar  * bssid_hit
3308658abc7SPavankumar Nandeshwar  *		When set, the BSSID of the incoming frame matched one of
3318658abc7SPavankumar Nandeshwar  *		 the 8 BSSID register values
3328658abc7SPavankumar Nandeshwar  * bssid_number
3338658abc7SPavankumar Nandeshwar  *		Field only valid when bssid_hit is set.
3348658abc7SPavankumar Nandeshwar  *		This number indicates which one out of the 8 BSSID register
3358658abc7SPavankumar Nandeshwar  *		values matched the incoming frame
3368658abc7SPavankumar Nandeshwar  *
3378658abc7SPavankumar Nandeshwar  * tid
3388658abc7SPavankumar Nandeshwar  *		Field only valid when mpdu_qos_control_valid is set
3398658abc7SPavankumar Nandeshwar  *		The TID field in the QoS control field
3408658abc7SPavankumar Nandeshwar  *
3418658abc7SPavankumar Nandeshwar  * peer_meta_data
3428658abc7SPavankumar Nandeshwar  *		Meta data that SW has programmed in the Peer table entry
3438658abc7SPavankumar Nandeshwar  *		of the transmitting STA.
3448658abc7SPavankumar Nandeshwar  *
3458658abc7SPavankumar Nandeshwar  * rxpcu_mpdu_filter_in_category
3468658abc7SPavankumar Nandeshwar  *		Field indicates what the reason was that this mpdu frame
3478658abc7SPavankumar Nandeshwar  *		was allowed to come into the receive path by rxpcu. Values
3488658abc7SPavankumar Nandeshwar  *		are defined in enum %RX_DESC_RXPCU_FILTER_*.
3498658abc7SPavankumar Nandeshwar  *
3508658abc7SPavankumar Nandeshwar  * sw_frame_group_id
3518658abc7SPavankumar Nandeshwar  *		SW processes frames based on certain classifications. Values
3528658abc7SPavankumar Nandeshwar  *		are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*.
3538658abc7SPavankumar Nandeshwar  *
3548658abc7SPavankumar Nandeshwar  * ndp_frame
3558658abc7SPavankumar Nandeshwar  *		When set, the received frame was an NDP frame, and thus
3568658abc7SPavankumar Nandeshwar  *		there will be no MPDU data.
3578658abc7SPavankumar Nandeshwar  * phy_err
3588658abc7SPavankumar Nandeshwar  *		When set, a PHY error was received before MAC received any
3598658abc7SPavankumar Nandeshwar  *		data, and thus there will be no MPDU data.
3608658abc7SPavankumar Nandeshwar  *
3618658abc7SPavankumar Nandeshwar  * phy_err_during_mpdu_header
3628658abc7SPavankumar Nandeshwar  *		When set, a PHY error was received before MAC received the
3638658abc7SPavankumar Nandeshwar  *		complete MPDU header which was needed for proper decoding
3648658abc7SPavankumar Nandeshwar  *
3658658abc7SPavankumar Nandeshwar  * protocol_version_err
3668658abc7SPavankumar Nandeshwar  *		Set when RXPCU detected a version error in the Frame control
3678658abc7SPavankumar Nandeshwar  *		field
3688658abc7SPavankumar Nandeshwar  *
3698658abc7SPavankumar Nandeshwar  * ast_based_lookup_valid
3708658abc7SPavankumar Nandeshwar  *		When set, AST based lookup for this frame has found a valid
3718658abc7SPavankumar Nandeshwar  *		result.
3728658abc7SPavankumar Nandeshwar  *
3738658abc7SPavankumar Nandeshwar  * ranging
3748658abc7SPavankumar Nandeshwar  *		When set, a ranging NDPA or a ranging NDP was received.
3758658abc7SPavankumar Nandeshwar  *
3768658abc7SPavankumar Nandeshwar  * phy_ppdu_id
3778658abc7SPavankumar Nandeshwar  *		A ppdu counter value that PHY increments for every PPDU
3788658abc7SPavankumar Nandeshwar  *		received. The counter value wraps around.
3798658abc7SPavankumar Nandeshwar  *
3808658abc7SPavankumar Nandeshwar  * ast_index
3818658abc7SPavankumar Nandeshwar  *
3828658abc7SPavankumar Nandeshwar  *		This field indicates the index of the AST entry corresponding
3838658abc7SPavankumar Nandeshwar  *		to this MPDU. It is provided by the GSE module instantiated
3848658abc7SPavankumar Nandeshwar  *		in RXPCU.
3858658abc7SPavankumar Nandeshwar  *		A value of 0xFFFF indicates an invalid AST index, meaning
3868658abc7SPavankumar Nandeshwar  *		that No AST entry was found or NO AST search was performed
3878658abc7SPavankumar Nandeshwar  *
3888658abc7SPavankumar Nandeshwar  * sw_peer_id
3898658abc7SPavankumar Nandeshwar  *		In case of ndp or phy_err or AST_based_lookup_valid == 0,
3908658abc7SPavankumar Nandeshwar  *		this field will be set to 0
3918658abc7SPavankumar Nandeshwar  *		This field indicates a unique peer identifier. It is set
3928658abc7SPavankumar Nandeshwar  *		equal to field 'sw_peer_id' from the AST entry
3938658abc7SPavankumar Nandeshwar  *
3948658abc7SPavankumar Nandeshwar  * frame_control_valid
3958658abc7SPavankumar Nandeshwar  *		When set, the field Mpdu_Frame_control_field has valid information
3968658abc7SPavankumar Nandeshwar  *
3978658abc7SPavankumar Nandeshwar  * frame_duration_valid
3988658abc7SPavankumar Nandeshwar  *		When set, the field Mpdu_duration_field has valid information
3998658abc7SPavankumar Nandeshwar  *
4008658abc7SPavankumar Nandeshwar  * mac_addr_ad1..4_valid
4018658abc7SPavankumar Nandeshwar  *		When set, the fields mac_addr_adx_..... have valid information
4028658abc7SPavankumar Nandeshwar  *
4038658abc7SPavankumar Nandeshwar  * mpdu_seq_ctrl_valid
4048658abc7SPavankumar Nandeshwar  *
4058658abc7SPavankumar Nandeshwar  *		When set, the fields mpdu_sequence_control_field and mpdu_sequence_number
4068658abc7SPavankumar Nandeshwar  *		have valid information as well as field
4078658abc7SPavankumar Nandeshwar  *		For MPDUs without a sequence control field, this field will
4088658abc7SPavankumar Nandeshwar  *		not be set.
4098658abc7SPavankumar Nandeshwar  *
4108658abc7SPavankumar Nandeshwar  * mpdu_qos_ctrl_valid, mpdu_ht_ctrl_valid
4118658abc7SPavankumar Nandeshwar  *
4128658abc7SPavankumar Nandeshwar  *		When set, the field mpdu_qos_control_field, mpdu_ht_control has valid
4138658abc7SPavankumar Nandeshwar  *		information, For MPDUs without a QoS,HT control field, this field
4148658abc7SPavankumar Nandeshwar  *		will not be set.
4158658abc7SPavankumar Nandeshwar  *
4168658abc7SPavankumar Nandeshwar  * frame_encryption_info_valid
4178658abc7SPavankumar Nandeshwar  *
4188658abc7SPavankumar Nandeshwar  *		When set, the encryption related info fields, like IV and
4198658abc7SPavankumar Nandeshwar  *		PN are valid
4208658abc7SPavankumar Nandeshwar  *		For MPDUs that are not encrypted, this will not be set.
4218658abc7SPavankumar Nandeshwar  *
4228658abc7SPavankumar Nandeshwar  * mpdu_fragment_number
4238658abc7SPavankumar Nandeshwar  *
4248658abc7SPavankumar Nandeshwar  *		Field only valid when Mpdu_sequence_control_valid is set
4258658abc7SPavankumar Nandeshwar  *		AND Fragment_flag is set. The fragment number from the 802.11 header
4268658abc7SPavankumar Nandeshwar  *
4278658abc7SPavankumar Nandeshwar  * more_fragment_flag
4288658abc7SPavankumar Nandeshwar  *
4298658abc7SPavankumar Nandeshwar  *		The More Fragment bit setting from the MPDU header of the
4308658abc7SPavankumar Nandeshwar  *		received frame
4318658abc7SPavankumar Nandeshwar  *
4328658abc7SPavankumar Nandeshwar  * fr_ds
4338658abc7SPavankumar Nandeshwar  *
4348658abc7SPavankumar Nandeshwar  *		Field only valid when Mpdu_frame_control_valid is set
4358658abc7SPavankumar Nandeshwar  *		Set if the from DS bit is set in the frame control.
4368658abc7SPavankumar Nandeshwar  *
4378658abc7SPavankumar Nandeshwar  * to_ds
4388658abc7SPavankumar Nandeshwar  *
4398658abc7SPavankumar Nandeshwar  *		Field only valid when Mpdu_frame_control_valid is set
4408658abc7SPavankumar Nandeshwar  *		Set if the to DS bit is set in the frame control.
4418658abc7SPavankumar Nandeshwar  *
4428658abc7SPavankumar Nandeshwar  * encrypted
4438658abc7SPavankumar Nandeshwar  *
4448658abc7SPavankumar Nandeshwar  *		Field only valid when Mpdu_frame_control_valid is set.
4458658abc7SPavankumar Nandeshwar  *		Protected bit from the frame control.
4468658abc7SPavankumar Nandeshwar  *
4478658abc7SPavankumar Nandeshwar  * mpdu_retry
4488658abc7SPavankumar Nandeshwar  *		Field only valid when Mpdu_frame_control_valid is set.
4498658abc7SPavankumar Nandeshwar  *		Retry bit from the frame control.  Only valid when first_msdu is set
4508658abc7SPavankumar Nandeshwar  *
4518658abc7SPavankumar Nandeshwar  * mpdu_sequence_number
4528658abc7SPavankumar Nandeshwar  *		Field only valid when Mpdu_sequence_control_valid is set.
4538658abc7SPavankumar Nandeshwar  *
4548658abc7SPavankumar Nandeshwar  *		The sequence number from the 802.11 header.
4558658abc7SPavankumar Nandeshwar  * key_id
4568658abc7SPavankumar Nandeshwar  *		The key ID octet from the IV.
4578658abc7SPavankumar Nandeshwar  *		Field only valid when Frame_encryption_info_valid is set
4588658abc7SPavankumar Nandeshwar  *
4598658abc7SPavankumar Nandeshwar  * new_peer_entry
4608658abc7SPavankumar Nandeshwar  *		Set if new RX_PEER_ENTRY TLV follows. If clear, RX_PEER_ENTRY
4618658abc7SPavankumar Nandeshwar  *		doesn't follow so RX DECRYPTION module either uses old peer
4628658abc7SPavankumar Nandeshwar  *		entry or not decrypt.
4638658abc7SPavankumar Nandeshwar  *
4648658abc7SPavankumar Nandeshwar  * decrypt_needed
4658658abc7SPavankumar Nandeshwar  *		When RXPCU sets bit 'ast_index_not_found or ast_index_timeout',
4668658abc7SPavankumar Nandeshwar  *		RXPCU will also ensure that this bit is NOT set. CRYPTO for that
4678658abc7SPavankumar Nandeshwar  *		reason only needs to evaluate this bit and non of the other ones
4688658abc7SPavankumar Nandeshwar  *
4698658abc7SPavankumar Nandeshwar  * decap_type
4708658abc7SPavankumar Nandeshwar  *		Used by the OLE during decapsulation. Values are defined in
4718658abc7SPavankumar Nandeshwar  *		enum %MPDU_START_DECAP_TYPE_*.
4728658abc7SPavankumar Nandeshwar  *
4738658abc7SPavankumar Nandeshwar  * rx_insert_vlan_c_tag_padding
4748658abc7SPavankumar Nandeshwar  * rx_insert_vlan_s_tag_padding
4758658abc7SPavankumar Nandeshwar  *		Insert 4 byte of all zeros as VLAN tag or double VLAN tag if
4768658abc7SPavankumar Nandeshwar  *		the rx payload does not have VLAN.
4778658abc7SPavankumar Nandeshwar  *
4788658abc7SPavankumar Nandeshwar  * strip_vlan_c_tag_decap
4798658abc7SPavankumar Nandeshwar  * strip_vlan_s_tag_decap
4808658abc7SPavankumar Nandeshwar  *		Strip VLAN or double VLAN during decapsulation.
4818658abc7SPavankumar Nandeshwar  *
4828658abc7SPavankumar Nandeshwar  * pre_delim_count
4838658abc7SPavankumar Nandeshwar  *		The number of delimiters before this MPDU. Note that this
4848658abc7SPavankumar Nandeshwar  *		number is cleared at PPDU start. If this MPDU is the first
4858658abc7SPavankumar Nandeshwar  *		received MPDU in the PPDU and this MPDU gets filtered-in,
4868658abc7SPavankumar Nandeshwar  *		this field will indicate the number of delimiters located
4878658abc7SPavankumar Nandeshwar  *		after the last MPDU in the previous PPDU.
4888658abc7SPavankumar Nandeshwar  *
4898658abc7SPavankumar Nandeshwar  *		If this MPDU is located after the first received MPDU in
4908658abc7SPavankumar Nandeshwar  *		an PPDU, this field will indicate the number of delimiters
4918658abc7SPavankumar Nandeshwar  *		located between the previous MPDU and this MPDU.
4928658abc7SPavankumar Nandeshwar  *
4938658abc7SPavankumar Nandeshwar  * ampdu_flag
4948658abc7SPavankumar Nandeshwar  *		Received frame was part of an A-MPDU.
4958658abc7SPavankumar Nandeshwar  *
4968658abc7SPavankumar Nandeshwar  * bar_frame
4978658abc7SPavankumar Nandeshwar  *		Received frame is a BAR frame
4988658abc7SPavankumar Nandeshwar  *
4998658abc7SPavankumar Nandeshwar  * raw_mpdu
5008658abc7SPavankumar Nandeshwar  *		Set when no 802.11 to nwifi/ethernet hdr conversion is done
5018658abc7SPavankumar Nandeshwar  *
5028658abc7SPavankumar Nandeshwar  * mpdu_length
5038658abc7SPavankumar Nandeshwar  *		MPDU length before decapsulation.
5048658abc7SPavankumar Nandeshwar  *
5058658abc7SPavankumar Nandeshwar  * first_mpdu
5068658abc7SPavankumar Nandeshwar  *		Indicates the first MSDU of the PPDU.  If both first_mpdu
5078658abc7SPavankumar Nandeshwar  *		and last_mpdu are set in the MSDU then this is a not an
5088658abc7SPavankumar Nandeshwar  *		A-MPDU frame but a stand alone MPDU.  Interior MPDU in an
5098658abc7SPavankumar Nandeshwar  *		A-MPDU shall have both first_mpdu and last_mpdu bits set to
5108658abc7SPavankumar Nandeshwar  *		0.  The PPDU start status will only be valid when this bit
5118658abc7SPavankumar Nandeshwar  *		is set.
5128658abc7SPavankumar Nandeshwar  *
5138658abc7SPavankumar Nandeshwar  * mcast_bcast
5148658abc7SPavankumar Nandeshwar  *		Multicast / broadcast indicator.  Only set when the MAC
5158658abc7SPavankumar Nandeshwar  *		address 1 bit 0 is set indicating mcast/bcast and the BSSID
5168658abc7SPavankumar Nandeshwar  *		matches one of the 4 BSSID registers. Only set when
5178658abc7SPavankumar Nandeshwar  *		first_msdu is set.
5188658abc7SPavankumar Nandeshwar  *
5198658abc7SPavankumar Nandeshwar  * ast_index_not_found
5208658abc7SPavankumar Nandeshwar  *		Only valid when first_msdu is set. Indicates no AST matching
5218658abc7SPavankumar Nandeshwar  *		entries within the max search count.
5228658abc7SPavankumar Nandeshwar  *
5238658abc7SPavankumar Nandeshwar  * ast_index_timeout
5248658abc7SPavankumar Nandeshwar  *		Only valid when first_msdu is set. Indicates an unsuccessful
5258658abc7SPavankumar Nandeshwar  *		search in the address search table due to timeout.
5268658abc7SPavankumar Nandeshwar  *
5278658abc7SPavankumar Nandeshwar  * power_mgmt
5288658abc7SPavankumar Nandeshwar  *		Power management bit set in the 802.11 header.  Only set
5298658abc7SPavankumar Nandeshwar  *		when first_msdu is set.
5308658abc7SPavankumar Nandeshwar  *
5318658abc7SPavankumar Nandeshwar  * non_qos
5328658abc7SPavankumar Nandeshwar  *		Set if packet is not a non-QoS data frame.  Only set when
5338658abc7SPavankumar Nandeshwar  *		first_msdu is set.
5348658abc7SPavankumar Nandeshwar  *
5358658abc7SPavankumar Nandeshwar  * null_data
5368658abc7SPavankumar Nandeshwar  *		Set if frame type indicates either null data or QoS null
5378658abc7SPavankumar Nandeshwar  *		data format.  Only set when first_msdu is set.
5388658abc7SPavankumar Nandeshwar  *
5398658abc7SPavankumar Nandeshwar  * mgmt_type
5408658abc7SPavankumar Nandeshwar  *		Set if packet is a management packet.  Only set when
5418658abc7SPavankumar Nandeshwar  *		first_msdu is set.
5428658abc7SPavankumar Nandeshwar  *
5438658abc7SPavankumar Nandeshwar  * ctrl_type
5448658abc7SPavankumar Nandeshwar  *		Set if packet is a control packet.  Only set when first_msdu
5458658abc7SPavankumar Nandeshwar  *		is set.
5468658abc7SPavankumar Nandeshwar  *
5478658abc7SPavankumar Nandeshwar  * more_data
5488658abc7SPavankumar Nandeshwar  *		Set if more bit in frame control is set.  Only set when
5498658abc7SPavankumar Nandeshwar  *		first_msdu is set.
5508658abc7SPavankumar Nandeshwar  *
5518658abc7SPavankumar Nandeshwar  * eosp
5528658abc7SPavankumar Nandeshwar  *		Set if the EOSP (end of service period) bit in the QoS
5538658abc7SPavankumar Nandeshwar  *		control field is set.  Only set when first_msdu is set.
5548658abc7SPavankumar Nandeshwar  *
5558658abc7SPavankumar Nandeshwar  *
5568658abc7SPavankumar Nandeshwar  * fragment_flag
5578658abc7SPavankumar Nandeshwar  *		Fragment indication
5588658abc7SPavankumar Nandeshwar  *
5598658abc7SPavankumar Nandeshwar  * order
5608658abc7SPavankumar Nandeshwar  *		Set if the order bit in the frame control is set.  Only
5618658abc7SPavankumar Nandeshwar  *		set when first_msdu is set.
5628658abc7SPavankumar Nandeshwar  *
5638658abc7SPavankumar Nandeshwar  * u_apsd_trigger
5648658abc7SPavankumar Nandeshwar  *		U-APSD trigger frame
5658658abc7SPavankumar Nandeshwar  *
5668658abc7SPavankumar Nandeshwar  * encrypt_required
5678658abc7SPavankumar Nandeshwar  *		Indicates that this data type frame is not encrypted even if
5688658abc7SPavankumar Nandeshwar  *		the policy for this MPDU requires encryption as indicated in
5698658abc7SPavankumar Nandeshwar  *		the peer table key type.
5708658abc7SPavankumar Nandeshwar  *
5718658abc7SPavankumar Nandeshwar  * directed
5728658abc7SPavankumar Nandeshwar  *		MPDU is a directed packet which means that the RA matched
5738658abc7SPavankumar Nandeshwar  *		our STA addresses.  In proxySTA it means that the TA matched
5748658abc7SPavankumar Nandeshwar  *		an entry in our address search table with the corresponding
5758658abc7SPavankumar Nandeshwar  *		'no_ack' bit is the address search entry cleared.
5768658abc7SPavankumar Nandeshwar  * amsdu_present
5778658abc7SPavankumar Nandeshwar  *		AMSDU present
5788658abc7SPavankumar Nandeshwar  *
5798658abc7SPavankumar Nandeshwar  * mpdu_frame_control_field
5808658abc7SPavankumar Nandeshwar  *		Frame control field in header. Only valid when the field is marked valid.
5818658abc7SPavankumar Nandeshwar  *
5828658abc7SPavankumar Nandeshwar  * mpdu_duration_field
5838658abc7SPavankumar Nandeshwar  *		Duration field in header. Only valid when the field is marked valid.
5848658abc7SPavankumar Nandeshwar  *
5858658abc7SPavankumar Nandeshwar  * mac_addr_adx
5868658abc7SPavankumar Nandeshwar  *		MAC addresses in the received frame. Only valid when corresponding
5878658abc7SPavankumar Nandeshwar  *		address valid bit is set
5888658abc7SPavankumar Nandeshwar  *
5898658abc7SPavankumar Nandeshwar  * mpdu_qos_control_field, mpdu_ht_control_field
5908658abc7SPavankumar Nandeshwar  *		QoS/HT control fields from header. Valid only when corresponding fields
5918658abc7SPavankumar Nandeshwar  *		are marked valid
5928658abc7SPavankumar Nandeshwar  *
5938658abc7SPavankumar Nandeshwar  * vdev_id
5948658abc7SPavankumar Nandeshwar  *		Virtual device associated with this peer
5958658abc7SPavankumar Nandeshwar  *		RXOLE uses this to determine intra-BSS routing.
5968658abc7SPavankumar Nandeshwar  *
5978658abc7SPavankumar Nandeshwar  * service_code
5988658abc7SPavankumar Nandeshwar  *		Opaque service code between PPE and Wi-Fi
5998658abc7SPavankumar Nandeshwar  *		This field gets passed on by REO to PPE in the EDMA descriptor
6008658abc7SPavankumar Nandeshwar  *		('REO_TO_PPE_RING').
6018658abc7SPavankumar Nandeshwar  *
6028658abc7SPavankumar Nandeshwar  * priority_valid
6038658abc7SPavankumar Nandeshwar  *		This field gets passed on by REO to PPE in the EDMA descriptor
6048658abc7SPavankumar Nandeshwar  *		('REO_TO_PPE_RING').
6058658abc7SPavankumar Nandeshwar  *
6068658abc7SPavankumar Nandeshwar  * src_info
6078658abc7SPavankumar Nandeshwar  *		Source (virtual) device/interface info. associated with
6088658abc7SPavankumar Nandeshwar  *		this peer
6098658abc7SPavankumar Nandeshwar  *		This field gets passed on by REO to PPE in the EDMA descriptor
6108658abc7SPavankumar Nandeshwar  *		('REO_TO_PPE_RING').
6118658abc7SPavankumar Nandeshwar  *
6128658abc7SPavankumar Nandeshwar  * multi_link_addr_ad1_ad2_valid
6138658abc7SPavankumar Nandeshwar  *		If set, Rx OLE shall convert Address1 and Address2 of received
6148658abc7SPavankumar Nandeshwar  *		data frames to multi-link addresses during decapsulation to eth/nwifi
6158658abc7SPavankumar Nandeshwar  *
6168658abc7SPavankumar Nandeshwar  * multi_link_addr_ad1,ad2
6178658abc7SPavankumar Nandeshwar  *		Multi-link receiver address1,2. Only valid when corresponding
6188658abc7SPavankumar Nandeshwar  *		valid bit is set
6198658abc7SPavankumar Nandeshwar  *
6208658abc7SPavankumar Nandeshwar  * authorize_to_send_wds
6218658abc7SPavankumar Nandeshwar  *		If not set, RXDMA shall perform error-routing for WDS packets
6228658abc7SPavankumar Nandeshwar  *		as the sender is not authorized and might misuse WDS frame
6238658abc7SPavankumar Nandeshwar  *		format to inject packets with arbitrary DA/SA.
6248658abc7SPavankumar Nandeshwar  *
6258658abc7SPavankumar Nandeshwar  */
6268658abc7SPavankumar Nandeshwar 
6278658abc7SPavankumar Nandeshwar #define RX_MSDU_END_64_TLV_SRC_LINK_ID		GENMASK(24, 22)
6288658abc7SPavankumar Nandeshwar 
6298658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO0_RXPCU_MPDU_FITLER	GENMASK(1, 0)
6308658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO0_SW_FRAME_GRP_ID	GENMASK(8, 2)
6318658abc7SPavankumar Nandeshwar 
6328658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO1_REPORTED_MPDU_LENGTH	GENMASK(13, 0)
6338658abc7SPavankumar Nandeshwar 
6348658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO2_CCE_SUPER_RULE	GENMASK(13, 8)
6358658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO2_CCND_TRUNCATE		BIT(14)
6368658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO2_CCND_CCE_DIS		BIT(15)
6378658abc7SPavankumar Nandeshwar 
6388658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO3_DA_OFFSET		GENMASK(5, 0)
6398658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO3_SA_OFFSET		GENMASK(11, 6)
6408658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO3_DA_OFFSET_VALID	BIT(12)
6418658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO3_SA_OFFSET_VALID	BIT(13)
6428658abc7SPavankumar Nandeshwar 
6438658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO4_TCP_FLAG		GENMASK(8, 0)
6448658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO4_LRO_ELIGIBLE		BIT(9)
6458658abc7SPavankumar Nandeshwar 
6468658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_SA_IDX_TIMEOUT	BIT(0)
6478658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_DA_IDX_TIMEOUT	BIT(1)
6488658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_TO_DS			BIT(2)
6498658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_TID			GENMASK(6, 3)
6508658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_SA_IS_VALID		BIT(7)
6518658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_DA_IS_VALID		BIT(8)
6528658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_DA_IS_MCBC		BIT(9)
6538658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_L3_HDR_PADDING	GENMASK(11, 10)
6548658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_FIRST_MSDU		BIT(12)
6558658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_LAST_MSDU		BIT(13)
6568658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_FROM_DS		BIT(14)
6578658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO5_IP_CHKSUM_FAIL_COPY	BIT(15)
6588658abc7SPavankumar Nandeshwar 
6598658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO6_MSDU_DROP		BIT(0)
6608658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO6_REO_DEST_IND		GENMASK(5, 1)
6618658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO6_FLOW_IDX		GENMASK(25, 6)
6628658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO6_USE_PPE		BIT(26)
6638658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO6_MESH_STA		GENMASK(28, 27)
6648658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO6_VLAN_CTAG_STRIPPED	BIT(29)
6658658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO6_VLAN_STAG_STRIPPED	BIT(30)
6668658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO6_FRAGMENT_FLAG		BIT(31)
6678658abc7SPavankumar Nandeshwar 
6688658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_AGGR_COUNT		GENMASK(7, 0)
6698658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_FLOW_AGGR_CONTN	BIT(8)
6708658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_FISA_TIMEOUT		BIT(9)
6718658abc7SPavankumar Nandeshwar 
6728658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_TCPUDP_CSUM_FAIL_CPY	BIT(10)
6738658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_MSDU_LIMIT_ERROR	BIT(11)
6748658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_FLOW_IDX_TIMEOUT	BIT(12)
6758658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_FLOW_IDX_INVALID	BIT(13)
6768658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_CCE_MATCH		BIT(14)
6778658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO7_AMSDU_PARSER_ERR	BIT(15)
6788658abc7SPavankumar Nandeshwar 
6798658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO8_KEY_ID		GENMASK(7, 0)
6808658abc7SPavankumar Nandeshwar 
6818658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO9_SERVICE_CODE		GENMASK(14, 6)
6828658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO9_PRIORITY_VALID	BIT(15)
6838658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO9_INRA_BSS		BIT(16)
6848658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO9_DEST_CHIP_ID		GENMASK(18, 17)
6858658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO9_MCAST_ECHO		BIT(19)
6868658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO9_WDS_LEARN_EVENT	BIT(20)
6878658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO9_WDS_ROAM_EVENT	BIT(21)
6888658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO9_WDS_KEEP_ALIVE_EVENT	BIT(22)
6898658abc7SPavankumar Nandeshwar 
6908658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO10_MSDU_LENGTH		GENMASK(13, 0)
6918658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO10_STBC			BIT(14)
6928658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO10_IPSEC_ESP		BIT(15)
6938658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO10_L3_OFFSET		GENMASK(22, 16)
6948658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO10_IPSEC_AH		BIT(23)
6958658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO10_L4_OFFSET		GENMASK(31, 24)
6968658abc7SPavankumar Nandeshwar 
6978658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_MSDU_NUMBER		GENMASK(7, 0)
6988658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_DECAP_FORMAT		GENMASK(9, 8)
6998658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_IPV4			BIT(10)
7008658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_IPV6			BIT(11)
7018658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_TCP			BIT(12)
7028658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_UDP			BIT(13)
7038658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_IP_FRAG		BIT(14)
7048658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_TCP_ONLY_ACK		BIT(15)
7058658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_DA_IS_BCAST_MCAST	BIT(16)
7068658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_SEL_TOEPLITZ_HASH	GENMASK(18, 17)
7078658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_IP_FIXED_HDR_VALID	BIT(19)
7088658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_IP_EXTN_HDR_VALID	BIT(20)
7098658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_IP_TCP_UDP_HDR_VALID	BIT(21)
7108658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_MESH_CTRL_PRESENT	BIT(22)
7118658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_LDPC			BIT(23)
7128658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO11_IP4_IP6_NXT_HDR	GENMASK(31, 24)
7138658abc7SPavankumar Nandeshwar 
7148658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO12_USER_RSSI		GENMASK(7, 0)
7158658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO12_PKT_TYPE		GENMASK(11, 8)
7168658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO12_SGI			GENMASK(13, 12)
7178658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO12_RATE_MCS		GENMASK(17, 14)
7188658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO12_RECV_BW		GENMASK(20, 18)
7198658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO12_RECEPTION_TYPE	GENMASK(23, 21)
7208658abc7SPavankumar Nandeshwar 
7218658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO12_MIMO_SS_BITMAP	GENMASK(30, 24)
7228658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO12_MIMO_DONE_COPY	BIT(31)
7238658abc7SPavankumar Nandeshwar 
7248658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_FIRST_MPDU		BIT(0)
7258658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_MCAST_BCAST		BIT(2)
7268658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_AST_IDX_NOT_FOUND	BIT(3)
7278658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_AST_IDX_TIMEDOUT	BIT(4)
7288658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_POWER_MGMT		BIT(5)
7298658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_NON_QOS		BIT(6)
7308658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_NULL_DATA		BIT(7)
7318658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_MGMT_TYPE		BIT(8)
7328658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_CTRL_TYPE		BIT(9)
7338658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_MORE_DATA		BIT(10)
7348658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_EOSP			BIT(11)
7358658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_A_MSDU_ERROR		BIT(12)
7368658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_ORDER		BIT(14)
7378658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_OVERFLOW_ERR		BIT(16)
7388658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_MSDU_LEN_ERR		BIT(17)
7398658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_TCP_UDP_CKSUM_FAIL	BIT(18)
7408658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_IP_CKSUM_FAIL	BIT(19)
7418658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_SA_IDX_INVALID	BIT(20)
7428658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_DA_IDX_INVALID	BIT(21)
7438658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_AMSDU_ADDR_MISMATCH	BIT(22)
7448658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_RX_IN_TX_DECRYPT_BYP	BIT(23)
7458658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_ENCRYPT_REQUIRED	BIT(24)
7468658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_DIRECTED		BIT(25)
7478658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_BUFFER_FRAGMENT	BIT(26)
7488658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_MPDU_LEN_ERR		BIT(27)
7498658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_TKIP_MIC_ERR		BIT(28)
7508658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_DECRYPT_ERR		BIT(29)
7518658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_UNDECRYPT_FRAME_ERR	BIT(30)
7528658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_FCS_ERR		BIT(31)
7538658abc7SPavankumar Nandeshwar 
7548658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO13_WIFI_PARSER_ERR      BIT(15)
7558658abc7SPavankumar Nandeshwar 
7568658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO14_DECRYPT_STATUS_CODE	GENMASK(12, 10)
7578658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO14_RX_BITMAP_NOT_UPDED	BIT(13)
7588658abc7SPavankumar Nandeshwar #define RX_MSDU_END_INFO14_MSDU_DONE		BIT(31)
7598658abc7SPavankumar Nandeshwar 
7608658abc7SPavankumar Nandeshwar struct rx_msdu_end_qcn9274 {
7618658abc7SPavankumar Nandeshwar 	__le16 info0;
7628658abc7SPavankumar Nandeshwar 	__le16 phy_ppdu_id;
7638658abc7SPavankumar Nandeshwar 	__le16 ip_hdr_cksum;
7648658abc7SPavankumar Nandeshwar 	__le16 info1;
7658658abc7SPavankumar Nandeshwar 	__le16 info2;
7668658abc7SPavankumar Nandeshwar 	__le16 cumulative_l3_checksum;
7678658abc7SPavankumar Nandeshwar 	__le32 rule_indication0;
7688658abc7SPavankumar Nandeshwar 	__le32 ipv6_options_crc;
7698658abc7SPavankumar Nandeshwar 	__le16 info3;
7708658abc7SPavankumar Nandeshwar 	__le16 l3_type;
7718658abc7SPavankumar Nandeshwar 	__le32 rule_indication1;
7728658abc7SPavankumar Nandeshwar 	__le32 tcp_seq_num;
7738658abc7SPavankumar Nandeshwar 	__le32 tcp_ack_num;
7748658abc7SPavankumar Nandeshwar 	__le16 info4;
7758658abc7SPavankumar Nandeshwar 	__le16 window_size;
7768658abc7SPavankumar Nandeshwar 	__le16 sa_sw_peer_id;
7778658abc7SPavankumar Nandeshwar 	__le16 info5;
7788658abc7SPavankumar Nandeshwar 	__le16 sa_idx;
7798658abc7SPavankumar Nandeshwar 	__le16 da_idx_or_sw_peer_id;
7808658abc7SPavankumar Nandeshwar 	__le32 info6;
7818658abc7SPavankumar Nandeshwar 	__le32 fse_metadata;
7828658abc7SPavankumar Nandeshwar 	__le16 cce_metadata;
7838658abc7SPavankumar Nandeshwar 	__le16 tcp_udp_cksum;
7848658abc7SPavankumar Nandeshwar 	__le16 info7;
7858658abc7SPavankumar Nandeshwar 	__le16 cumulative_ip_length;
7868658abc7SPavankumar Nandeshwar 	__le32 info8;
7878658abc7SPavankumar Nandeshwar 	__le32 info9;
7888658abc7SPavankumar Nandeshwar 	__le32 info10;
7898658abc7SPavankumar Nandeshwar 	__le32 info11;
7908658abc7SPavankumar Nandeshwar 	__le16 vlan_ctag_ci;
7918658abc7SPavankumar Nandeshwar 	__le16 vlan_stag_ci;
7928658abc7SPavankumar Nandeshwar 	__le32 peer_meta_data;
7938658abc7SPavankumar Nandeshwar 	__le32 info12;
7948658abc7SPavankumar Nandeshwar 	__le32 flow_id_toeplitz;
7958658abc7SPavankumar Nandeshwar 	__le32 ppdu_start_timestamp_63_32;
7968658abc7SPavankumar Nandeshwar 	__le32 phy_meta_data;
7978658abc7SPavankumar Nandeshwar 	__le32 ppdu_start_timestamp_31_0;
7988658abc7SPavankumar Nandeshwar 	__le32 toeplitz_hash_2_or_4;
7998658abc7SPavankumar Nandeshwar 	__le16 res0;
8008658abc7SPavankumar Nandeshwar 	__le16 sa_15_0;
8018658abc7SPavankumar Nandeshwar 	__le32 sa_47_16;
8028658abc7SPavankumar Nandeshwar 	__le32 info13;
8038658abc7SPavankumar Nandeshwar 	__le32 info14;
8048658abc7SPavankumar Nandeshwar } __packed;
8058658abc7SPavankumar Nandeshwar 
8068658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_MSDU_END_TAG				BIT(0)
8078658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_INFO0_PHY_PPDUID_IP_HDR_CSUM_INFO1	BIT(1)
8088658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_INFO2_CUMULATIVE_CSUM_RULE_IND_0	BIT(2)
8098658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_IPV6_OP_CRC_INFO3_TYPE13		BIT(3)
8108658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_RULE_IND_1_TCP_SEQ_NUM			BIT(4)
8118658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_TCP_ACK_NUM_INFO4_WINDOW_SIZE		BIT(5)
8128658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_SA_SW_PER_ID_INFO5_SA_DA_ID		BIT(6)
8138658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_INFO6_FSE_METADATA			BIT(7)
8148658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_CCE_MDATA_TCP_UDP_CSUM_INFO7_IP_LEN	BIT(8)
8158658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_INFO8_INFO9				BIT(9)
8168658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_INFO10_INFO11				BIT(10)
8178658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_VLAN_CTAG_STAG_CI_PEER_MDATA		BIT(11)
8188658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_INFO12_AND_FLOW_ID_TOEPLITZ		BIT(12)
8198658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_PPDU_START_TS_63_32_PHY_MDATA		BIT(13)
8208658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_PPDU_START_TS_31_0_TOEPLITZ_HASH_2_4	BIT(14)
8218658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_RES0_SA_47_0				BIT(15)
8228658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_SELECT_INFO13_INFO14				BIT(16)
8238658abc7SPavankumar Nandeshwar 
8248658abc7SPavankumar Nandeshwar #define QCN9274_MSDU_END_WMASK (QCN9274_MSDU_END_SELECT_MSDU_END_TAG |	\
8258658abc7SPavankumar Nandeshwar 		QCN9274_MSDU_END_SELECT_SA_SW_PER_ID_INFO5_SA_DA_ID |	\
8268658abc7SPavankumar Nandeshwar 		QCN9274_MSDU_END_SELECT_INFO10_INFO11 |			\
8278658abc7SPavankumar Nandeshwar 		QCN9274_MSDU_END_SELECT_INFO12_AND_FLOW_ID_TOEPLITZ |	\
8288658abc7SPavankumar Nandeshwar 		QCN9274_MSDU_END_SELECT_PPDU_START_TS_63_32_PHY_MDATA |	\
8298658abc7SPavankumar Nandeshwar 		QCN9274_MSDU_END_SELECT_INFO13_INFO14)
8308658abc7SPavankumar Nandeshwar 
8318658abc7SPavankumar Nandeshwar /* The below rx_msdu_end_qcn9274_compact structure is tied with the mask value
8328658abc7SPavankumar Nandeshwar  * QCN9274_MSDU_END_WMASK. If the mask value changes the structure will also
8338658abc7SPavankumar Nandeshwar  * change.
8348658abc7SPavankumar Nandeshwar  */
8358658abc7SPavankumar Nandeshwar 
8368658abc7SPavankumar Nandeshwar struct rx_msdu_end_qcn9274_compact {
8378658abc7SPavankumar Nandeshwar 	__le64 msdu_end_tag;
8388658abc7SPavankumar Nandeshwar 	__le16 sa_sw_peer_id;
8398658abc7SPavankumar Nandeshwar 	__le16 info5;
8408658abc7SPavankumar Nandeshwar 	__le16 sa_idx;
8418658abc7SPavankumar Nandeshwar 	__le16 da_idx_or_sw_peer_id;
8428658abc7SPavankumar Nandeshwar 	__le32 info10;
8438658abc7SPavankumar Nandeshwar 	__le32 info11;
8448658abc7SPavankumar Nandeshwar 	__le32 info12;
8458658abc7SPavankumar Nandeshwar 	__le32 flow_id_toeplitz;
8468658abc7SPavankumar Nandeshwar 	__le32 ppdu_start_timestamp_63_32;
8478658abc7SPavankumar Nandeshwar 	__le32 phy_meta_data;
8488658abc7SPavankumar Nandeshwar 	__le32 info13;
8498658abc7SPavankumar Nandeshwar 	__le32 info14;
8508658abc7SPavankumar Nandeshwar } __packed;
8518658abc7SPavankumar Nandeshwar 
8528658abc7SPavankumar Nandeshwar /* rx_msdu_end
8538658abc7SPavankumar Nandeshwar  *
8548658abc7SPavankumar Nandeshwar  * rxpcu_mpdu_filter_in_category
8558658abc7SPavankumar Nandeshwar  *		Field indicates what the reason was that this mpdu frame
8568658abc7SPavankumar Nandeshwar  *		was allowed to come into the receive path by rxpcu. Values
8578658abc7SPavankumar Nandeshwar  *		are defined in enum %RX_DESC_RXPCU_FILTER_*.
8588658abc7SPavankumar Nandeshwar  *
8598658abc7SPavankumar Nandeshwar  * sw_frame_group_id
8608658abc7SPavankumar Nandeshwar  *		SW processes frames based on certain classifications. Values
8618658abc7SPavankumar Nandeshwar  *		are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*.
8628658abc7SPavankumar Nandeshwar  *
8638658abc7SPavankumar Nandeshwar  * phy_ppdu_id
8648658abc7SPavankumar Nandeshwar  *		A ppdu counter value that PHY increments for every PPDU
8658658abc7SPavankumar Nandeshwar  *		received. The counter value wraps around.
8668658abc7SPavankumar Nandeshwar  *
8678658abc7SPavankumar Nandeshwar  * ip_hdr_cksum
8688658abc7SPavankumar Nandeshwar  *		This can include the IP header checksum or the pseudo
8698658abc7SPavankumar Nandeshwar  *		header checksum used by TCP/UDP checksum.
8708658abc7SPavankumar Nandeshwar  *
8718658abc7SPavankumar Nandeshwar  * reported_mpdu_length
8728658abc7SPavankumar Nandeshwar  *		MPDU length before decapsulation. Only valid when first_msdu is
8738658abc7SPavankumar Nandeshwar  *		set. This field is taken directly from the length field of the
8748658abc7SPavankumar Nandeshwar  *		A-MPDU delimiter or the preamble length field for non-A-MPDU
8758658abc7SPavankumar Nandeshwar  *		frames.
8768658abc7SPavankumar Nandeshwar  *
8778658abc7SPavankumar Nandeshwar  * cce_super_rule
8788658abc7SPavankumar Nandeshwar  *		Indicates the super filter rule.
8798658abc7SPavankumar Nandeshwar  *
8808658abc7SPavankumar Nandeshwar  * cce_classify_not_done_truncate
8818658abc7SPavankumar Nandeshwar  *		Classification failed due to truncated frame.
8828658abc7SPavankumar Nandeshwar  *
8838658abc7SPavankumar Nandeshwar  * cce_classify_not_done_cce_dis
8848658abc7SPavankumar Nandeshwar  *		Classification failed due to CCE global disable
8858658abc7SPavankumar Nandeshwar  *
8868658abc7SPavankumar Nandeshwar  * cumulative_l3_checksum
8878658abc7SPavankumar Nandeshwar  *		FISA: IP header checksum including the total MSDU length
8888658abc7SPavankumar Nandeshwar  *		that is part of this flow aggregated so far, reported if
8898658abc7SPavankumar Nandeshwar  *		'RXOLE_R0_FISA_CTRL. CHKSUM_CUM_IP_LEN_EN' is set
8908658abc7SPavankumar Nandeshwar  *
8918658abc7SPavankumar Nandeshwar  * rule_indication
8928658abc7SPavankumar Nandeshwar  *		Bitmap indicating which of rules have matched.
8938658abc7SPavankumar Nandeshwar  *
8948658abc7SPavankumar Nandeshwar  * ipv6_options_crc
8958658abc7SPavankumar Nandeshwar  *		32 bit CRC computed out of  IP v6 extension headers.
8968658abc7SPavankumar Nandeshwar  *
8978658abc7SPavankumar Nandeshwar  * da_offset
8988658abc7SPavankumar Nandeshwar  *		Offset into MSDU buffer for DA.
8998658abc7SPavankumar Nandeshwar  *
9008658abc7SPavankumar Nandeshwar  * sa_offset
9018658abc7SPavankumar Nandeshwar  *		Offset into MSDU buffer for SA.
9028658abc7SPavankumar Nandeshwar  *
9038658abc7SPavankumar Nandeshwar  * da_offset_valid
9048658abc7SPavankumar Nandeshwar  *		da_offset field is valid. This will be set to 0 in case
9058658abc7SPavankumar Nandeshwar  *		of a dynamic A-MSDU when DA is compressed.
9068658abc7SPavankumar Nandeshwar  *
9078658abc7SPavankumar Nandeshwar  * sa_offset_valid
9088658abc7SPavankumar Nandeshwar  *		sa_offset field is valid. This will be set to 0 in case
9098658abc7SPavankumar Nandeshwar  *		of a dynamic A-MSDU when SA is compressed.
9108658abc7SPavankumar Nandeshwar  *
9118658abc7SPavankumar Nandeshwar  * l3_type
9128658abc7SPavankumar Nandeshwar  *		The 16-bit type value indicating the type of L3 later
9138658abc7SPavankumar Nandeshwar  *		extracted from LLC/SNAP, set to zero if SNAP is not
9148658abc7SPavankumar Nandeshwar  *		available.
9158658abc7SPavankumar Nandeshwar  *
9168658abc7SPavankumar Nandeshwar  * tcp_seq_number
9178658abc7SPavankumar Nandeshwar  *		TCP sequence number.
9188658abc7SPavankumar Nandeshwar  *
9198658abc7SPavankumar Nandeshwar  * tcp_ack_number
9208658abc7SPavankumar Nandeshwar  *		TCP acknowledge number.
9218658abc7SPavankumar Nandeshwar  *
9228658abc7SPavankumar Nandeshwar  * tcp_flag
9238658abc7SPavankumar Nandeshwar  *		TCP flags {NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN}.
9248658abc7SPavankumar Nandeshwar  *
9258658abc7SPavankumar Nandeshwar  * lro_eligible
9268658abc7SPavankumar Nandeshwar  *		Computed out of TCP and IP fields to indicate that this
9278658abc7SPavankumar Nandeshwar  *		MSDU is eligible for LRO.
9288658abc7SPavankumar Nandeshwar  *
9298658abc7SPavankumar Nandeshwar  * window_size
9308658abc7SPavankumar Nandeshwar  *		TCP receive window size.
9318658abc7SPavankumar Nandeshwar  *
9328658abc7SPavankumar Nandeshwar  * sa_sw_peer_id
9338658abc7SPavankumar Nandeshwar  *		sw_peer_id from the address search entry corresponding to the
9348658abc7SPavankumar Nandeshwar  *		source address of the MSDU.
9358658abc7SPavankumar Nandeshwar  *
9368658abc7SPavankumar Nandeshwar  * sa_idx_timeout
9378658abc7SPavankumar Nandeshwar  *		Indicates an unsuccessful MAC source address search due to the
9388658abc7SPavankumar Nandeshwar  *		expiring of the search timer.
9398658abc7SPavankumar Nandeshwar  *
9408658abc7SPavankumar Nandeshwar  * da_idx_timeout
9418658abc7SPavankumar Nandeshwar  *		Indicates an unsuccessful MAC destination address search due to
9428658abc7SPavankumar Nandeshwar  *		the expiring of the search timer.
9438658abc7SPavankumar Nandeshwar  *
9448658abc7SPavankumar Nandeshwar  * to_ds
9458658abc7SPavankumar Nandeshwar  *		Set if the to DS bit is set in the frame control.
9468658abc7SPavankumar Nandeshwar  *
9478658abc7SPavankumar Nandeshwar  * tid
9488658abc7SPavankumar Nandeshwar  *		TID field in the QoS control field
9498658abc7SPavankumar Nandeshwar  *
9508658abc7SPavankumar Nandeshwar  * sa_is_valid
9518658abc7SPavankumar Nandeshwar  *		Indicates that OLE found a valid SA entry.
9528658abc7SPavankumar Nandeshwar  *
9538658abc7SPavankumar Nandeshwar  * da_is_valid
9548658abc7SPavankumar Nandeshwar  *		Indicates that OLE found a valid DA entry.
9558658abc7SPavankumar Nandeshwar  *
9568658abc7SPavankumar Nandeshwar  * da_is_mcbc
9578658abc7SPavankumar Nandeshwar  *		Field Only valid if da_is_valid is set. Indicates the DA address
9588658abc7SPavankumar Nandeshwar  *		was a Multicast of Broadcast address.
9598658abc7SPavankumar Nandeshwar  *
9608658abc7SPavankumar Nandeshwar  * l3_header_padding
9618658abc7SPavankumar Nandeshwar  *		Number of bytes padded  to make sure that the L3 header will
9628658abc7SPavankumar Nandeshwar  *		always start of a Dword boundary.
9638658abc7SPavankumar Nandeshwar  *
9648658abc7SPavankumar Nandeshwar  * first_msdu
9658658abc7SPavankumar Nandeshwar  *		Indicates the first MSDU of A-MSDU. If both first_msdu and
9668658abc7SPavankumar Nandeshwar  *		last_msdu are set in the MSDU then this is a non-aggregated MSDU
9678658abc7SPavankumar Nandeshwar  *		frame: normal MPDU. Interior MSDU in an A-MSDU shall have both
9688658abc7SPavankumar Nandeshwar  *		first_mpdu and last_mpdu bits set to 0.
9698658abc7SPavankumar Nandeshwar  *
9708658abc7SPavankumar Nandeshwar  * last_msdu
9718658abc7SPavankumar Nandeshwar  *		Indicates the last MSDU of the A-MSDU. MPDU end status is only
9728658abc7SPavankumar Nandeshwar  *		valid when last_msdu is set.
9738658abc7SPavankumar Nandeshwar  *
9748658abc7SPavankumar Nandeshwar  * fr_ds
9758658abc7SPavankumar Nandeshwar  *		Set if the from DS bit is set in the frame control.
9768658abc7SPavankumar Nandeshwar  *
9778658abc7SPavankumar Nandeshwar  * ip_chksum_fail_copy
9788658abc7SPavankumar Nandeshwar  *		Indicates that the computed checksum did not match the
9798658abc7SPavankumar Nandeshwar  *		checksum in the IP header.
9808658abc7SPavankumar Nandeshwar  *
9818658abc7SPavankumar Nandeshwar  * sa_idx
9828658abc7SPavankumar Nandeshwar  *		The offset in the address table which matches the MAC source
9838658abc7SPavankumar Nandeshwar  *		address.
9848658abc7SPavankumar Nandeshwar  *
9858658abc7SPavankumar Nandeshwar  * da_idx_or_sw_peer_id
9868658abc7SPavankumar Nandeshwar  *		Based on a register configuration in RXOLE, this field will
9878658abc7SPavankumar Nandeshwar  *		contain:
9888658abc7SPavankumar Nandeshwar  *		The offset in the address table which matches the MAC destination
9898658abc7SPavankumar Nandeshwar  *		address
9908658abc7SPavankumar Nandeshwar  *		OR:
9918658abc7SPavankumar Nandeshwar  *		sw_peer_id from the address search entry corresponding to
9928658abc7SPavankumar Nandeshwar  *		the destination address of the MSDU
9938658abc7SPavankumar Nandeshwar  *
9948658abc7SPavankumar Nandeshwar  * msdu_drop
9958658abc7SPavankumar Nandeshwar  *		REO shall drop this MSDU and not forward it to any other ring.
9968658abc7SPavankumar Nandeshwar  *
9978658abc7SPavankumar Nandeshwar  *		The id of the reo exit ring where the msdu frame shall push
9988658abc7SPavankumar Nandeshwar  *		after (MPDU level) reordering has finished. Values are defined
9998658abc7SPavankumar Nandeshwar  *		in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_.
10008658abc7SPavankumar Nandeshwar  *
10018658abc7SPavankumar Nandeshwar  * flow_idx
10028658abc7SPavankumar Nandeshwar  *		Flow table index.
10038658abc7SPavankumar Nandeshwar  *
10048658abc7SPavankumar Nandeshwar  * use_ppe
10058658abc7SPavankumar Nandeshwar  *		Indicates to RXDMA to ignore the REO_destination_indication
10068658abc7SPavankumar Nandeshwar  *		and use a programmed value corresponding to the REO2PPE
10078658abc7SPavankumar Nandeshwar  *		ring
10088658abc7SPavankumar Nandeshwar  *
10098658abc7SPavankumar Nandeshwar  * mesh_sta
10108658abc7SPavankumar Nandeshwar  *		When set, this is a Mesh (11s) STA.
10118658abc7SPavankumar Nandeshwar  *
10128658abc7SPavankumar Nandeshwar  * vlan_ctag_stripped
10138658abc7SPavankumar Nandeshwar  *		Set by RXOLE if it stripped 4-bytes of C-VLAN Tag from the
10148658abc7SPavankumar Nandeshwar  *		packet
10158658abc7SPavankumar Nandeshwar  *
10168658abc7SPavankumar Nandeshwar  * vlan_stag_stripped
10178658abc7SPavankumar Nandeshwar  *		Set by RXOLE if it stripped 4-bytes of S-VLAN Tag from the
10188658abc7SPavankumar Nandeshwar  *		packet
10198658abc7SPavankumar Nandeshwar  *
10208658abc7SPavankumar Nandeshwar  * fragment_flag
10218658abc7SPavankumar Nandeshwar  *		Indicates that this is an 802.11 fragment frame.  This is
10228658abc7SPavankumar Nandeshwar  *		set when either the more_frag bit is set in the frame control
10238658abc7SPavankumar Nandeshwar  *		or the fragment number is not zero.  Only set when first_msdu
10248658abc7SPavankumar Nandeshwar  *		is set.
10258658abc7SPavankumar Nandeshwar  *
10268658abc7SPavankumar Nandeshwar  * fse_metadata
10278658abc7SPavankumar Nandeshwar  *		FSE related meta data.
10288658abc7SPavankumar Nandeshwar  *
10298658abc7SPavankumar Nandeshwar  * cce_metadata
10308658abc7SPavankumar Nandeshwar  *		CCE related meta data.
10318658abc7SPavankumar Nandeshwar  *
10328658abc7SPavankumar Nandeshwar  * tcp_udp_chksum
10338658abc7SPavankumar Nandeshwar  *		The value of the computed TCP/UDP checksum.  A mode bit
10348658abc7SPavankumar Nandeshwar  *		selects whether this checksum is the full checksum or the
10358658abc7SPavankumar Nandeshwar  *		partial checksum which does not include the pseudo header.
10368658abc7SPavankumar Nandeshwar  *
10378658abc7SPavankumar Nandeshwar  * aggregation_count
10388658abc7SPavankumar Nandeshwar  *		Number of MSDU's aggregated so far
10398658abc7SPavankumar Nandeshwar  *
10408658abc7SPavankumar Nandeshwar  * flow_aggregation_continuation
10418658abc7SPavankumar Nandeshwar  *		To indicate that this MSDU can be aggregated with
10428658abc7SPavankumar Nandeshwar  *		the previous packet with the same flow id
10438658abc7SPavankumar Nandeshwar  *
10448658abc7SPavankumar Nandeshwar  * fisa_timeout
10458658abc7SPavankumar Nandeshwar  *		To indicate that the aggregation has restarted for
10468658abc7SPavankumar Nandeshwar  *		this flow due to timeout
10478658abc7SPavankumar Nandeshwar  *
10488658abc7SPavankumar Nandeshwar  * tcp_udp_chksum_fail
10498658abc7SPavankumar Nandeshwar  *		Indicates that the computed checksum (tcp_udp_chksum) did
10508658abc7SPavankumar Nandeshwar  *		not match the checksum in the TCP/UDP header.
10518658abc7SPavankumar Nandeshwar  *
10528658abc7SPavankumar Nandeshwar  * msdu_limit_error
10538658abc7SPavankumar Nandeshwar  *		Indicates that the MSDU threshold was exceeded and thus all the
10548658abc7SPavankumar Nandeshwar  *		rest of the MSDUs will not be scattered and will not be
10558658abc7SPavankumar Nandeshwar  *		decapsulated but will be DMA'ed in RAW format as a single MSDU.
10568658abc7SPavankumar Nandeshwar  *
10578658abc7SPavankumar Nandeshwar  * flow_idx_timeout
10588658abc7SPavankumar Nandeshwar  *		Indicates an unsuccessful flow search due to the expiring of
10598658abc7SPavankumar Nandeshwar  *		the search timer.
10608658abc7SPavankumar Nandeshwar  *
10618658abc7SPavankumar Nandeshwar  * flow_idx_invalid
10628658abc7SPavankumar Nandeshwar  *		flow id is not valid.
10638658abc7SPavankumar Nandeshwar  *
10648658abc7SPavankumar Nandeshwar  * cce_match
10658658abc7SPavankumar Nandeshwar  *		Indicates that this status has a corresponding MSDU that
10668658abc7SPavankumar Nandeshwar  *		requires FW processing. The OLE will have classification
10678658abc7SPavankumar Nandeshwar  *		ring mask registers which will indicate the ring(s) for
10688658abc7SPavankumar Nandeshwar  *		packets and descriptors which need FW attention.
10698658abc7SPavankumar Nandeshwar  *
10708658abc7SPavankumar Nandeshwar  * amsdu_parser_error
10718658abc7SPavankumar Nandeshwar  *		A-MSDU could not be properly de-agregated.
10728658abc7SPavankumar Nandeshwar  *
10738658abc7SPavankumar Nandeshwar  * cumulative_ip_length
10748658abc7SPavankumar Nandeshwar  *		Total MSDU length that is part of this flow aggregated
10758658abc7SPavankumar Nandeshwar  *		so far
10768658abc7SPavankumar Nandeshwar  *
10778658abc7SPavankumar Nandeshwar  * key_id
10788658abc7SPavankumar Nandeshwar  *		The key ID octet from the IV. Only valid when first_msdu is set.
10798658abc7SPavankumar Nandeshwar  *
10808658abc7SPavankumar Nandeshwar  * service_code
10818658abc7SPavankumar Nandeshwar  *		Opaque service code between PPE and Wi-Fi
10828658abc7SPavankumar Nandeshwar  *
10838658abc7SPavankumar Nandeshwar  * priority_valid
10848658abc7SPavankumar Nandeshwar  *		This field gets passed on by REO to PPE in the EDMA descriptor
10858658abc7SPavankumar Nandeshwar  *
10868658abc7SPavankumar Nandeshwar  * intra_bss
10878658abc7SPavankumar Nandeshwar  *		This packet needs intra-BSS routing by SW as the 'vdev_id'
10888658abc7SPavankumar Nandeshwar  *		for the destination is the same as 'vdev_id' (from 'RX_MPDU_PCU_START')
10898658abc7SPavankumar Nandeshwar  *		that this MSDU was got in.
10908658abc7SPavankumar Nandeshwar  *
10918658abc7SPavankumar Nandeshwar  * dest_chip_id
10928658abc7SPavankumar Nandeshwar  *		If intra_bss is set, copied by RXOLE from 'ADDR_SEARCH_ENTRY'
10938658abc7SPavankumar Nandeshwar  *		to support intra-BSS routing with multi-chip multi-link
10948658abc7SPavankumar Nandeshwar  *		operation. This indicates into which chip's TCL the packet should be
10958658abc7SPavankumar Nandeshwar  *		queueued
10968658abc7SPavankumar Nandeshwar  *
10978658abc7SPavankumar Nandeshwar  * multicast_echo
10988658abc7SPavankumar Nandeshwar  *		If set, this packet is a multicast echo, i.e. the DA is
10998658abc7SPavankumar Nandeshwar  *		multicast and Rx OLE SA search with mcast_echo_check = 1
11008658abc7SPavankumar Nandeshwar  *		passed. RXDMA should release such packets to WBM.
11018658abc7SPavankumar Nandeshwar  *
11028658abc7SPavankumar Nandeshwar  * wds_learning_event
11038658abc7SPavankumar Nandeshwar  *		If set, this packet has an SA search failure with WDS learning
11048658abc7SPavankumar Nandeshwar  *		enabled for the peer. RXOLE should route this TLV to the
11058658abc7SPavankumar Nandeshwar  *		RXDMA0 status ring to notify FW.
11068658abc7SPavankumar Nandeshwar  *
11078658abc7SPavankumar Nandeshwar  * wds_roaming_event
11088658abc7SPavankumar Nandeshwar  *		If set, this packet's SA 'Sw_peer_id' mismatches the 'Sw_peer_id'
11098658abc7SPavankumar Nandeshwar  *		of the peer through which the packet was got, indicating
11108658abc7SPavankumar Nandeshwar  *		the SA node has roamed. RXOLE should route this TLV to
11118658abc7SPavankumar Nandeshwar  *		the RXDMA0 status ring to notify FW.
11128658abc7SPavankumar Nandeshwar  *
11138658abc7SPavankumar Nandeshwar  * wds_keep_alive_event
11148658abc7SPavankumar Nandeshwar  *		If set, the AST timestamp for this packet's SA is older
11158658abc7SPavankumar Nandeshwar  *		than the current timestamp by more than a threshold programmed
11168658abc7SPavankumar Nandeshwar  *		in RXOLE. RXOLE should route this TLV to the RXDMA0 status
11178658abc7SPavankumar Nandeshwar  *		ring to notify FW to keep the AST entry for the SA alive.
11188658abc7SPavankumar Nandeshwar  *
11198658abc7SPavankumar Nandeshwar  * msdu_length
11208658abc7SPavankumar Nandeshwar  *		MSDU length in bytes after decapsulation.
11218658abc7SPavankumar Nandeshwar  *		This field is still valid for MPDU frames without A-MSDU.
11228658abc7SPavankumar Nandeshwar  *		It still represents MSDU length after decapsulation
11238658abc7SPavankumar Nandeshwar  *
11248658abc7SPavankumar Nandeshwar  * stbc
11258658abc7SPavankumar Nandeshwar  *		When set, use STBC transmission rates.
11268658abc7SPavankumar Nandeshwar  *
11278658abc7SPavankumar Nandeshwar  * ipsec_esp
11288658abc7SPavankumar Nandeshwar  *		Set if IPv4/v6 packet is using IPsec ESP.
11298658abc7SPavankumar Nandeshwar  *
11308658abc7SPavankumar Nandeshwar  * l3_offset
11318658abc7SPavankumar Nandeshwar  *		Depending upon mode bit, this field either indicates the
11328658abc7SPavankumar Nandeshwar  *		L3 offset in bytes from the start of the RX_HEADER or the IP
11338658abc7SPavankumar Nandeshwar  *		offset in bytes from the start of the packet after
11348658abc7SPavankumar Nandeshwar  *		decapsulation. The latter is only valid if ipv4_proto or
11358658abc7SPavankumar Nandeshwar  *		ipv6_proto is set.
11368658abc7SPavankumar Nandeshwar  *
11378658abc7SPavankumar Nandeshwar  * ipsec_ah
11388658abc7SPavankumar Nandeshwar  *		Set if IPv4/v6 packet is using IPsec AH
11398658abc7SPavankumar Nandeshwar  *
11408658abc7SPavankumar Nandeshwar  * l4_offset
11418658abc7SPavankumar Nandeshwar  *		Depending upon mode bit, this field either indicates the
11428658abc7SPavankumar Nandeshwar  *		L4 offset in bytes from the start of RX_HEADER (only valid
11438658abc7SPavankumar Nandeshwar  *		if either ipv4_proto or ipv6_proto is set to 1) or indicates
11448658abc7SPavankumar Nandeshwar  *		the offset in bytes to the start of TCP or UDP header from
11458658abc7SPavankumar Nandeshwar  *		the start of the IP header after decapsulation (Only valid if
11468658abc7SPavankumar Nandeshwar  *		tcp_proto or udp_proto is set). The value 0 indicates that
11478658abc7SPavankumar Nandeshwar  *		the offset is longer than 127 bytes.
11488658abc7SPavankumar Nandeshwar  *
11498658abc7SPavankumar Nandeshwar  * msdu_number
11508658abc7SPavankumar Nandeshwar  *		Indicates the MSDU number within a MPDU.  This value is
11518658abc7SPavankumar Nandeshwar  *		reset to zero at the start of each MPDU.  If the number of
11528658abc7SPavankumar Nandeshwar  *		MSDU exceeds 255 this number will wrap using modulo 256.
11538658abc7SPavankumar Nandeshwar  *
11548658abc7SPavankumar Nandeshwar  * decap_type
11558658abc7SPavankumar Nandeshwar  *		Indicates the format after decapsulation. Values are defined in
11568658abc7SPavankumar Nandeshwar  *		enum %MPDU_START_DECAP_TYPE_*.
11578658abc7SPavankumar Nandeshwar  *
11588658abc7SPavankumar Nandeshwar  * ipv4_proto
11598658abc7SPavankumar Nandeshwar  *		Set if L2 layer indicates IPv4 protocol.
11608658abc7SPavankumar Nandeshwar  *
11618658abc7SPavankumar Nandeshwar  * ipv6_proto
11628658abc7SPavankumar Nandeshwar  *		Set if L2 layer indicates IPv6 protocol.
11638658abc7SPavankumar Nandeshwar  *
11648658abc7SPavankumar Nandeshwar  * tcp_proto
11658658abc7SPavankumar Nandeshwar  *		Set if the ipv4_proto or ipv6_proto are set and the IP protocol
11668658abc7SPavankumar Nandeshwar  *		indicates TCP.
11678658abc7SPavankumar Nandeshwar  *
11688658abc7SPavankumar Nandeshwar  * udp_proto
11698658abc7SPavankumar Nandeshwar  *		Set if the ipv4_proto or ipv6_proto are set and the IP protocol
11708658abc7SPavankumar Nandeshwar  *		indicates UDP.
11718658abc7SPavankumar Nandeshwar  *
11728658abc7SPavankumar Nandeshwar  * ip_frag
11738658abc7SPavankumar Nandeshwar  *		Indicates that either the IP More frag bit is set or IP frag
11748658abc7SPavankumar Nandeshwar  *		number is non-zero.  If set indicates that this is a fragmented
11758658abc7SPavankumar Nandeshwar  *		IP packet.
11768658abc7SPavankumar Nandeshwar  *
11778658abc7SPavankumar Nandeshwar  * tcp_only_ack
11788658abc7SPavankumar Nandeshwar  *		Set if only the TCP Ack bit is set in the TCP flags and if
11798658abc7SPavankumar Nandeshwar  *		the TCP payload is 0.
11808658abc7SPavankumar Nandeshwar  *
11818658abc7SPavankumar Nandeshwar  * da_is_bcast_mcast
11828658abc7SPavankumar Nandeshwar  *		The destination address is broadcast or multicast.
11838658abc7SPavankumar Nandeshwar  *
11848658abc7SPavankumar Nandeshwar  * toeplitz_hash
11858658abc7SPavankumar Nandeshwar  *		Actual chosen Hash.
11868658abc7SPavankumar Nandeshwar  *		0 - Toeplitz hash of 2-tuple (IP source address, IP
11878658abc7SPavankumar Nandeshwar  *		    destination address)
11888658abc7SPavankumar Nandeshwar  *		1 - Toeplitz hash of 4-tuple (IP source	address,
11898658abc7SPavankumar Nandeshwar  *		    IP destination address, L4 (TCP/UDP) source port,
11908658abc7SPavankumar Nandeshwar  *		    L4 (TCP/UDP) destination port)
11918658abc7SPavankumar Nandeshwar  *		2 - Toeplitz of flow_id
11928658abc7SPavankumar Nandeshwar  *		3 - Zero is used
11938658abc7SPavankumar Nandeshwar  *
11948658abc7SPavankumar Nandeshwar  * ip_fixed_header_valid
11958658abc7SPavankumar Nandeshwar  *		Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed
11968658abc7SPavankumar Nandeshwar  *		fully within first 256 bytes of the packet
11978658abc7SPavankumar Nandeshwar  *
11988658abc7SPavankumar Nandeshwar  * ip_extn_header_valid
11998658abc7SPavankumar Nandeshwar  *		IPv6/IPv6 header, including IPv4 options and
12008658abc7SPavankumar Nandeshwar  *		recognizable extension headers parsed fully within first 256
12018658abc7SPavankumar Nandeshwar  *		bytes of the packet
12028658abc7SPavankumar Nandeshwar  *
12038658abc7SPavankumar Nandeshwar  * tcp_udp_header_valid
12048658abc7SPavankumar Nandeshwar  *		Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP
12058658abc7SPavankumar Nandeshwar  *		header parsed fully within first 256 bytes of the packet
12068658abc7SPavankumar Nandeshwar  *
12078658abc7SPavankumar Nandeshwar  * mesh_control_present
12088658abc7SPavankumar Nandeshwar  *		When set, this MSDU includes the 'Mesh Control' field
12098658abc7SPavankumar Nandeshwar  *
12108658abc7SPavankumar Nandeshwar  * ldpc
12118658abc7SPavankumar Nandeshwar  *
12128658abc7SPavankumar Nandeshwar  * ip4_protocol_ip6_next_header
12138658abc7SPavankumar Nandeshwar  *		For IPv4, this is the 8 bit protocol field set). For IPv6 this
12148658abc7SPavankumar Nandeshwar  *		is the 8 bit next_header field.
12158658abc7SPavankumar Nandeshwar  *
12168658abc7SPavankumar Nandeshwar  *
12178658abc7SPavankumar Nandeshwar  * vlan_ctag_ci
12188658abc7SPavankumar Nandeshwar  *		2 bytes of C-VLAN Tag Control Information from WHO_L2_LLC
12198658abc7SPavankumar Nandeshwar  *
12208658abc7SPavankumar Nandeshwar  * vlan_stag_ci
12218658abc7SPavankumar Nandeshwar  *		2 bytes of S-VLAN Tag Control Information from WHO_L2_LLC
12228658abc7SPavankumar Nandeshwar  *		in case of double VLAN
12238658abc7SPavankumar Nandeshwar  *
12248658abc7SPavankumar Nandeshwar  * peer_meta_data
12258658abc7SPavankumar Nandeshwar  *		Meta data that SW has programmed in the Peer table entry
12268658abc7SPavankumar Nandeshwar  *		of the transmitting STA.
12278658abc7SPavankumar Nandeshwar  *
12288658abc7SPavankumar Nandeshwar  * user_rssi
12298658abc7SPavankumar Nandeshwar  *		RSSI for this user
12308658abc7SPavankumar Nandeshwar  *
12318658abc7SPavankumar Nandeshwar  * pkt_type
12328658abc7SPavankumar Nandeshwar  *		Values are defined in enum %RX_MSDU_START_PKT_TYPE_*.
12338658abc7SPavankumar Nandeshwar  *
12348658abc7SPavankumar Nandeshwar  * sgi
12358658abc7SPavankumar Nandeshwar  *		Field only valid when pkt type is HT, VHT or HE. Values are
12368658abc7SPavankumar Nandeshwar  *		defined in enum %RX_MSDU_START_SGI_*.
12378658abc7SPavankumar Nandeshwar  *
12388658abc7SPavankumar Nandeshwar  * rate_mcs
12398658abc7SPavankumar Nandeshwar  *		MCS Rate used.
12408658abc7SPavankumar Nandeshwar  *
12418658abc7SPavankumar Nandeshwar  * receive_bandwidth
12428658abc7SPavankumar Nandeshwar  *		Full receive Bandwidth. Values are defined in enum
12438658abc7SPavankumar Nandeshwar  *		%RX_MSDU_START_RECV_*.
12448658abc7SPavankumar Nandeshwar  *
12458658abc7SPavankumar Nandeshwar  * reception_type
12468658abc7SPavankumar Nandeshwar  *		Indicates what type of reception this is and defined in enum
12478658abc7SPavankumar Nandeshwar  *		%RX_MSDU_START_RECEPTION_TYPE_*.
12488658abc7SPavankumar Nandeshwar  *
12498658abc7SPavankumar Nandeshwar  * mimo_ss_bitmap
12508658abc7SPavankumar Nandeshwar  *		Field only valid when
12518658abc7SPavankumar Nandeshwar  *		Reception_type is RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO or
12528658abc7SPavankumar Nandeshwar  *		RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO.
12538658abc7SPavankumar Nandeshwar  *
12548658abc7SPavankumar Nandeshwar  *		Bitmap, with each bit indicating if the related spatial
12558658abc7SPavankumar Nandeshwar  *		stream is used for this STA
12568658abc7SPavankumar Nandeshwar  *
12578658abc7SPavankumar Nandeshwar  *		LSB related to SS 0
12588658abc7SPavankumar Nandeshwar  *
12598658abc7SPavankumar Nandeshwar  *		0 - spatial stream not used for this reception
12608658abc7SPavankumar Nandeshwar  *		1 - spatial stream used for this reception
12618658abc7SPavankumar Nandeshwar  *
12628658abc7SPavankumar Nandeshwar  * msdu_done_copy
12638658abc7SPavankumar Nandeshwar  *		If set indicates that the RX packet data, RX header data,
12648658abc7SPavankumar Nandeshwar  *		RX PPDU start descriptor, RX MPDU start/end descriptor,
12658658abc7SPavankumar Nandeshwar  *		RX MSDU start/end descriptors and RX Attention descriptor
12668658abc7SPavankumar Nandeshwar  *		are all valid.  This bit is in the last 64-bit of the descriptor
12678658abc7SPavankumar Nandeshwar  *		expected to be subscribed in future hardware.
12688658abc7SPavankumar Nandeshwar  *
12698658abc7SPavankumar Nandeshwar  * flow_id_toeplitz
12708658abc7SPavankumar Nandeshwar  *		Toeplitz hash of 5-tuple
12718658abc7SPavankumar Nandeshwar  *		{IP source address, IP destination address, IP source port, IP
12728658abc7SPavankumar Nandeshwar  *		destination port, L4 protocol}  in case of non-IPSec.
12738658abc7SPavankumar Nandeshwar  *
12748658abc7SPavankumar Nandeshwar  *		In case of IPSec - Toeplitz hash of 4-tuple
12758658abc7SPavankumar Nandeshwar  *		{IP source address, IP destination address, SPI, L4 protocol}
12768658abc7SPavankumar Nandeshwar  *
12778658abc7SPavankumar Nandeshwar  *		The relevant Toeplitz key registers are provided in RxOLE's
12788658abc7SPavankumar Nandeshwar  *		instance of common parser module. These registers are separate
12798658abc7SPavankumar Nandeshwar  *		from the Toeplitz keys used by ASE/FSE modules inside RxOLE.
12808658abc7SPavankumar Nandeshwar  *		The actual value will be passed on from common parser module
12818658abc7SPavankumar Nandeshwar  *		to RxOLE in one of the WHO_* TLVs.
12828658abc7SPavankumar Nandeshwar  *
12838658abc7SPavankumar Nandeshwar  * ppdu_start_timestamp
12848658abc7SPavankumar Nandeshwar  *		Timestamp that indicates when the PPDU that contained this MPDU
12858658abc7SPavankumar Nandeshwar  *		started on the medium.
12868658abc7SPavankumar Nandeshwar  *
12878658abc7SPavankumar Nandeshwar  * phy_meta_data
12888658abc7SPavankumar Nandeshwar  *		SW programmed Meta data provided by the PHY. Can be used for SW
12898658abc7SPavankumar Nandeshwar  *		to indicate the channel the device is on.
12908658abc7SPavankumar Nandeshwar  *
12918658abc7SPavankumar Nandeshwar  * toeplitz_hash_2_or_4
12928658abc7SPavankumar Nandeshwar  *		Controlled by multiple RxOLE registers for TCP/UDP over
12938658abc7SPavankumar Nandeshwar  *		IPv4/IPv6 - Either, Toeplitz hash computed over 2-tuple
12948658abc7SPavankumar Nandeshwar  *		IPv4 or IPv6 src/dest addresses is reported; or, Toeplitz
12958658abc7SPavankumar Nandeshwar  *		hash computed over 4-tuple IPv4 or IPv6 src/dest addresses
12968658abc7SPavankumar Nandeshwar  *		and src/dest ports is reported. The Flow_id_toeplitz hash
12978658abc7SPavankumar Nandeshwar  *		can also be reported here. Usually the hash reported here
12988658abc7SPavankumar Nandeshwar  *		is the one used for hash-based REO routing (see use_flow_id_toeplitz_clfy
12998658abc7SPavankumar Nandeshwar  *		in 'RXPT_CLASSIFY_INFO').
13008658abc7SPavankumar Nandeshwar  *
13018658abc7SPavankumar Nandeshwar  * sa
13028658abc7SPavankumar Nandeshwar  *		Source MAC address
13038658abc7SPavankumar Nandeshwar  *
13048658abc7SPavankumar Nandeshwar  * first_mpdu
13058658abc7SPavankumar Nandeshwar  *		Indicates the first MSDU of the PPDU.  If both first_mpdu
13068658abc7SPavankumar Nandeshwar  *		and last_mpdu are set in the MSDU then this is a not an
13078658abc7SPavankumar Nandeshwar  *		A-MPDU frame but a stand alone MPDU.  Interior MPDU in an
13088658abc7SPavankumar Nandeshwar  *		A-MPDU shall have both first_mpdu and last_mpdu bits set to
13098658abc7SPavankumar Nandeshwar  *		0.  The PPDU start status will only be valid when this bit
13108658abc7SPavankumar Nandeshwar  *		is set.
13118658abc7SPavankumar Nandeshwar  *
13128658abc7SPavankumar Nandeshwar  * mcast_bcast
13138658abc7SPavankumar Nandeshwar  *		Multicast / broadcast indicator.  Only set when the MAC
13148658abc7SPavankumar Nandeshwar  *		address 1 bit 0 is set indicating mcast/bcast and the BSSID
13158658abc7SPavankumar Nandeshwar  *		matches one of the 4 BSSID registers. Only set when
13168658abc7SPavankumar Nandeshwar  *		first_msdu is set.
13178658abc7SPavankumar Nandeshwar  *
13188658abc7SPavankumar Nandeshwar  * ast_index_not_found
13198658abc7SPavankumar Nandeshwar  *		Only valid when first_msdu is set. Indicates no AST matching
13208658abc7SPavankumar Nandeshwar  *		entries within the max search count.
13218658abc7SPavankumar Nandeshwar  *
13228658abc7SPavankumar Nandeshwar  * ast_index_timeout
13238658abc7SPavankumar Nandeshwar  *		Only valid when first_msdu is set. Indicates an unsuccessful
13248658abc7SPavankumar Nandeshwar  *		search in the address search table due to timeout.
13258658abc7SPavankumar Nandeshwar  *
13268658abc7SPavankumar Nandeshwar  * power_mgmt
13278658abc7SPavankumar Nandeshwar  *		Power management bit set in the 802.11 header.  Only set
13288658abc7SPavankumar Nandeshwar  *		when first_msdu is set.
13298658abc7SPavankumar Nandeshwar  *
13308658abc7SPavankumar Nandeshwar  * non_qos
13318658abc7SPavankumar Nandeshwar  *		Set if packet is not a non-QoS data frame.  Only set when
13328658abc7SPavankumar Nandeshwar  *		first_msdu is set.
13338658abc7SPavankumar Nandeshwar  *
13348658abc7SPavankumar Nandeshwar  * null_data
13358658abc7SPavankumar Nandeshwar  *		Set if frame type indicates either null data or QoS null
13368658abc7SPavankumar Nandeshwar  *		data format.  Only set when first_msdu is set.
13378658abc7SPavankumar Nandeshwar  *
13388658abc7SPavankumar Nandeshwar  * mgmt_type
13398658abc7SPavankumar Nandeshwar  *		Set if packet is a management packet.  Only set when
13408658abc7SPavankumar Nandeshwar  *		first_msdu is set.
13418658abc7SPavankumar Nandeshwar  *
13428658abc7SPavankumar Nandeshwar  * ctrl_type
13438658abc7SPavankumar Nandeshwar  *		Set if packet is a control packet.  Only set when first_msdu
13448658abc7SPavankumar Nandeshwar  *		is set.
13458658abc7SPavankumar Nandeshwar  *
13468658abc7SPavankumar Nandeshwar  * more_data
13478658abc7SPavankumar Nandeshwar  *		Set if more bit in frame control is set.  Only set when
13488658abc7SPavankumar Nandeshwar  *		first_msdu is set.
13498658abc7SPavankumar Nandeshwar  *
13508658abc7SPavankumar Nandeshwar  * eosp
13518658abc7SPavankumar Nandeshwar  *		Set if the EOSP (end of service period) bit in the QoS
13528658abc7SPavankumar Nandeshwar  *		control field is set.  Only set when first_msdu is set.
13538658abc7SPavankumar Nandeshwar  *
13548658abc7SPavankumar Nandeshwar  * a_msdu_error
13558658abc7SPavankumar Nandeshwar  *		Set if number of MSDUs in A-MSDU is above a threshold or if the
13568658abc7SPavankumar Nandeshwar  *		size of the MSDU is invalid. This receive buffer will contain
13578658abc7SPavankumar Nandeshwar  *		all of the remainder of MSDUs in this MPDU w/o decapsulation.
13588658abc7SPavankumar Nandeshwar  *
13598658abc7SPavankumar Nandeshwar  * order
13608658abc7SPavankumar Nandeshwar  *		Set if the order bit in the frame control is set.  Only
13618658abc7SPavankumar Nandeshwar  *		set when first_msdu is set.
13628658abc7SPavankumar Nandeshwar  *
13638658abc7SPavankumar Nandeshwar  * wifi_parser_error
13648658abc7SPavankumar Nandeshwar  *		Indicates that the WiFi frame has one of the following errors
13658658abc7SPavankumar Nandeshwar  *
13668658abc7SPavankumar Nandeshwar  * overflow_err
13678658abc7SPavankumar Nandeshwar  *		RXPCU Receive FIFO ran out of space to receive the full MPDU.
13688658abc7SPavankumar Nandeshwar  *		Therefore this MPDU is terminated early and is thus corrupted.
13698658abc7SPavankumar Nandeshwar  *
13708658abc7SPavankumar Nandeshwar  *		This MPDU will not be ACKed.
13718658abc7SPavankumar Nandeshwar  *
13728658abc7SPavankumar Nandeshwar  *		RXPCU might still be able to correctly receive the following
13738658abc7SPavankumar Nandeshwar  *		MPDUs in the PPDU if enough fifo space became available in time.
13748658abc7SPavankumar Nandeshwar  *
13758658abc7SPavankumar Nandeshwar  * mpdu_length_err
13768658abc7SPavankumar Nandeshwar  *		Set by RXPCU if the expected MPDU length does not correspond
13778658abc7SPavankumar Nandeshwar  *		with the actually received number of bytes in the MPDU.
13788658abc7SPavankumar Nandeshwar  *
13798658abc7SPavankumar Nandeshwar  * tcp_udp_chksum_fail
13808658abc7SPavankumar Nandeshwar  *		Indicates that the computed checksum (tcp_udp_chksum) did
13818658abc7SPavankumar Nandeshwar  *		not match the checksum in the TCP/UDP header.
13828658abc7SPavankumar Nandeshwar  *
13838658abc7SPavankumar Nandeshwar  * ip_chksum_fail
13848658abc7SPavankumar Nandeshwar  *		Indicates that the computed checksum did not match the
13858658abc7SPavankumar Nandeshwar  *		checksum in the IP header.
13868658abc7SPavankumar Nandeshwar  *
13878658abc7SPavankumar Nandeshwar  * sa_idx_invalid
13888658abc7SPavankumar Nandeshwar  *		Indicates no matching entry was found in the address search
13898658abc7SPavankumar Nandeshwar  *		table for the source MAC address.
13908658abc7SPavankumar Nandeshwar  *
13918658abc7SPavankumar Nandeshwar  * da_idx_invalid
13928658abc7SPavankumar Nandeshwar  *		Indicates no matching entry was found in the address search
13938658abc7SPavankumar Nandeshwar  *		table for the destination MAC address.
13948658abc7SPavankumar Nandeshwar  *
13958658abc7SPavankumar Nandeshwar  * amsdu_addr_mismatch
13968658abc7SPavankumar Nandeshwar  *		Indicates that an A-MSDU with 'from DS = 0' had an SA mismatching
13978658abc7SPavankumar Nandeshwar  *		TA or an A-MDU with 'to DS = 0' had a DA mismatching RA
13988658abc7SPavankumar Nandeshwar  *
13998658abc7SPavankumar Nandeshwar  * rx_in_tx_decrypt_byp
14008658abc7SPavankumar Nandeshwar  *		Indicates that RX packet is not decrypted as Crypto is busy
14018658abc7SPavankumar Nandeshwar  *		with TX packet processing.
14028658abc7SPavankumar Nandeshwar  *
14038658abc7SPavankumar Nandeshwar  * encrypt_required
14048658abc7SPavankumar Nandeshwar  *		Indicates that this data type frame is not encrypted even if
14058658abc7SPavankumar Nandeshwar  *		the policy for this MPDU requires encryption as indicated in
14068658abc7SPavankumar Nandeshwar  *		the peer table key type.
14078658abc7SPavankumar Nandeshwar  *
14088658abc7SPavankumar Nandeshwar  * directed
14098658abc7SPavankumar Nandeshwar  *		MPDU is a directed packet which means that the RA matched
14108658abc7SPavankumar Nandeshwar  *		our STA addresses.  In proxySTA it means that the TA matched
14118658abc7SPavankumar Nandeshwar  *		an entry in our address search table with the corresponding
14128658abc7SPavankumar Nandeshwar  *		'no_ack' bit is the address search entry cleared.
14138658abc7SPavankumar Nandeshwar  *
14148658abc7SPavankumar Nandeshwar  * buffer_fragment
14158658abc7SPavankumar Nandeshwar  *		Indicates that at least one of the rx buffers has been
14168658abc7SPavankumar Nandeshwar  *		fragmented.  If set the FW should look at the rx_frag_info
14178658abc7SPavankumar Nandeshwar  *		descriptor described below.
14188658abc7SPavankumar Nandeshwar  *
14198658abc7SPavankumar Nandeshwar  * mpdu_length_err
14208658abc7SPavankumar Nandeshwar  *		Indicates that the MPDU was pre-maturely terminated
14218658abc7SPavankumar Nandeshwar  *		resulting in a truncated MPDU.  Don't trust the MPDU length
14228658abc7SPavankumar Nandeshwar  *		field.
14238658abc7SPavankumar Nandeshwar  *
14248658abc7SPavankumar Nandeshwar  * tkip_mic_err
14258658abc7SPavankumar Nandeshwar  *		Indicates that the MPDU Michael integrity check failed
14268658abc7SPavankumar Nandeshwar  *
14278658abc7SPavankumar Nandeshwar  * decrypt_err
14288658abc7SPavankumar Nandeshwar  *		Indicates that the MPDU decrypt integrity check failed
14298658abc7SPavankumar Nandeshwar  *
14308658abc7SPavankumar Nandeshwar  * fcs_err
14318658abc7SPavankumar Nandeshwar  *		Indicates that the MPDU FCS check failed
14328658abc7SPavankumar Nandeshwar  *
14338658abc7SPavankumar Nandeshwar  * flow_idx_timeout
14348658abc7SPavankumar Nandeshwar  *		Indicates an unsuccessful flow search due to the expiring of
14358658abc7SPavankumar Nandeshwar  *		the search timer.
14368658abc7SPavankumar Nandeshwar  *
14378658abc7SPavankumar Nandeshwar  * flow_idx_invalid
14388658abc7SPavankumar Nandeshwar  *		flow id is not valid.
14398658abc7SPavankumar Nandeshwar  *
14408658abc7SPavankumar Nandeshwar  * decrypt_status_code
14418658abc7SPavankumar Nandeshwar  *		Field provides insight into the decryption performed. Values
14428658abc7SPavankumar Nandeshwar  *		are defined in enum %RX_DESC_DECRYPT_STATUS_CODE_*.
14438658abc7SPavankumar Nandeshwar  *
14448658abc7SPavankumar Nandeshwar  * rx_bitmap_not_updated
14458658abc7SPavankumar Nandeshwar  *		Frame is received, but RXPCU could not update the receive bitmap
14468658abc7SPavankumar Nandeshwar  *		due to (temporary) fifo constraints.
14478658abc7SPavankumar Nandeshwar  *
14488658abc7SPavankumar Nandeshwar  * msdu_done
14498658abc7SPavankumar Nandeshwar  *		If set indicates that the RX packet data, RX header data, RX
14508658abc7SPavankumar Nandeshwar  *		PPDU start descriptor, RX MPDU start/end descriptor, RX MSDU
14518658abc7SPavankumar Nandeshwar  *		start/end descriptors and RX Attention descriptor are all
14528658abc7SPavankumar Nandeshwar  *		valid.  This bit must be in the last octet of the
14538658abc7SPavankumar Nandeshwar  *		descriptor.
14548658abc7SPavankumar Nandeshwar  *
14558658abc7SPavankumar Nandeshwar  */
14568658abc7SPavankumar Nandeshwar 
14578658abc7SPavankumar Nandeshwar struct hal_rx_desc_qcn9274_compact {
14588658abc7SPavankumar Nandeshwar 	struct rx_msdu_end_qcn9274_compact msdu_end;
14598658abc7SPavankumar Nandeshwar 	struct rx_mpdu_start_qcn9274_compact mpdu_start;
14608658abc7SPavankumar Nandeshwar 	u8 msdu_payload[];
14618658abc7SPavankumar Nandeshwar } __packed;
14628658abc7SPavankumar Nandeshwar 
14638658abc7SPavankumar Nandeshwar #define RX_BE_PADDING0_BYTES 8
14648658abc7SPavankumar Nandeshwar #define RX_BE_PADDING1_BYTES 8
14658658abc7SPavankumar Nandeshwar 
14668658abc7SPavankumar Nandeshwar #define HAL_RX_BE_PKT_HDR_TLV_LEN		112
14678658abc7SPavankumar Nandeshwar 
14688658abc7SPavankumar Nandeshwar struct rx_pkt_hdr_tlv {
14698658abc7SPavankumar Nandeshwar 	__le64 tag;
14708658abc7SPavankumar Nandeshwar 	__le64 phy_ppdu_id;
14718658abc7SPavankumar Nandeshwar 	u8 rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN];
14728658abc7SPavankumar Nandeshwar };
14738658abc7SPavankumar Nandeshwar 
14748658abc7SPavankumar Nandeshwar struct hal_rx_desc_wcn7850 {
14758658abc7SPavankumar Nandeshwar 	__le64 msdu_end_tag;
14768658abc7SPavankumar Nandeshwar 	struct rx_msdu_end_qcn9274 msdu_end;
14778658abc7SPavankumar Nandeshwar 	u8 rx_padding0[RX_BE_PADDING0_BYTES];
14788658abc7SPavankumar Nandeshwar 	__le64 mpdu_start_tag;
14798658abc7SPavankumar Nandeshwar 	struct rx_mpdu_start_qcn9274 mpdu_start;
14808658abc7SPavankumar Nandeshwar 	struct rx_pkt_hdr_tlv	 pkt_hdr_tlv;
14818658abc7SPavankumar Nandeshwar 	u8 msdu_payload[];
14828658abc7SPavankumar Nandeshwar };
14838658abc7SPavankumar Nandeshwar 
1484*28badc78SBaochen Qiang struct rx_pkt_hdr_tlv_qcc2072 {
1485*28badc78SBaochen Qiang 	__le32 tag;
1486*28badc78SBaochen Qiang 	__le64 phy_ppdu_id;
1487*28badc78SBaochen Qiang 	u8 rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN];
1488*28badc78SBaochen Qiang };
1489*28badc78SBaochen Qiang 
1490*28badc78SBaochen Qiang struct hal_rx_desc_qcc2072 {
1491*28badc78SBaochen Qiang 	__le32 msdu_end_tag;
1492*28badc78SBaochen Qiang 	struct rx_msdu_end_qcn9274 msdu_end;
1493*28badc78SBaochen Qiang 	u8 rx_padding0[RX_BE_PADDING0_BYTES];
1494*28badc78SBaochen Qiang 	__le32 mpdu_start_tag;
1495*28badc78SBaochen Qiang 	struct rx_mpdu_start_qcn9274 mpdu_start;
1496*28badc78SBaochen Qiang 	struct rx_pkt_hdr_tlv_qcc2072 pkt_hdr_tlv;
1497*28badc78SBaochen Qiang 	u8 msdu_payload[];
1498*28badc78SBaochen Qiang };
1499*28badc78SBaochen Qiang 
15008658abc7SPavankumar Nandeshwar struct hal_rx_desc {
15018658abc7SPavankumar Nandeshwar 	union {
15028658abc7SPavankumar Nandeshwar 		struct hal_rx_desc_qcn9274_compact qcn9274_compact;
15038658abc7SPavankumar Nandeshwar 		struct hal_rx_desc_wcn7850 wcn7850;
1504*28badc78SBaochen Qiang 		struct hal_rx_desc_qcc2072 qcc2072;
15058658abc7SPavankumar Nandeshwar 	} u;
15068658abc7SPavankumar Nandeshwar } __packed;
15078658abc7SPavankumar Nandeshwar 
15088658abc7SPavankumar Nandeshwar #endif /* ATH12K_RX_DESC_H */
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