1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 5 */ 6 #ifndef ATH12K_RX_DESC_H 7 #define ATH12K_RX_DESC_H 8 9 enum rx_desc_decrypt_status_code { 10 RX_DESC_DECRYPT_STATUS_CODE_OK, 11 RX_DESC_DECRYPT_STATUS_CODE_UNPROTECTED_FRAME, 12 RX_DESC_DECRYPT_STATUS_CODE_DATA_ERR, 13 RX_DESC_DECRYPT_STATUS_CODE_KEY_INVALID, 14 RX_DESC_DECRYPT_STATUS_CODE_PEER_ENTRY_INVALID, 15 RX_DESC_DECRYPT_STATUS_CODE_OTHER, 16 }; 17 18 #define RX_MPDU_START_INFO0_REO_DEST_IND GENMASK(4, 0) 19 #define RX_MPDU_START_INFO0_LMAC_PEER_ID_MSB GENMASK(6, 5) 20 #define RX_MPDU_START_INFO0_FLOW_ID_TOEPLITZ BIT(7) 21 #define RX_MPDU_START_INFO0_PKT_SEL_FP_UCAST_DATA BIT(8) 22 #define RX_MPDU_START_INFO0_PKT_SEL_FP_MCAST_DATA BIT(9) 23 #define RX_MPDU_START_INFO0_PKT_SEL_FP_CTRL_BAR BIT(10) 24 #define RX_MPDU_START_INFO0_RXDMA0_SRC_RING_SEL GENMASK(13, 11) 25 #define RX_MPDU_START_INFO0_RXDMA0_DST_RING_SEL GENMASK(16, 14) 26 #define RX_MPDU_START_INFO0_MCAST_ECHO_DROP_EN BIT(17) 27 #define RX_MPDU_START_INFO0_WDS_LEARN_DETECT_EN BIT(18) 28 #define RX_MPDU_START_INFO0_INTRA_BSS_CHECK_EN BIT(19) 29 #define RX_MPDU_START_INFO0_USE_PPE BIT(20) 30 #define RX_MPDU_START_INFO0_PPE_ROUTING_EN BIT(21) 31 32 #define RX_MPDU_START_INFO1_REO_QUEUE_DESC_HI GENMASK(7, 0) 33 #define RX_MPDU_START_INFO1_RECV_QUEUE_NUM GENMASK(23, 8) 34 #define RX_MPDU_START_INFO1_PRE_DELIM_ERR_WARN BIT(24) 35 #define RX_MPDU_START_INFO1_FIRST_DELIM_ERR BIT(25) 36 37 #define RX_MPDU_START_INFO2_EPD_EN BIT(0) 38 #define RX_MPDU_START_INFO2_ALL_FRAME_ENCPD BIT(1) 39 #define RX_MPDU_START_INFO2_ENC_TYPE GENMASK(5, 2) 40 #define RX_MPDU_START_INFO2_VAR_WEP_KEY_WIDTH GENMASK(7, 6) 41 #define RX_MPDU_START_INFO2_MESH_STA GENMASK(9, 8) 42 #define RX_MPDU_START_INFO2_BSSID_HIT BIT(10) 43 #define RX_MPDU_START_INFO2_BSSID_NUM GENMASK(14, 11) 44 #define RX_MPDU_START_INFO2_TID GENMASK(18, 15) 45 46 #define RX_MPDU_START_INFO3_RXPCU_MPDU_FLTR GENMASK(1, 0) 47 #define RX_MPDU_START_INFO3_SW_FRAME_GRP_ID GENMASK(8, 2) 48 #define RX_MPDU_START_INFO3_NDP_FRAME BIT(9) 49 #define RX_MPDU_START_INFO3_PHY_ERR BIT(10) 50 #define RX_MPDU_START_INFO3_PHY_ERR_MPDU_HDR BIT(11) 51 #define RX_MPDU_START_INFO3_PROTO_VER_ERR BIT(12) 52 #define RX_MPDU_START_INFO3_AST_LOOKUP_VALID BIT(13) 53 #define RX_MPDU_START_INFO3_RANGING BIT(14) 54 55 #define RX_MPDU_START_INFO4_MPDU_FCTRL_VALID BIT(0) 56 #define RX_MPDU_START_INFO4_MPDU_DUR_VALID BIT(1) 57 #define RX_MPDU_START_INFO4_MAC_ADDR1_VALID BIT(2) 58 #define RX_MPDU_START_INFO4_MAC_ADDR2_VALID BIT(3) 59 #define RX_MPDU_START_INFO4_MAC_ADDR3_VALID BIT(4) 60 #define RX_MPDU_START_INFO4_MAC_ADDR4_VALID BIT(5) 61 #define RX_MPDU_START_INFO4_MPDU_SEQ_CTRL_VALID BIT(6) 62 #define RX_MPDU_START_INFO4_MPDU_QOS_CTRL_VALID BIT(7) 63 #define RX_MPDU_START_INFO4_MPDU_HT_CTRL_VALID BIT(8) 64 #define RX_MPDU_START_INFO4_ENCRYPT_INFO_VALID BIT(9) 65 #define RX_MPDU_START_INFO4_MPDU_FRAG_NUMBER GENMASK(13, 10) 66 #define RX_MPDU_START_INFO4_MORE_FRAG_FLAG BIT(14) 67 #define RX_MPDU_START_INFO4_FROM_DS BIT(16) 68 #define RX_MPDU_START_INFO4_TO_DS BIT(17) 69 #define RX_MPDU_START_INFO4_ENCRYPTED BIT(18) 70 #define RX_MPDU_START_INFO4_MPDU_RETRY BIT(19) 71 #define RX_MPDU_START_INFO4_MPDU_SEQ_NUM GENMASK(31, 20) 72 73 #define RX_MPDU_START_INFO5_KEY_ID GENMASK(7, 0) 74 #define RX_MPDU_START_INFO5_NEW_PEER_ENTRY BIT(8) 75 #define RX_MPDU_START_INFO5_DECRYPT_NEEDED BIT(9) 76 #define RX_MPDU_START_INFO5_DECAP_TYPE GENMASK(11, 10) 77 #define RX_MPDU_START_INFO5_VLAN_TAG_C_PADDING BIT(12) 78 #define RX_MPDU_START_INFO5_VLAN_TAG_S_PADDING BIT(13) 79 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_C BIT(14) 80 #define RX_MPDU_START_INFO5_STRIP_VLAN_TAG_S BIT(15) 81 #define RX_MPDU_START_INFO5_PRE_DELIM_COUNT GENMASK(27, 16) 82 #define RX_MPDU_START_INFO5_AMPDU_FLAG BIT(28) 83 #define RX_MPDU_START_INFO5_BAR_FRAME BIT(29) 84 #define RX_MPDU_START_INFO5_RAW_MPDU BIT(30) 85 86 #define RX_MPDU_START_INFO6_MPDU_LEN GENMASK(13, 0) 87 #define RX_MPDU_START_INFO6_FIRST_MPDU BIT(14) 88 #define RX_MPDU_START_INFO6_MCAST_BCAST BIT(15) 89 #define RX_MPDU_START_INFO6_AST_IDX_NOT_FOUND BIT(16) 90 #define RX_MPDU_START_INFO6_AST_IDX_TIMEOUT BIT(17) 91 #define RX_MPDU_START_INFO6_POWER_MGMT BIT(18) 92 #define RX_MPDU_START_INFO6_NON_QOS BIT(19) 93 #define RX_MPDU_START_INFO6_NULL_DATA BIT(20) 94 #define RX_MPDU_START_INFO6_MGMT_TYPE BIT(21) 95 #define RX_MPDU_START_INFO6_CTRL_TYPE BIT(22) 96 #define RX_MPDU_START_INFO6_MORE_DATA BIT(23) 97 #define RX_MPDU_START_INFO6_EOSP BIT(24) 98 #define RX_MPDU_START_INFO6_FRAGMENT BIT(25) 99 #define RX_MPDU_START_INFO6_ORDER BIT(26) 100 #define RX_MPDU_START_INFO6_UAPSD_TRIGGER BIT(27) 101 #define RX_MPDU_START_INFO6_ENCRYPT_REQUIRED BIT(28) 102 #define RX_MPDU_START_INFO6_DIRECTED BIT(29) 103 #define RX_MPDU_START_INFO6_AMSDU_PRESENT BIT(30) 104 105 #define RX_MPDU_START_INFO7_VDEV_ID GENMASK(7, 0) 106 #define RX_MPDU_START_INFO7_SERVICE_CODE GENMASK(16, 8) 107 #define RX_MPDU_START_INFO7_PRIORITY_VALID BIT(17) 108 #define RX_MPDU_START_INFO7_SRC_INFO GENMASK(29, 18) 109 110 #define RX_MPDU_START_INFO8_AUTH_TO_SEND_WDS BIT(0) 111 112 struct rx_mpdu_start_qcn9274 { 113 __le32 info0; 114 __le32 reo_queue_desc_lo; 115 __le32 info1; 116 __le32 pn[4]; 117 __le32 info2; 118 __le32 peer_meta_data; 119 __le16 info3; 120 __le16 phy_ppdu_id; 121 __le16 ast_index; 122 __le16 sw_peer_id; 123 __le32 info4; 124 __le32 info5; 125 __le32 info6; 126 __le16 frame_ctrl; 127 __le16 duration; 128 u8 addr1[ETH_ALEN]; 129 u8 addr2[ETH_ALEN]; 130 u8 addr3[ETH_ALEN]; 131 __le16 seq_ctrl; 132 u8 addr4[ETH_ALEN]; 133 __le16 qos_ctrl; 134 __le32 ht_ctrl; 135 __le32 info7; 136 u8 multi_link_addr1[ETH_ALEN]; 137 u8 multi_link_addr2[ETH_ALEN]; 138 __le32 info8; 139 __le32 res0; 140 __le32 res1; 141 } __packed; 142 143 #define QCN9274_MPDU_START_SELECT_MPDU_START_TAG BIT(0) 144 #define QCN9274_MPDU_START_SELECT_INFO0_REO_QUEUE_DESC_LO BIT(1) 145 #define QCN9274_MPDU_START_SELECT_INFO1_PN_31_0 BIT(2) 146 #define QCN9274_MPDU_START_SELECT_PN_95_32 BIT(3) 147 #define QCN9274_MPDU_START_SELECT_PN_127_96_INFO2 BIT(4) 148 #define QCN9274_MPDU_START_SELECT_PEER_MDATA_INFO3_PHY_PPDU_ID BIT(5) 149 #define QCN9274_MPDU_START_SELECT_AST_IDX_SW_PEER_ID_INFO4 BIT(6) 150 #define QCN9274_MPDU_START_SELECT_INFO5_INFO6 BIT(7) 151 #define QCN9274_MPDU_START_SELECT_FRAME_CTRL_DURATION_ADDR1_31_0 BIT(8) 152 #define QCN9274_MPDU_START_SELECT_ADDR2_47_0_ADDR1_47_32 BIT(9) 153 #define QCN9274_MPDU_START_SELECT_ADDR3_47_0_SEQ_CTRL BIT(10) 154 #define QCN9274_MPDU_START_SELECT_ADDR4_47_0_QOS_CTRL BIT(11) 155 #define QCN9274_MPDU_START_SELECT_HT_CTRL_INFO7 BIT(12) 156 #define QCN9274_MPDU_START_SELECT_ML_ADDR1_47_0_ML_ADDR2_15_0 BIT(13) 157 #define QCN9274_MPDU_START_SELECT_ML_ADDR2_47_16_INFO8 BIT(14) 158 #define QCN9274_MPDU_START_SELECT_RES_0_RES_1 BIT(15) 159 160 #define QCN9274_MPDU_START_WMASK (QCN9274_MPDU_START_SELECT_INFO1_PN_31_0 | \ 161 QCN9274_MPDU_START_SELECT_PN_95_32 | \ 162 QCN9274_MPDU_START_SELECT_PN_127_96_INFO2 | \ 163 QCN9274_MPDU_START_SELECT_PEER_MDATA_INFO3_PHY_PPDU_ID | \ 164 QCN9274_MPDU_START_SELECT_AST_IDX_SW_PEER_ID_INFO4 | \ 165 QCN9274_MPDU_START_SELECT_INFO5_INFO6 | \ 166 QCN9274_MPDU_START_SELECT_FRAME_CTRL_DURATION_ADDR1_31_0 | \ 167 QCN9274_MPDU_START_SELECT_ADDR2_47_0_ADDR1_47_32 | \ 168 QCN9274_MPDU_START_SELECT_ADDR3_47_0_SEQ_CTRL | \ 169 QCN9274_MPDU_START_SELECT_ADDR4_47_0_QOS_CTRL) 170 171 /* The below rx_mpdu_start_qcn9274_compact structure is tied with the mask 172 * value QCN9274_MPDU_START_WMASK. If the mask value changes the structure 173 * will also change. 174 */ 175 176 struct rx_mpdu_start_qcn9274_compact { 177 __le32 info1; 178 __le32 pn[4]; 179 __le32 info2; 180 __le32 peer_meta_data; 181 __le16 info3; 182 __le16 phy_ppdu_id; 183 __le16 ast_index; 184 __le16 sw_peer_id; 185 __le32 info4; 186 __le32 info5; 187 __le32 info6; 188 __le16 frame_ctrl; 189 __le16 duration; 190 u8 addr1[ETH_ALEN]; 191 u8 addr2[ETH_ALEN]; 192 u8 addr3[ETH_ALEN]; 193 __le16 seq_ctrl; 194 u8 addr4[ETH_ALEN]; 195 __le16 qos_ctrl; 196 } __packed; 197 198 /* rx_mpdu_start 199 * 200 * reo_destination_indication 201 * The id of the reo exit ring where the msdu frame shall push 202 * after (MPDU level) reordering has finished. Values are defined 203 * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_. 204 * 205 * lmac_peer_id_msb 206 * 207 * If use_flow_id_toeplitz_clfy is set and lmac_peer_id_'sb 208 * is 2'b00, Rx OLE uses a REO destination indicati'n of {1'b1, 209 * hash[3:0]} using the chosen Toeplitz hash from Common Parser 210 * if flow search fails. 211 * If use_flow_id_toeplitz_clfy is set and lmac_peer_id_msb 212 * 's not 2'b00, Rx OLE uses a REO destination indication of 213 * {lmac_peer_id_msb, hash[2:0]} using the chosen Toeplitz 214 * hash from Common Parser if flow search fails. 215 * 216 * use_flow_id_toeplitz_clfy 217 * Indication to Rx OLE to enable REO destination routing based 218 * on the chosen Toeplitz hash from Common Parser, in case 219 * flow search fails 220 * 221 * pkt_selection_fp_ucast_data 222 * Filter pass Unicast data frame (matching rxpcu_filter_pass 223 * and sw_frame_group_Unicast_data) routing selection 224 * 225 * pkt_selection_fp_mcast_data 226 * Filter pass Multicast data frame (matching rxpcu_filter_pass 227 * and sw_frame_group_Multicast_data) routing selection 228 * 229 * pkt_selection_fp_ctrl_bar 230 * Filter pass BAR frame (matching rxpcu_filter_pass 231 * and sw_frame_group_ctrl_1000) routing selection 232 * 233 * rxdma0_src_ring_selection 234 * Field only valid when for the received frame type the corresponding 235 * pkt_selection_fp_... bit is set 236 * 237 * rxdma0_dst_ring_selection 238 * Field only valid when for the received frame type the corresponding 239 * pkt_selection_fp_... bit is set 240 * 241 * mcast_echo_drop_enable 242 * If set, for multicast packets, multicast echo check (i.e. 243 * SA search with mcast_echo_check = 1) shall be performed 244 * by RXOLE, and any multicast echo packets should be indicated 245 * to RXDMA for release to WBM 246 * 247 * wds_learning_detect_en 248 * If set, WDS learning detection based on SA search and notification 249 * to FW (using RXDMA0 status ring) is enabled and the "timestamp" 250 * field in address search failure cache-only entry should 251 * be used to avoid multiple WDS learning notifications. 252 * 253 * intrabss_check_en 254 * If set, intra-BSS routing detection is enabled 255 * 256 * use_ppe 257 * Indicates to RXDMA to ignore the REO_destination_indication 258 * and use a programmed value corresponding to the REO2PPE 259 * ring 260 * This override to REO2PPE for packets requiring multiple 261 * buffers shall be disabled based on an RXDMA configuration, 262 * as PPE may not support such packets. 263 * 264 * Supported only in full AP chips, not in client/soft 265 * chips 266 * 267 * ppe_routing_enable 268 * Global enable/disable bit for routing to PPE, used to disable 269 * PPE routing even if RXOLE CCE or flow search indicate 'Use_PPE' 270 * This is set by SW for peers which are being handled by a 271 * host SW/accelerator subsystem that also handles packet 272 * buffer management for WiFi-to-PPE routing. 273 * 274 * This is cleared by SW for peers which are being handled 275 * by a different subsystem, completely disabling WiFi-to-PPE 276 * routing for such peers. 277 * 278 * rx_reo_queue_desc_addr_lo 279 * Address (lower 32 bits) of the REO queue descriptor. 280 * 281 * rx_reo_queue_desc_addr_hi 282 * Address (upper 8 bits) of the REO queue descriptor. 283 * 284 * receive_queue_number 285 * Indicates the MPDU queue ID to which this MPDU link 286 * descriptor belongs. 287 * 288 * pre_delim_err_warning 289 * Indicates that a delimiter FCS error was found in between the 290 * previous MPDU and this MPDU. Note that this is just a warning, 291 * and does not mean that this MPDU is corrupted in any way. If 292 * it is, there will be other errors indicated such as FCS or 293 * decrypt errors. 294 * 295 * first_delim_err 296 * Indicates that the first delimiter had a FCS failure. 297 * 298 * pn 299 * The PN number. 300 * 301 * epd_en 302 * Field only valid when AST_based_lookup_valid == 1. 303 * In case of ndp or phy_err or AST_based_lookup_valid == 0, 304 * this field will be set to 0 305 * If set to one use EPD instead of LPD 306 * In case of ndp or phy_err, this field will never be set. 307 * 308 * all_frames_shall_be_encrypted 309 * In case of ndp or phy_err or AST_based_lookup_valid == 0, 310 * this field will be set to 0 311 * 312 * When set, all frames (data only ?) shall be encrypted. If 313 * not, RX CRYPTO shall set an error flag. 314 * 315 * 316 * encrypt_type 317 * In case of ndp or phy_err or AST_based_lookup_valid == 0, 318 * this field will be set to 0 319 * 320 * Indicates type of decrypt cipher used (as defined in the 321 * peer entry) 322 * 323 * wep_key_width_for_variable_key 324 * 325 * Field only valid when key_type is set to wep_varied_width. 326 * 327 * mesh_sta 328 * 329 * bssid_hit 330 * When set, the BSSID of the incoming frame matched one of 331 * the 8 BSSID register values 332 * bssid_number 333 * Field only valid when bssid_hit is set. 334 * This number indicates which one out of the 8 BSSID register 335 * values matched the incoming frame 336 * 337 * tid 338 * Field only valid when mpdu_qos_control_valid is set 339 * The TID field in the QoS control field 340 * 341 * peer_meta_data 342 * Meta data that SW has programmed in the Peer table entry 343 * of the transmitting STA. 344 * 345 * rxpcu_mpdu_filter_in_category 346 * Field indicates what the reason was that this mpdu frame 347 * was allowed to come into the receive path by rxpcu. Values 348 * are defined in enum %RX_DESC_RXPCU_FILTER_*. 349 * 350 * sw_frame_group_id 351 * SW processes frames based on certain classifications. Values 352 * are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*. 353 * 354 * ndp_frame 355 * When set, the received frame was an NDP frame, and thus 356 * there will be no MPDU data. 357 * phy_err 358 * When set, a PHY error was received before MAC received any 359 * data, and thus there will be no MPDU data. 360 * 361 * phy_err_during_mpdu_header 362 * When set, a PHY error was received before MAC received the 363 * complete MPDU header which was needed for proper decoding 364 * 365 * protocol_version_err 366 * Set when RXPCU detected a version error in the Frame control 367 * field 368 * 369 * ast_based_lookup_valid 370 * When set, AST based lookup for this frame has found a valid 371 * result. 372 * 373 * ranging 374 * When set, a ranging NDPA or a ranging NDP was received. 375 * 376 * phy_ppdu_id 377 * A ppdu counter value that PHY increments for every PPDU 378 * received. The counter value wraps around. 379 * 380 * ast_index 381 * 382 * This field indicates the index of the AST entry corresponding 383 * to this MPDU. It is provided by the GSE module instantiated 384 * in RXPCU. 385 * A value of 0xFFFF indicates an invalid AST index, meaning 386 * that No AST entry was found or NO AST search was performed 387 * 388 * sw_peer_id 389 * In case of ndp or phy_err or AST_based_lookup_valid == 0, 390 * this field will be set to 0 391 * This field indicates a unique peer identifier. It is set 392 * equal to field 'sw_peer_id' from the AST entry 393 * 394 * frame_control_valid 395 * When set, the field Mpdu_Frame_control_field has valid information 396 * 397 * frame_duration_valid 398 * When set, the field Mpdu_duration_field has valid information 399 * 400 * mac_addr_ad1..4_valid 401 * When set, the fields mac_addr_adx_..... have valid information 402 * 403 * mpdu_seq_ctrl_valid 404 * 405 * When set, the fields mpdu_sequence_control_field and mpdu_sequence_number 406 * have valid information as well as field 407 * For MPDUs without a sequence control field, this field will 408 * not be set. 409 * 410 * mpdu_qos_ctrl_valid, mpdu_ht_ctrl_valid 411 * 412 * When set, the field mpdu_qos_control_field, mpdu_ht_control has valid 413 * information, For MPDUs without a QoS,HT control field, this field 414 * will not be set. 415 * 416 * frame_encryption_info_valid 417 * 418 * When set, the encryption related info fields, like IV and 419 * PN are valid 420 * For MPDUs that are not encrypted, this will not be set. 421 * 422 * mpdu_fragment_number 423 * 424 * Field only valid when Mpdu_sequence_control_valid is set 425 * AND Fragment_flag is set. The fragment number from the 802.11 header 426 * 427 * more_fragment_flag 428 * 429 * The More Fragment bit setting from the MPDU header of the 430 * received frame 431 * 432 * fr_ds 433 * 434 * Field only valid when Mpdu_frame_control_valid is set 435 * Set if the from DS bit is set in the frame control. 436 * 437 * to_ds 438 * 439 * Field only valid when Mpdu_frame_control_valid is set 440 * Set if the to DS bit is set in the frame control. 441 * 442 * encrypted 443 * 444 * Field only valid when Mpdu_frame_control_valid is set. 445 * Protected bit from the frame control. 446 * 447 * mpdu_retry 448 * Field only valid when Mpdu_frame_control_valid is set. 449 * Retry bit from the frame control. Only valid when first_msdu is set 450 * 451 * mpdu_sequence_number 452 * Field only valid when Mpdu_sequence_control_valid is set. 453 * 454 * The sequence number from the 802.11 header. 455 * key_id 456 * The key ID octet from the IV. 457 * Field only valid when Frame_encryption_info_valid is set 458 * 459 * new_peer_entry 460 * Set if new RX_PEER_ENTRY TLV follows. If clear, RX_PEER_ENTRY 461 * doesn't follow so RX DECRYPTION module either uses old peer 462 * entry or not decrypt. 463 * 464 * decrypt_needed 465 * When RXPCU sets bit 'ast_index_not_found or ast_index_timeout', 466 * RXPCU will also ensure that this bit is NOT set. CRYPTO for that 467 * reason only needs to evaluate this bit and non of the other ones 468 * 469 * decap_type 470 * Used by the OLE during decapsulation. Values are defined in 471 * enum %MPDU_START_DECAP_TYPE_*. 472 * 473 * rx_insert_vlan_c_tag_padding 474 * rx_insert_vlan_s_tag_padding 475 * Insert 4 byte of all zeros as VLAN tag or double VLAN tag if 476 * the rx payload does not have VLAN. 477 * 478 * strip_vlan_c_tag_decap 479 * strip_vlan_s_tag_decap 480 * Strip VLAN or double VLAN during decapsulation. 481 * 482 * pre_delim_count 483 * The number of delimiters before this MPDU. Note that this 484 * number is cleared at PPDU start. If this MPDU is the first 485 * received MPDU in the PPDU and this MPDU gets filtered-in, 486 * this field will indicate the number of delimiters located 487 * after the last MPDU in the previous PPDU. 488 * 489 * If this MPDU is located after the first received MPDU in 490 * an PPDU, this field will indicate the number of delimiters 491 * located between the previous MPDU and this MPDU. 492 * 493 * ampdu_flag 494 * Received frame was part of an A-MPDU. 495 * 496 * bar_frame 497 * Received frame is a BAR frame 498 * 499 * raw_mpdu 500 * Set when no 802.11 to nwifi/ethernet hdr conversion is done 501 * 502 * mpdu_length 503 * MPDU length before decapsulation. 504 * 505 * first_mpdu 506 * Indicates the first MSDU of the PPDU. If both first_mpdu 507 * and last_mpdu are set in the MSDU then this is a not an 508 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an 509 * A-MPDU shall have both first_mpdu and last_mpdu bits set to 510 * 0. The PPDU start status will only be valid when this bit 511 * is set. 512 * 513 * mcast_bcast 514 * Multicast / broadcast indicator. Only set when the MAC 515 * address 1 bit 0 is set indicating mcast/bcast and the BSSID 516 * matches one of the 4 BSSID registers. Only set when 517 * first_msdu is set. 518 * 519 * ast_index_not_found 520 * Only valid when first_msdu is set. Indicates no AST matching 521 * entries within the max search count. 522 * 523 * ast_index_timeout 524 * Only valid when first_msdu is set. Indicates an unsuccessful 525 * search in the address search table due to timeout. 526 * 527 * power_mgmt 528 * Power management bit set in the 802.11 header. Only set 529 * when first_msdu is set. 530 * 531 * non_qos 532 * Set if packet is not a non-QoS data frame. Only set when 533 * first_msdu is set. 534 * 535 * null_data 536 * Set if frame type indicates either null data or QoS null 537 * data format. Only set when first_msdu is set. 538 * 539 * mgmt_type 540 * Set if packet is a management packet. Only set when 541 * first_msdu is set. 542 * 543 * ctrl_type 544 * Set if packet is a control packet. Only set when first_msdu 545 * is set. 546 * 547 * more_data 548 * Set if more bit in frame control is set. Only set when 549 * first_msdu is set. 550 * 551 * eosp 552 * Set if the EOSP (end of service period) bit in the QoS 553 * control field is set. Only set when first_msdu is set. 554 * 555 * 556 * fragment_flag 557 * Fragment indication 558 * 559 * order 560 * Set if the order bit in the frame control is set. Only 561 * set when first_msdu is set. 562 * 563 * u_apsd_trigger 564 * U-APSD trigger frame 565 * 566 * encrypt_required 567 * Indicates that this data type frame is not encrypted even if 568 * the policy for this MPDU requires encryption as indicated in 569 * the peer table key type. 570 * 571 * directed 572 * MPDU is a directed packet which means that the RA matched 573 * our STA addresses. In proxySTA it means that the TA matched 574 * an entry in our address search table with the corresponding 575 * 'no_ack' bit is the address search entry cleared. 576 * amsdu_present 577 * AMSDU present 578 * 579 * mpdu_frame_control_field 580 * Frame control field in header. Only valid when the field is marked valid. 581 * 582 * mpdu_duration_field 583 * Duration field in header. Only valid when the field is marked valid. 584 * 585 * mac_addr_adx 586 * MAC addresses in the received frame. Only valid when corresponding 587 * address valid bit is set 588 * 589 * mpdu_qos_control_field, mpdu_ht_control_field 590 * QoS/HT control fields from header. Valid only when corresponding fields 591 * are marked valid 592 * 593 * vdev_id 594 * Virtual device associated with this peer 595 * RXOLE uses this to determine intra-BSS routing. 596 * 597 * service_code 598 * Opaque service code between PPE and Wi-Fi 599 * This field gets passed on by REO to PPE in the EDMA descriptor 600 * ('REO_TO_PPE_RING'). 601 * 602 * priority_valid 603 * This field gets passed on by REO to PPE in the EDMA descriptor 604 * ('REO_TO_PPE_RING'). 605 * 606 * src_info 607 * Source (virtual) device/interface info. associated with 608 * this peer 609 * This field gets passed on by REO to PPE in the EDMA descriptor 610 * ('REO_TO_PPE_RING'). 611 * 612 * multi_link_addr_ad1_ad2_valid 613 * If set, Rx OLE shall convert Address1 and Address2 of received 614 * data frames to multi-link addresses during decapsulation to eth/nwifi 615 * 616 * multi_link_addr_ad1,ad2 617 * Multi-link receiver address1,2. Only valid when corresponding 618 * valid bit is set 619 * 620 * authorize_to_send_wds 621 * If not set, RXDMA shall perform error-routing for WDS packets 622 * as the sender is not authorized and might misuse WDS frame 623 * format to inject packets with arbitrary DA/SA. 624 * 625 */ 626 627 #define RX_MSDU_END_64_TLV_SRC_LINK_ID GENMASK(24, 22) 628 629 #define RX_MSDU_END_INFO0_RXPCU_MPDU_FITLER GENMASK(1, 0) 630 #define RX_MSDU_END_INFO0_SW_FRAME_GRP_ID GENMASK(8, 2) 631 632 #define RX_MSDU_END_INFO1_REPORTED_MPDU_LENGTH GENMASK(13, 0) 633 634 #define RX_MSDU_END_INFO2_CCE_SUPER_RULE GENMASK(13, 8) 635 #define RX_MSDU_END_INFO2_CCND_TRUNCATE BIT(14) 636 #define RX_MSDU_END_INFO2_CCND_CCE_DIS BIT(15) 637 638 #define RX_MSDU_END_INFO3_DA_OFFSET GENMASK(5, 0) 639 #define RX_MSDU_END_INFO3_SA_OFFSET GENMASK(11, 6) 640 #define RX_MSDU_END_INFO3_DA_OFFSET_VALID BIT(12) 641 #define RX_MSDU_END_INFO3_SA_OFFSET_VALID BIT(13) 642 643 #define RX_MSDU_END_INFO4_TCP_FLAG GENMASK(8, 0) 644 #define RX_MSDU_END_INFO4_LRO_ELIGIBLE BIT(9) 645 646 #define RX_MSDU_END_INFO5_SA_IDX_TIMEOUT BIT(0) 647 #define RX_MSDU_END_INFO5_DA_IDX_TIMEOUT BIT(1) 648 #define RX_MSDU_END_INFO5_TO_DS BIT(2) 649 #define RX_MSDU_END_INFO5_TID GENMASK(6, 3) 650 #define RX_MSDU_END_INFO5_SA_IS_VALID BIT(7) 651 #define RX_MSDU_END_INFO5_DA_IS_VALID BIT(8) 652 #define RX_MSDU_END_INFO5_DA_IS_MCBC BIT(9) 653 #define RX_MSDU_END_INFO5_L3_HDR_PADDING GENMASK(11, 10) 654 #define RX_MSDU_END_INFO5_FIRST_MSDU BIT(12) 655 #define RX_MSDU_END_INFO5_LAST_MSDU BIT(13) 656 #define RX_MSDU_END_INFO5_FROM_DS BIT(14) 657 #define RX_MSDU_END_INFO5_IP_CHKSUM_FAIL_COPY BIT(15) 658 659 #define RX_MSDU_END_INFO6_MSDU_DROP BIT(0) 660 #define RX_MSDU_END_INFO6_REO_DEST_IND GENMASK(5, 1) 661 #define RX_MSDU_END_INFO6_FLOW_IDX GENMASK(25, 6) 662 #define RX_MSDU_END_INFO6_USE_PPE BIT(26) 663 #define RX_MSDU_END_INFO6_MESH_STA GENMASK(28, 27) 664 #define RX_MSDU_END_INFO6_VLAN_CTAG_STRIPPED BIT(29) 665 #define RX_MSDU_END_INFO6_VLAN_STAG_STRIPPED BIT(30) 666 #define RX_MSDU_END_INFO6_FRAGMENT_FLAG BIT(31) 667 668 #define RX_MSDU_END_INFO7_AGGR_COUNT GENMASK(7, 0) 669 #define RX_MSDU_END_INFO7_FLOW_AGGR_CONTN BIT(8) 670 #define RX_MSDU_END_INFO7_FISA_TIMEOUT BIT(9) 671 672 #define RX_MSDU_END_INFO7_TCPUDP_CSUM_FAIL_CPY BIT(10) 673 #define RX_MSDU_END_INFO7_MSDU_LIMIT_ERROR BIT(11) 674 #define RX_MSDU_END_INFO7_FLOW_IDX_TIMEOUT BIT(12) 675 #define RX_MSDU_END_INFO7_FLOW_IDX_INVALID BIT(13) 676 #define RX_MSDU_END_INFO7_CCE_MATCH BIT(14) 677 #define RX_MSDU_END_INFO7_AMSDU_PARSER_ERR BIT(15) 678 679 #define RX_MSDU_END_INFO8_KEY_ID GENMASK(7, 0) 680 681 #define RX_MSDU_END_INFO9_SERVICE_CODE GENMASK(14, 6) 682 #define RX_MSDU_END_INFO9_PRIORITY_VALID BIT(15) 683 #define RX_MSDU_END_INFO9_INRA_BSS BIT(16) 684 #define RX_MSDU_END_INFO9_DEST_CHIP_ID GENMASK(18, 17) 685 #define RX_MSDU_END_INFO9_MCAST_ECHO BIT(19) 686 #define RX_MSDU_END_INFO9_WDS_LEARN_EVENT BIT(20) 687 #define RX_MSDU_END_INFO9_WDS_ROAM_EVENT BIT(21) 688 #define RX_MSDU_END_INFO9_WDS_KEEP_ALIVE_EVENT BIT(22) 689 690 #define RX_MSDU_END_INFO10_MSDU_LENGTH GENMASK(13, 0) 691 #define RX_MSDU_END_INFO10_STBC BIT(14) 692 #define RX_MSDU_END_INFO10_IPSEC_ESP BIT(15) 693 #define RX_MSDU_END_INFO10_L3_OFFSET GENMASK(22, 16) 694 #define RX_MSDU_END_INFO10_IPSEC_AH BIT(23) 695 #define RX_MSDU_END_INFO10_L4_OFFSET GENMASK(31, 24) 696 697 #define RX_MSDU_END_INFO11_MSDU_NUMBER GENMASK(7, 0) 698 #define RX_MSDU_END_INFO11_DECAP_FORMAT GENMASK(9, 8) 699 #define RX_MSDU_END_INFO11_IPV4 BIT(10) 700 #define RX_MSDU_END_INFO11_IPV6 BIT(11) 701 #define RX_MSDU_END_INFO11_TCP BIT(12) 702 #define RX_MSDU_END_INFO11_UDP BIT(13) 703 #define RX_MSDU_END_INFO11_IP_FRAG BIT(14) 704 #define RX_MSDU_END_INFO11_TCP_ONLY_ACK BIT(15) 705 #define RX_MSDU_END_INFO11_DA_IS_BCAST_MCAST BIT(16) 706 #define RX_MSDU_END_INFO11_SEL_TOEPLITZ_HASH GENMASK(18, 17) 707 #define RX_MSDU_END_INFO11_IP_FIXED_HDR_VALID BIT(19) 708 #define RX_MSDU_END_INFO11_IP_EXTN_HDR_VALID BIT(20) 709 #define RX_MSDU_END_INFO11_IP_TCP_UDP_HDR_VALID BIT(21) 710 #define RX_MSDU_END_INFO11_MESH_CTRL_PRESENT BIT(22) 711 #define RX_MSDU_END_INFO11_LDPC BIT(23) 712 #define RX_MSDU_END_INFO11_IP4_IP6_NXT_HDR GENMASK(31, 24) 713 714 #define RX_MSDU_END_INFO12_USER_RSSI GENMASK(7, 0) 715 #define RX_MSDU_END_INFO12_PKT_TYPE GENMASK(11, 8) 716 #define RX_MSDU_END_INFO12_SGI GENMASK(13, 12) 717 #define RX_MSDU_END_INFO12_RATE_MCS GENMASK(17, 14) 718 #define RX_MSDU_END_INFO12_RECV_BW GENMASK(20, 18) 719 #define RX_MSDU_END_INFO12_RECEPTION_TYPE GENMASK(23, 21) 720 721 #define RX_MSDU_END_INFO12_MIMO_SS_BITMAP GENMASK(30, 24) 722 #define RX_MSDU_END_INFO12_MIMO_DONE_COPY BIT(31) 723 724 #define RX_MSDU_END_INFO13_FIRST_MPDU BIT(0) 725 #define RX_MSDU_END_INFO13_MCAST_BCAST BIT(2) 726 #define RX_MSDU_END_INFO13_AST_IDX_NOT_FOUND BIT(3) 727 #define RX_MSDU_END_INFO13_AST_IDX_TIMEDOUT BIT(4) 728 #define RX_MSDU_END_INFO13_POWER_MGMT BIT(5) 729 #define RX_MSDU_END_INFO13_NON_QOS BIT(6) 730 #define RX_MSDU_END_INFO13_NULL_DATA BIT(7) 731 #define RX_MSDU_END_INFO13_MGMT_TYPE BIT(8) 732 #define RX_MSDU_END_INFO13_CTRL_TYPE BIT(9) 733 #define RX_MSDU_END_INFO13_MORE_DATA BIT(10) 734 #define RX_MSDU_END_INFO13_EOSP BIT(11) 735 #define RX_MSDU_END_INFO13_A_MSDU_ERROR BIT(12) 736 #define RX_MSDU_END_INFO13_ORDER BIT(14) 737 #define RX_MSDU_END_INFO13_OVERFLOW_ERR BIT(16) 738 #define RX_MSDU_END_INFO13_MSDU_LEN_ERR BIT(17) 739 #define RX_MSDU_END_INFO13_TCP_UDP_CKSUM_FAIL BIT(18) 740 #define RX_MSDU_END_INFO13_IP_CKSUM_FAIL BIT(19) 741 #define RX_MSDU_END_INFO13_SA_IDX_INVALID BIT(20) 742 #define RX_MSDU_END_INFO13_DA_IDX_INVALID BIT(21) 743 #define RX_MSDU_END_INFO13_AMSDU_ADDR_MISMATCH BIT(22) 744 #define RX_MSDU_END_INFO13_RX_IN_TX_DECRYPT_BYP BIT(23) 745 #define RX_MSDU_END_INFO13_ENCRYPT_REQUIRED BIT(24) 746 #define RX_MSDU_END_INFO13_DIRECTED BIT(25) 747 #define RX_MSDU_END_INFO13_BUFFER_FRAGMENT BIT(26) 748 #define RX_MSDU_END_INFO13_MPDU_LEN_ERR BIT(27) 749 #define RX_MSDU_END_INFO13_TKIP_MIC_ERR BIT(28) 750 #define RX_MSDU_END_INFO13_DECRYPT_ERR BIT(29) 751 #define RX_MSDU_END_INFO13_UNDECRYPT_FRAME_ERR BIT(30) 752 #define RX_MSDU_END_INFO13_FCS_ERR BIT(31) 753 754 #define RX_MSDU_END_INFO13_WIFI_PARSER_ERR BIT(15) 755 756 #define RX_MSDU_END_INFO14_DECRYPT_STATUS_CODE GENMASK(12, 10) 757 #define RX_MSDU_END_INFO14_RX_BITMAP_NOT_UPDED BIT(13) 758 #define RX_MSDU_END_INFO14_MSDU_DONE BIT(31) 759 760 struct rx_msdu_end_qcn9274 { 761 __le16 info0; 762 __le16 phy_ppdu_id; 763 __le16 ip_hdr_cksum; 764 __le16 info1; 765 __le16 info2; 766 __le16 cumulative_l3_checksum; 767 __le32 rule_indication0; 768 __le32 ipv6_options_crc; 769 __le16 info3; 770 __le16 l3_type; 771 __le32 rule_indication1; 772 __le32 tcp_seq_num; 773 __le32 tcp_ack_num; 774 __le16 info4; 775 __le16 window_size; 776 __le16 sa_sw_peer_id; 777 __le16 info5; 778 __le16 sa_idx; 779 __le16 da_idx_or_sw_peer_id; 780 __le32 info6; 781 __le32 fse_metadata; 782 __le16 cce_metadata; 783 __le16 tcp_udp_cksum; 784 __le16 info7; 785 __le16 cumulative_ip_length; 786 __le32 info8; 787 __le32 info9; 788 __le32 info10; 789 __le32 info11; 790 __le16 vlan_ctag_ci; 791 __le16 vlan_stag_ci; 792 __le32 peer_meta_data; 793 __le32 info12; 794 __le32 flow_id_toeplitz; 795 __le32 ppdu_start_timestamp_63_32; 796 __le32 phy_meta_data; 797 __le32 ppdu_start_timestamp_31_0; 798 __le32 toeplitz_hash_2_or_4; 799 __le16 res0; 800 __le16 sa_15_0; 801 __le32 sa_47_16; 802 __le32 info13; 803 __le32 info14; 804 } __packed; 805 806 #define QCN9274_MSDU_END_SELECT_MSDU_END_TAG BIT(0) 807 #define QCN9274_MSDU_END_SELECT_INFO0_PHY_PPDUID_IP_HDR_CSUM_INFO1 BIT(1) 808 #define QCN9274_MSDU_END_SELECT_INFO2_CUMULATIVE_CSUM_RULE_IND_0 BIT(2) 809 #define QCN9274_MSDU_END_SELECT_IPV6_OP_CRC_INFO3_TYPE13 BIT(3) 810 #define QCN9274_MSDU_END_SELECT_RULE_IND_1_TCP_SEQ_NUM BIT(4) 811 #define QCN9274_MSDU_END_SELECT_TCP_ACK_NUM_INFO4_WINDOW_SIZE BIT(5) 812 #define QCN9274_MSDU_END_SELECT_SA_SW_PER_ID_INFO5_SA_DA_ID BIT(6) 813 #define QCN9274_MSDU_END_SELECT_INFO6_FSE_METADATA BIT(7) 814 #define QCN9274_MSDU_END_SELECT_CCE_MDATA_TCP_UDP_CSUM_INFO7_IP_LEN BIT(8) 815 #define QCN9274_MSDU_END_SELECT_INFO8_INFO9 BIT(9) 816 #define QCN9274_MSDU_END_SELECT_INFO10_INFO11 BIT(10) 817 #define QCN9274_MSDU_END_SELECT_VLAN_CTAG_STAG_CI_PEER_MDATA BIT(11) 818 #define QCN9274_MSDU_END_SELECT_INFO12_AND_FLOW_ID_TOEPLITZ BIT(12) 819 #define QCN9274_MSDU_END_SELECT_PPDU_START_TS_63_32_PHY_MDATA BIT(13) 820 #define QCN9274_MSDU_END_SELECT_PPDU_START_TS_31_0_TOEPLITZ_HASH_2_4 BIT(14) 821 #define QCN9274_MSDU_END_SELECT_RES0_SA_47_0 BIT(15) 822 #define QCN9274_MSDU_END_SELECT_INFO13_INFO14 BIT(16) 823 824 #define QCN9274_MSDU_END_WMASK (QCN9274_MSDU_END_SELECT_MSDU_END_TAG | \ 825 QCN9274_MSDU_END_SELECT_SA_SW_PER_ID_INFO5_SA_DA_ID | \ 826 QCN9274_MSDU_END_SELECT_INFO10_INFO11 | \ 827 QCN9274_MSDU_END_SELECT_INFO12_AND_FLOW_ID_TOEPLITZ | \ 828 QCN9274_MSDU_END_SELECT_PPDU_START_TS_63_32_PHY_MDATA | \ 829 QCN9274_MSDU_END_SELECT_INFO13_INFO14) 830 831 /* The below rx_msdu_end_qcn9274_compact structure is tied with the mask value 832 * QCN9274_MSDU_END_WMASK. If the mask value changes the structure will also 833 * change. 834 */ 835 836 struct rx_msdu_end_qcn9274_compact { 837 __le64 msdu_end_tag; 838 __le16 sa_sw_peer_id; 839 __le16 info5; 840 __le16 sa_idx; 841 __le16 da_idx_or_sw_peer_id; 842 __le32 info10; 843 __le32 info11; 844 __le32 info12; 845 __le32 flow_id_toeplitz; 846 __le32 ppdu_start_timestamp_63_32; 847 __le32 phy_meta_data; 848 __le32 info13; 849 __le32 info14; 850 } __packed; 851 852 /* rx_msdu_end 853 * 854 * rxpcu_mpdu_filter_in_category 855 * Field indicates what the reason was that this mpdu frame 856 * was allowed to come into the receive path by rxpcu. Values 857 * are defined in enum %RX_DESC_RXPCU_FILTER_*. 858 * 859 * sw_frame_group_id 860 * SW processes frames based on certain classifications. Values 861 * are defined in enum %RX_DESC_SW_FRAME_GRP_ID_*. 862 * 863 * phy_ppdu_id 864 * A ppdu counter value that PHY increments for every PPDU 865 * received. The counter value wraps around. 866 * 867 * ip_hdr_cksum 868 * This can include the IP header checksum or the pseudo 869 * header checksum used by TCP/UDP checksum. 870 * 871 * reported_mpdu_length 872 * MPDU length before decapsulation. Only valid when first_msdu is 873 * set. This field is taken directly from the length field of the 874 * A-MPDU delimiter or the preamble length field for non-A-MPDU 875 * frames. 876 * 877 * cce_super_rule 878 * Indicates the super filter rule. 879 * 880 * cce_classify_not_done_truncate 881 * Classification failed due to truncated frame. 882 * 883 * cce_classify_not_done_cce_dis 884 * Classification failed due to CCE global disable 885 * 886 * cumulative_l3_checksum 887 * FISA: IP header checksum including the total MSDU length 888 * that is part of this flow aggregated so far, reported if 889 * 'RXOLE_R0_FISA_CTRL. CHKSUM_CUM_IP_LEN_EN' is set 890 * 891 * rule_indication 892 * Bitmap indicating which of rules have matched. 893 * 894 * ipv6_options_crc 895 * 32 bit CRC computed out of IP v6 extension headers. 896 * 897 * da_offset 898 * Offset into MSDU buffer for DA. 899 * 900 * sa_offset 901 * Offset into MSDU buffer for SA. 902 * 903 * da_offset_valid 904 * da_offset field is valid. This will be set to 0 in case 905 * of a dynamic A-MSDU when DA is compressed. 906 * 907 * sa_offset_valid 908 * sa_offset field is valid. This will be set to 0 in case 909 * of a dynamic A-MSDU when SA is compressed. 910 * 911 * l3_type 912 * The 16-bit type value indicating the type of L3 later 913 * extracted from LLC/SNAP, set to zero if SNAP is not 914 * available. 915 * 916 * tcp_seq_number 917 * TCP sequence number. 918 * 919 * tcp_ack_number 920 * TCP acknowledge number. 921 * 922 * tcp_flag 923 * TCP flags {NS, CWR, ECE, URG, ACK, PSH, RST, SYN, FIN}. 924 * 925 * lro_eligible 926 * Computed out of TCP and IP fields to indicate that this 927 * MSDU is eligible for LRO. 928 * 929 * window_size 930 * TCP receive window size. 931 * 932 * sa_sw_peer_id 933 * sw_peer_id from the address search entry corresponding to the 934 * source address of the MSDU. 935 * 936 * sa_idx_timeout 937 * Indicates an unsuccessful MAC source address search due to the 938 * expiring of the search timer. 939 * 940 * da_idx_timeout 941 * Indicates an unsuccessful MAC destination address search due to 942 * the expiring of the search timer. 943 * 944 * to_ds 945 * Set if the to DS bit is set in the frame control. 946 * 947 * tid 948 * TID field in the QoS control field 949 * 950 * sa_is_valid 951 * Indicates that OLE found a valid SA entry. 952 * 953 * da_is_valid 954 * Indicates that OLE found a valid DA entry. 955 * 956 * da_is_mcbc 957 * Field Only valid if da_is_valid is set. Indicates the DA address 958 * was a Multicast of Broadcast address. 959 * 960 * l3_header_padding 961 * Number of bytes padded to make sure that the L3 header will 962 * always start of a Dword boundary. 963 * 964 * first_msdu 965 * Indicates the first MSDU of A-MSDU. If both first_msdu and 966 * last_msdu are set in the MSDU then this is a non-aggregated MSDU 967 * frame: normal MPDU. Interior MSDU in an A-MSDU shall have both 968 * first_mpdu and last_mpdu bits set to 0. 969 * 970 * last_msdu 971 * Indicates the last MSDU of the A-MSDU. MPDU end status is only 972 * valid when last_msdu is set. 973 * 974 * fr_ds 975 * Set if the from DS bit is set in the frame control. 976 * 977 * ip_chksum_fail_copy 978 * Indicates that the computed checksum did not match the 979 * checksum in the IP header. 980 * 981 * sa_idx 982 * The offset in the address table which matches the MAC source 983 * address. 984 * 985 * da_idx_or_sw_peer_id 986 * Based on a register configuration in RXOLE, this field will 987 * contain: 988 * The offset in the address table which matches the MAC destination 989 * address 990 * OR: 991 * sw_peer_id from the address search entry corresponding to 992 * the destination address of the MSDU 993 * 994 * msdu_drop 995 * REO shall drop this MSDU and not forward it to any other ring. 996 * 997 * The id of the reo exit ring where the msdu frame shall push 998 * after (MPDU level) reordering has finished. Values are defined 999 * in enum %HAL_RX_MSDU_DESC_REO_DEST_IND_. 1000 * 1001 * flow_idx 1002 * Flow table index. 1003 * 1004 * use_ppe 1005 * Indicates to RXDMA to ignore the REO_destination_indication 1006 * and use a programmed value corresponding to the REO2PPE 1007 * ring 1008 * 1009 * mesh_sta 1010 * When set, this is a Mesh (11s) STA. 1011 * 1012 * vlan_ctag_stripped 1013 * Set by RXOLE if it stripped 4-bytes of C-VLAN Tag from the 1014 * packet 1015 * 1016 * vlan_stag_stripped 1017 * Set by RXOLE if it stripped 4-bytes of S-VLAN Tag from the 1018 * packet 1019 * 1020 * fragment_flag 1021 * Indicates that this is an 802.11 fragment frame. This is 1022 * set when either the more_frag bit is set in the frame control 1023 * or the fragment number is not zero. Only set when first_msdu 1024 * is set. 1025 * 1026 * fse_metadata 1027 * FSE related meta data. 1028 * 1029 * cce_metadata 1030 * CCE related meta data. 1031 * 1032 * tcp_udp_chksum 1033 * The value of the computed TCP/UDP checksum. A mode bit 1034 * selects whether this checksum is the full checksum or the 1035 * partial checksum which does not include the pseudo header. 1036 * 1037 * aggregation_count 1038 * Number of MSDU's aggregated so far 1039 * 1040 * flow_aggregation_continuation 1041 * To indicate that this MSDU can be aggregated with 1042 * the previous packet with the same flow id 1043 * 1044 * fisa_timeout 1045 * To indicate that the aggregation has restarted for 1046 * this flow due to timeout 1047 * 1048 * tcp_udp_chksum_fail 1049 * Indicates that the computed checksum (tcp_udp_chksum) did 1050 * not match the checksum in the TCP/UDP header. 1051 * 1052 * msdu_limit_error 1053 * Indicates that the MSDU threshold was exceeded and thus all the 1054 * rest of the MSDUs will not be scattered and will not be 1055 * decapsulated but will be DMA'ed in RAW format as a single MSDU. 1056 * 1057 * flow_idx_timeout 1058 * Indicates an unsuccessful flow search due to the expiring of 1059 * the search timer. 1060 * 1061 * flow_idx_invalid 1062 * flow id is not valid. 1063 * 1064 * cce_match 1065 * Indicates that this status has a corresponding MSDU that 1066 * requires FW processing. The OLE will have classification 1067 * ring mask registers which will indicate the ring(s) for 1068 * packets and descriptors which need FW attention. 1069 * 1070 * amsdu_parser_error 1071 * A-MSDU could not be properly de-agregated. 1072 * 1073 * cumulative_ip_length 1074 * Total MSDU length that is part of this flow aggregated 1075 * so far 1076 * 1077 * key_id 1078 * The key ID octet from the IV. Only valid when first_msdu is set. 1079 * 1080 * service_code 1081 * Opaque service code between PPE and Wi-Fi 1082 * 1083 * priority_valid 1084 * This field gets passed on by REO to PPE in the EDMA descriptor 1085 * 1086 * intra_bss 1087 * This packet needs intra-BSS routing by SW as the 'vdev_id' 1088 * for the destination is the same as 'vdev_id' (from 'RX_MPDU_PCU_START') 1089 * that this MSDU was got in. 1090 * 1091 * dest_chip_id 1092 * If intra_bss is set, copied by RXOLE from 'ADDR_SEARCH_ENTRY' 1093 * to support intra-BSS routing with multi-chip multi-link 1094 * operation. This indicates into which chip's TCL the packet should be 1095 * queueued 1096 * 1097 * multicast_echo 1098 * If set, this packet is a multicast echo, i.e. the DA is 1099 * multicast and Rx OLE SA search with mcast_echo_check = 1 1100 * passed. RXDMA should release such packets to WBM. 1101 * 1102 * wds_learning_event 1103 * If set, this packet has an SA search failure with WDS learning 1104 * enabled for the peer. RXOLE should route this TLV to the 1105 * RXDMA0 status ring to notify FW. 1106 * 1107 * wds_roaming_event 1108 * If set, this packet's SA 'Sw_peer_id' mismatches the 'Sw_peer_id' 1109 * of the peer through which the packet was got, indicating 1110 * the SA node has roamed. RXOLE should route this TLV to 1111 * the RXDMA0 status ring to notify FW. 1112 * 1113 * wds_keep_alive_event 1114 * If set, the AST timestamp for this packet's SA is older 1115 * than the current timestamp by more than a threshold programmed 1116 * in RXOLE. RXOLE should route this TLV to the RXDMA0 status 1117 * ring to notify FW to keep the AST entry for the SA alive. 1118 * 1119 * msdu_length 1120 * MSDU length in bytes after decapsulation. 1121 * This field is still valid for MPDU frames without A-MSDU. 1122 * It still represents MSDU length after decapsulation 1123 * 1124 * stbc 1125 * When set, use STBC transmission rates. 1126 * 1127 * ipsec_esp 1128 * Set if IPv4/v6 packet is using IPsec ESP. 1129 * 1130 * l3_offset 1131 * Depending upon mode bit, this field either indicates the 1132 * L3 offset in bytes from the start of the RX_HEADER or the IP 1133 * offset in bytes from the start of the packet after 1134 * decapsulation. The latter is only valid if ipv4_proto or 1135 * ipv6_proto is set. 1136 * 1137 * ipsec_ah 1138 * Set if IPv4/v6 packet is using IPsec AH 1139 * 1140 * l4_offset 1141 * Depending upon mode bit, this field either indicates the 1142 * L4 offset in bytes from the start of RX_HEADER (only valid 1143 * if either ipv4_proto or ipv6_proto is set to 1) or indicates 1144 * the offset in bytes to the start of TCP or UDP header from 1145 * the start of the IP header after decapsulation (Only valid if 1146 * tcp_proto or udp_proto is set). The value 0 indicates that 1147 * the offset is longer than 127 bytes. 1148 * 1149 * msdu_number 1150 * Indicates the MSDU number within a MPDU. This value is 1151 * reset to zero at the start of each MPDU. If the number of 1152 * MSDU exceeds 255 this number will wrap using modulo 256. 1153 * 1154 * decap_type 1155 * Indicates the format after decapsulation. Values are defined in 1156 * enum %MPDU_START_DECAP_TYPE_*. 1157 * 1158 * ipv4_proto 1159 * Set if L2 layer indicates IPv4 protocol. 1160 * 1161 * ipv6_proto 1162 * Set if L2 layer indicates IPv6 protocol. 1163 * 1164 * tcp_proto 1165 * Set if the ipv4_proto or ipv6_proto are set and the IP protocol 1166 * indicates TCP. 1167 * 1168 * udp_proto 1169 * Set if the ipv4_proto or ipv6_proto are set and the IP protocol 1170 * indicates UDP. 1171 * 1172 * ip_frag 1173 * Indicates that either the IP More frag bit is set or IP frag 1174 * number is non-zero. If set indicates that this is a fragmented 1175 * IP packet. 1176 * 1177 * tcp_only_ack 1178 * Set if only the TCP Ack bit is set in the TCP flags and if 1179 * the TCP payload is 0. 1180 * 1181 * da_is_bcast_mcast 1182 * The destination address is broadcast or multicast. 1183 * 1184 * toeplitz_hash 1185 * Actual chosen Hash. 1186 * 0 - Toeplitz hash of 2-tuple (IP source address, IP 1187 * destination address) 1188 * 1 - Toeplitz hash of 4-tuple (IP source address, 1189 * IP destination address, L4 (TCP/UDP) source port, 1190 * L4 (TCP/UDP) destination port) 1191 * 2 - Toeplitz of flow_id 1192 * 3 - Zero is used 1193 * 1194 * ip_fixed_header_valid 1195 * Fixed 20-byte IPv4 header or 40-byte IPv6 header parsed 1196 * fully within first 256 bytes of the packet 1197 * 1198 * ip_extn_header_valid 1199 * IPv6/IPv6 header, including IPv4 options and 1200 * recognizable extension headers parsed fully within first 256 1201 * bytes of the packet 1202 * 1203 * tcp_udp_header_valid 1204 * Fixed 20-byte TCP (excluding TCP options) or 8-byte UDP 1205 * header parsed fully within first 256 bytes of the packet 1206 * 1207 * mesh_control_present 1208 * When set, this MSDU includes the 'Mesh Control' field 1209 * 1210 * ldpc 1211 * 1212 * ip4_protocol_ip6_next_header 1213 * For IPv4, this is the 8 bit protocol field set). For IPv6 this 1214 * is the 8 bit next_header field. 1215 * 1216 * 1217 * vlan_ctag_ci 1218 * 2 bytes of C-VLAN Tag Control Information from WHO_L2_LLC 1219 * 1220 * vlan_stag_ci 1221 * 2 bytes of S-VLAN Tag Control Information from WHO_L2_LLC 1222 * in case of double VLAN 1223 * 1224 * peer_meta_data 1225 * Meta data that SW has programmed in the Peer table entry 1226 * of the transmitting STA. 1227 * 1228 * user_rssi 1229 * RSSI for this user 1230 * 1231 * pkt_type 1232 * Values are defined in enum %RX_MSDU_START_PKT_TYPE_*. 1233 * 1234 * sgi 1235 * Field only valid when pkt type is HT, VHT or HE. Values are 1236 * defined in enum %RX_MSDU_START_SGI_*. 1237 * 1238 * rate_mcs 1239 * MCS Rate used. 1240 * 1241 * receive_bandwidth 1242 * Full receive Bandwidth. Values are defined in enum 1243 * %RX_MSDU_START_RECV_*. 1244 * 1245 * reception_type 1246 * Indicates what type of reception this is and defined in enum 1247 * %RX_MSDU_START_RECEPTION_TYPE_*. 1248 * 1249 * mimo_ss_bitmap 1250 * Field only valid when 1251 * Reception_type is RX_MSDU_START_RECEPTION_TYPE_DL_MU_MIMO or 1252 * RX_MSDU_START_RECEPTION_TYPE_DL_MU_OFDMA_MIMO. 1253 * 1254 * Bitmap, with each bit indicating if the related spatial 1255 * stream is used for this STA 1256 * 1257 * LSB related to SS 0 1258 * 1259 * 0 - spatial stream not used for this reception 1260 * 1 - spatial stream used for this reception 1261 * 1262 * msdu_done_copy 1263 * If set indicates that the RX packet data, RX header data, 1264 * RX PPDU start descriptor, RX MPDU start/end descriptor, 1265 * RX MSDU start/end descriptors and RX Attention descriptor 1266 * are all valid. This bit is in the last 64-bit of the descriptor 1267 * expected to be subscribed in future hardware. 1268 * 1269 * flow_id_toeplitz 1270 * Toeplitz hash of 5-tuple 1271 * {IP source address, IP destination address, IP source port, IP 1272 * destination port, L4 protocol} in case of non-IPSec. 1273 * 1274 * In case of IPSec - Toeplitz hash of 4-tuple 1275 * {IP source address, IP destination address, SPI, L4 protocol} 1276 * 1277 * The relevant Toeplitz key registers are provided in RxOLE's 1278 * instance of common parser module. These registers are separate 1279 * from the Toeplitz keys used by ASE/FSE modules inside RxOLE. 1280 * The actual value will be passed on from common parser module 1281 * to RxOLE in one of the WHO_* TLVs. 1282 * 1283 * ppdu_start_timestamp 1284 * Timestamp that indicates when the PPDU that contained this MPDU 1285 * started on the medium. 1286 * 1287 * phy_meta_data 1288 * SW programmed Meta data provided by the PHY. Can be used for SW 1289 * to indicate the channel the device is on. 1290 * 1291 * toeplitz_hash_2_or_4 1292 * Controlled by multiple RxOLE registers for TCP/UDP over 1293 * IPv4/IPv6 - Either, Toeplitz hash computed over 2-tuple 1294 * IPv4 or IPv6 src/dest addresses is reported; or, Toeplitz 1295 * hash computed over 4-tuple IPv4 or IPv6 src/dest addresses 1296 * and src/dest ports is reported. The Flow_id_toeplitz hash 1297 * can also be reported here. Usually the hash reported here 1298 * is the one used for hash-based REO routing (see use_flow_id_toeplitz_clfy 1299 * in 'RXPT_CLASSIFY_INFO'). 1300 * 1301 * sa 1302 * Source MAC address 1303 * 1304 * first_mpdu 1305 * Indicates the first MSDU of the PPDU. If both first_mpdu 1306 * and last_mpdu are set in the MSDU then this is a not an 1307 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an 1308 * A-MPDU shall have both first_mpdu and last_mpdu bits set to 1309 * 0. The PPDU start status will only be valid when this bit 1310 * is set. 1311 * 1312 * mcast_bcast 1313 * Multicast / broadcast indicator. Only set when the MAC 1314 * address 1 bit 0 is set indicating mcast/bcast and the BSSID 1315 * matches one of the 4 BSSID registers. Only set when 1316 * first_msdu is set. 1317 * 1318 * ast_index_not_found 1319 * Only valid when first_msdu is set. Indicates no AST matching 1320 * entries within the max search count. 1321 * 1322 * ast_index_timeout 1323 * Only valid when first_msdu is set. Indicates an unsuccessful 1324 * search in the address search table due to timeout. 1325 * 1326 * power_mgmt 1327 * Power management bit set in the 802.11 header. Only set 1328 * when first_msdu is set. 1329 * 1330 * non_qos 1331 * Set if packet is not a non-QoS data frame. Only set when 1332 * first_msdu is set. 1333 * 1334 * null_data 1335 * Set if frame type indicates either null data or QoS null 1336 * data format. Only set when first_msdu is set. 1337 * 1338 * mgmt_type 1339 * Set if packet is a management packet. Only set when 1340 * first_msdu is set. 1341 * 1342 * ctrl_type 1343 * Set if packet is a control packet. Only set when first_msdu 1344 * is set. 1345 * 1346 * more_data 1347 * Set if more bit in frame control is set. Only set when 1348 * first_msdu is set. 1349 * 1350 * eosp 1351 * Set if the EOSP (end of service period) bit in the QoS 1352 * control field is set. Only set when first_msdu is set. 1353 * 1354 * a_msdu_error 1355 * Set if number of MSDUs in A-MSDU is above a threshold or if the 1356 * size of the MSDU is invalid. This receive buffer will contain 1357 * all of the remainder of MSDUs in this MPDU w/o decapsulation. 1358 * 1359 * order 1360 * Set if the order bit in the frame control is set. Only 1361 * set when first_msdu is set. 1362 * 1363 * wifi_parser_error 1364 * Indicates that the WiFi frame has one of the following errors 1365 * 1366 * overflow_err 1367 * RXPCU Receive FIFO ran out of space to receive the full MPDU. 1368 * Therefore this MPDU is terminated early and is thus corrupted. 1369 * 1370 * This MPDU will not be ACKed. 1371 * 1372 * RXPCU might still be able to correctly receive the following 1373 * MPDUs in the PPDU if enough fifo space became available in time. 1374 * 1375 * mpdu_length_err 1376 * Set by RXPCU if the expected MPDU length does not correspond 1377 * with the actually received number of bytes in the MPDU. 1378 * 1379 * tcp_udp_chksum_fail 1380 * Indicates that the computed checksum (tcp_udp_chksum) did 1381 * not match the checksum in the TCP/UDP header. 1382 * 1383 * ip_chksum_fail 1384 * Indicates that the computed checksum did not match the 1385 * checksum in the IP header. 1386 * 1387 * sa_idx_invalid 1388 * Indicates no matching entry was found in the address search 1389 * table for the source MAC address. 1390 * 1391 * da_idx_invalid 1392 * Indicates no matching entry was found in the address search 1393 * table for the destination MAC address. 1394 * 1395 * amsdu_addr_mismatch 1396 * Indicates that an A-MSDU with 'from DS = 0' had an SA mismatching 1397 * TA or an A-MDU with 'to DS = 0' had a DA mismatching RA 1398 * 1399 * rx_in_tx_decrypt_byp 1400 * Indicates that RX packet is not decrypted as Crypto is busy 1401 * with TX packet processing. 1402 * 1403 * encrypt_required 1404 * Indicates that this data type frame is not encrypted even if 1405 * the policy for this MPDU requires encryption as indicated in 1406 * the peer table key type. 1407 * 1408 * directed 1409 * MPDU is a directed packet which means that the RA matched 1410 * our STA addresses. In proxySTA it means that the TA matched 1411 * an entry in our address search table with the corresponding 1412 * 'no_ack' bit is the address search entry cleared. 1413 * 1414 * buffer_fragment 1415 * Indicates that at least one of the rx buffers has been 1416 * fragmented. If set the FW should look at the rx_frag_info 1417 * descriptor described below. 1418 * 1419 * mpdu_length_err 1420 * Indicates that the MPDU was pre-maturely terminated 1421 * resulting in a truncated MPDU. Don't trust the MPDU length 1422 * field. 1423 * 1424 * tkip_mic_err 1425 * Indicates that the MPDU Michael integrity check failed 1426 * 1427 * decrypt_err 1428 * Indicates that the MPDU decrypt integrity check failed 1429 * 1430 * fcs_err 1431 * Indicates that the MPDU FCS check failed 1432 * 1433 * flow_idx_timeout 1434 * Indicates an unsuccessful flow search due to the expiring of 1435 * the search timer. 1436 * 1437 * flow_idx_invalid 1438 * flow id is not valid. 1439 * 1440 * decrypt_status_code 1441 * Field provides insight into the decryption performed. Values 1442 * are defined in enum %RX_DESC_DECRYPT_STATUS_CODE_*. 1443 * 1444 * rx_bitmap_not_updated 1445 * Frame is received, but RXPCU could not update the receive bitmap 1446 * due to (temporary) fifo constraints. 1447 * 1448 * msdu_done 1449 * If set indicates that the RX packet data, RX header data, RX 1450 * PPDU start descriptor, RX MPDU start/end descriptor, RX MSDU 1451 * start/end descriptors and RX Attention descriptor are all 1452 * valid. This bit must be in the last octet of the 1453 * descriptor. 1454 * 1455 */ 1456 1457 struct hal_rx_desc_qcn9274_compact { 1458 struct rx_msdu_end_qcn9274_compact msdu_end; 1459 struct rx_mpdu_start_qcn9274_compact mpdu_start; 1460 u8 msdu_payload[]; 1461 } __packed; 1462 1463 #define RX_BE_PADDING0_BYTES 8 1464 #define RX_BE_PADDING1_BYTES 8 1465 1466 #define HAL_RX_BE_PKT_HDR_TLV_LEN 112 1467 1468 struct rx_pkt_hdr_tlv { 1469 __le64 tag; 1470 __le64 phy_ppdu_id; 1471 u8 rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; 1472 }; 1473 1474 struct hal_rx_desc_wcn7850 { 1475 __le64 msdu_end_tag; 1476 struct rx_msdu_end_qcn9274 msdu_end; 1477 u8 rx_padding0[RX_BE_PADDING0_BYTES]; 1478 __le64 mpdu_start_tag; 1479 struct rx_mpdu_start_qcn9274 mpdu_start; 1480 struct rx_pkt_hdr_tlv pkt_hdr_tlv; 1481 u8 msdu_payload[]; 1482 }; 1483 1484 struct rx_pkt_hdr_tlv_qcc2072 { 1485 __le32 tag; 1486 __le64 phy_ppdu_id; 1487 u8 rx_pkt_hdr[HAL_RX_BE_PKT_HDR_TLV_LEN]; 1488 }; 1489 1490 struct hal_rx_desc_qcc2072 { 1491 __le32 msdu_end_tag; 1492 struct rx_msdu_end_qcn9274 msdu_end; 1493 u8 rx_padding0[RX_BE_PADDING0_BYTES]; 1494 __le32 mpdu_start_tag; 1495 struct rx_mpdu_start_qcn9274 mpdu_start; 1496 struct rx_pkt_hdr_tlv_qcc2072 pkt_hdr_tlv; 1497 u8 msdu_payload[]; 1498 }; 1499 1500 struct hal_rx_desc { 1501 union { 1502 struct hal_rx_desc_qcn9274_compact qcn9274_compact; 1503 struct hal_rx_desc_wcn7850 wcn7850; 1504 struct hal_rx_desc_qcc2072 qcc2072; 1505 } u; 1506 } __packed; 1507 1508 #endif /* ATH12K_RX_DESC_H */ 1509