1 /**************************************************************************** 2 * Driver for Solarflare network controllers and boards 3 * Copyright 2005-2006 Fen Systems Ltd. 4 * Copyright 2005-2013 Solarflare Communications Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published 8 * by the Free Software Foundation, incorporated herein by reference. 9 */ 10 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/netdevice.h> 14 #include <linux/etherdevice.h> 15 #include <linux/delay.h> 16 #include <linux/notifier.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/in.h> 20 #include <linux/ethtool.h> 21 #include <linux/topology.h> 22 #include <linux/gfp.h> 23 #include <linux/aer.h> 24 #include <linux/interrupt.h> 25 #include "net_driver.h" 26 #include "efx.h" 27 #include "nic.h" 28 #include "selftest.h" 29 #include "sriov.h" 30 31 #include "mcdi.h" 32 #include "workarounds.h" 33 34 /************************************************************************** 35 * 36 * Type name strings 37 * 38 ************************************************************************** 39 */ 40 41 /* Loopback mode names (see LOOPBACK_MODE()) */ 42 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX; 43 const char *const efx_loopback_mode_names[] = { 44 [LOOPBACK_NONE] = "NONE", 45 [LOOPBACK_DATA] = "DATAPATH", 46 [LOOPBACK_GMAC] = "GMAC", 47 [LOOPBACK_XGMII] = "XGMII", 48 [LOOPBACK_XGXS] = "XGXS", 49 [LOOPBACK_XAUI] = "XAUI", 50 [LOOPBACK_GMII] = "GMII", 51 [LOOPBACK_SGMII] = "SGMII", 52 [LOOPBACK_XGBR] = "XGBR", 53 [LOOPBACK_XFI] = "XFI", 54 [LOOPBACK_XAUI_FAR] = "XAUI_FAR", 55 [LOOPBACK_GMII_FAR] = "GMII_FAR", 56 [LOOPBACK_SGMII_FAR] = "SGMII_FAR", 57 [LOOPBACK_XFI_FAR] = "XFI_FAR", 58 [LOOPBACK_GPHY] = "GPHY", 59 [LOOPBACK_PHYXS] = "PHYXS", 60 [LOOPBACK_PCS] = "PCS", 61 [LOOPBACK_PMAPMD] = "PMA/PMD", 62 [LOOPBACK_XPORT] = "XPORT", 63 [LOOPBACK_XGMII_WS] = "XGMII_WS", 64 [LOOPBACK_XAUI_WS] = "XAUI_WS", 65 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR", 66 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR", 67 [LOOPBACK_GMII_WS] = "GMII_WS", 68 [LOOPBACK_XFI_WS] = "XFI_WS", 69 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR", 70 [LOOPBACK_PHYXS_WS] = "PHYXS_WS", 71 }; 72 73 const unsigned int efx_reset_type_max = RESET_TYPE_MAX; 74 const char *const efx_reset_type_names[] = { 75 [RESET_TYPE_INVISIBLE] = "INVISIBLE", 76 [RESET_TYPE_ALL] = "ALL", 77 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL", 78 [RESET_TYPE_WORLD] = "WORLD", 79 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE", 80 [RESET_TYPE_DATAPATH] = "DATAPATH", 81 [RESET_TYPE_MC_BIST] = "MC_BIST", 82 [RESET_TYPE_DISABLE] = "DISABLE", 83 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG", 84 [RESET_TYPE_INT_ERROR] = "INT_ERROR", 85 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY", 86 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR", 87 [RESET_TYPE_TX_SKIP] = "TX_SKIP", 88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE", 89 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)", 90 }; 91 92 /* Reset workqueue. If any NIC has a hardware failure then a reset will be 93 * queued onto this work queue. This is not a per-nic work queue, because 94 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised. 95 */ 96 static struct workqueue_struct *reset_workqueue; 97 98 /* How often and how many times to poll for a reset while waiting for a 99 * BIST that another function started to complete. 100 */ 101 #define BIST_WAIT_DELAY_MS 100 102 #define BIST_WAIT_DELAY_COUNT 100 103 104 /************************************************************************** 105 * 106 * Configurable values 107 * 108 *************************************************************************/ 109 110 /* 111 * Use separate channels for TX and RX events 112 * 113 * Set this to 1 to use separate channels for TX and RX. It allows us 114 * to control interrupt affinity separately for TX and RX. 115 * 116 * This is only used in MSI-X interrupt mode 117 */ 118 static bool separate_tx_channels; 119 module_param(separate_tx_channels, bool, 0444); 120 MODULE_PARM_DESC(separate_tx_channels, 121 "Use separate channels for TX and RX"); 122 123 /* This is the weight assigned to each of the (per-channel) virtual 124 * NAPI devices. 125 */ 126 static int napi_weight = 64; 127 128 /* This is the time (in jiffies) between invocations of the hardware 129 * monitor. 130 * On Falcon-based NICs, this will: 131 * - Check the on-board hardware monitor; 132 * - Poll the link state and reconfigure the hardware as necessary. 133 * On Siena-based NICs for power systems with EEH support, this will give EEH a 134 * chance to start. 135 */ 136 static unsigned int efx_monitor_interval = 1 * HZ; 137 138 /* Initial interrupt moderation settings. They can be modified after 139 * module load with ethtool. 140 * 141 * The default for RX should strike a balance between increasing the 142 * round-trip latency and reducing overhead. 143 */ 144 static unsigned int rx_irq_mod_usec = 60; 145 146 /* Initial interrupt moderation settings. They can be modified after 147 * module load with ethtool. 148 * 149 * This default is chosen to ensure that a 10G link does not go idle 150 * while a TX queue is stopped after it has become full. A queue is 151 * restarted when it drops below half full. The time this takes (assuming 152 * worst case 3 descriptors per packet and 1024 descriptors) is 153 * 512 / 3 * 1.2 = 205 usec. 154 */ 155 static unsigned int tx_irq_mod_usec = 150; 156 157 /* This is the first interrupt mode to try out of: 158 * 0 => MSI-X 159 * 1 => MSI 160 * 2 => legacy 161 */ 162 static unsigned int interrupt_mode; 163 164 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS), 165 * i.e. the number of CPUs among which we may distribute simultaneous 166 * interrupt handling. 167 * 168 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt. 169 * The default (0) means to assign an interrupt to each core. 170 */ 171 static unsigned int rss_cpus; 172 module_param(rss_cpus, uint, 0444); 173 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling"); 174 175 static bool phy_flash_cfg; 176 module_param(phy_flash_cfg, bool, 0644); 177 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially"); 178 179 static unsigned irq_adapt_low_thresh = 8000; 180 module_param(irq_adapt_low_thresh, uint, 0644); 181 MODULE_PARM_DESC(irq_adapt_low_thresh, 182 "Threshold score for reducing IRQ moderation"); 183 184 static unsigned irq_adapt_high_thresh = 16000; 185 module_param(irq_adapt_high_thresh, uint, 0644); 186 MODULE_PARM_DESC(irq_adapt_high_thresh, 187 "Threshold score for increasing IRQ moderation"); 188 189 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE | 190 NETIF_MSG_LINK | NETIF_MSG_IFDOWN | 191 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR | 192 NETIF_MSG_TX_ERR | NETIF_MSG_HW); 193 module_param(debug, uint, 0); 194 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value"); 195 196 /************************************************************************** 197 * 198 * Utility functions and prototypes 199 * 200 *************************************************************************/ 201 202 static int efx_soft_enable_interrupts(struct efx_nic *efx); 203 static void efx_soft_disable_interrupts(struct efx_nic *efx); 204 static void efx_remove_channel(struct efx_channel *channel); 205 static void efx_remove_channels(struct efx_nic *efx); 206 static const struct efx_channel_type efx_default_channel_type; 207 static void efx_remove_port(struct efx_nic *efx); 208 static void efx_init_napi_channel(struct efx_channel *channel); 209 static void efx_fini_napi(struct efx_nic *efx); 210 static void efx_fini_napi_channel(struct efx_channel *channel); 211 static void efx_fini_struct(struct efx_nic *efx); 212 static void efx_start_all(struct efx_nic *efx); 213 static void efx_stop_all(struct efx_nic *efx); 214 215 #define EFX_ASSERT_RESET_SERIALISED(efx) \ 216 do { \ 217 if ((efx->state == STATE_READY) || \ 218 (efx->state == STATE_RECOVERY) || \ 219 (efx->state == STATE_DISABLED)) \ 220 ASSERT_RTNL(); \ 221 } while (0) 222 223 static int efx_check_disabled(struct efx_nic *efx) 224 { 225 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) { 226 netif_err(efx, drv, efx->net_dev, 227 "device is disabled due to earlier errors\n"); 228 return -EIO; 229 } 230 return 0; 231 } 232 233 /************************************************************************** 234 * 235 * Event queue processing 236 * 237 *************************************************************************/ 238 239 /* Process channel's event queue 240 * 241 * This function is responsible for processing the event queue of a 242 * single channel. The caller must guarantee that this function will 243 * never be concurrently called more than once on the same channel, 244 * though different channels may be being processed concurrently. 245 */ 246 static int efx_process_channel(struct efx_channel *channel, int budget) 247 { 248 int spent; 249 250 if (unlikely(!channel->enabled)) 251 return 0; 252 253 spent = efx_nic_process_eventq(channel, budget); 254 if (spent && efx_channel_has_rx_queue(channel)) { 255 struct efx_rx_queue *rx_queue = 256 efx_channel_get_rx_queue(channel); 257 258 efx_rx_flush_packet(channel); 259 efx_fast_push_rx_descriptors(rx_queue, true); 260 } 261 262 return spent; 263 } 264 265 /* NAPI poll handler 266 * 267 * NAPI guarantees serialisation of polls of the same device, which 268 * provides the guarantee required by efx_process_channel(). 269 */ 270 static int efx_poll(struct napi_struct *napi, int budget) 271 { 272 struct efx_channel *channel = 273 container_of(napi, struct efx_channel, napi_str); 274 struct efx_nic *efx = channel->efx; 275 int spent; 276 277 if (!efx_channel_lock_napi(channel)) 278 return budget; 279 280 netif_vdbg(efx, intr, efx->net_dev, 281 "channel %d NAPI poll executing on CPU %d\n", 282 channel->channel, raw_smp_processor_id()); 283 284 spent = efx_process_channel(channel, budget); 285 286 if (spent < budget) { 287 if (efx_channel_has_rx_queue(channel) && 288 efx->irq_rx_adaptive && 289 unlikely(++channel->irq_count == 1000)) { 290 if (unlikely(channel->irq_mod_score < 291 irq_adapt_low_thresh)) { 292 if (channel->irq_moderation > 1) { 293 channel->irq_moderation -= 1; 294 efx->type->push_irq_moderation(channel); 295 } 296 } else if (unlikely(channel->irq_mod_score > 297 irq_adapt_high_thresh)) { 298 if (channel->irq_moderation < 299 efx->irq_rx_moderation) { 300 channel->irq_moderation += 1; 301 efx->type->push_irq_moderation(channel); 302 } 303 } 304 channel->irq_count = 0; 305 channel->irq_mod_score = 0; 306 } 307 308 efx_filter_rfs_expire(channel); 309 310 /* There is no race here; although napi_disable() will 311 * only wait for napi_complete(), this isn't a problem 312 * since efx_nic_eventq_read_ack() will have no effect if 313 * interrupts have already been disabled. 314 */ 315 napi_complete(napi); 316 efx_nic_eventq_read_ack(channel); 317 } 318 319 efx_channel_unlock_napi(channel); 320 return spent; 321 } 322 323 /* Create event queue 324 * Event queue memory allocations are done only once. If the channel 325 * is reset, the memory buffer will be reused; this guards against 326 * errors during channel reset and also simplifies interrupt handling. 327 */ 328 static int efx_probe_eventq(struct efx_channel *channel) 329 { 330 struct efx_nic *efx = channel->efx; 331 unsigned long entries; 332 333 netif_dbg(efx, probe, efx->net_dev, 334 "chan %d create event queue\n", channel->channel); 335 336 /* Build an event queue with room for one event per tx and rx buffer, 337 * plus some extra for link state events and MCDI completions. */ 338 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128); 339 EFX_BUG_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE); 340 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1; 341 342 return efx_nic_probe_eventq(channel); 343 } 344 345 /* Prepare channel's event queue */ 346 static int efx_init_eventq(struct efx_channel *channel) 347 { 348 struct efx_nic *efx = channel->efx; 349 int rc; 350 351 EFX_WARN_ON_PARANOID(channel->eventq_init); 352 353 netif_dbg(efx, drv, efx->net_dev, 354 "chan %d init event queue\n", channel->channel); 355 356 rc = efx_nic_init_eventq(channel); 357 if (rc == 0) { 358 efx->type->push_irq_moderation(channel); 359 channel->eventq_read_ptr = 0; 360 channel->eventq_init = true; 361 } 362 return rc; 363 } 364 365 /* Enable event queue processing and NAPI */ 366 void efx_start_eventq(struct efx_channel *channel) 367 { 368 netif_dbg(channel->efx, ifup, channel->efx->net_dev, 369 "chan %d start event queue\n", channel->channel); 370 371 /* Make sure the NAPI handler sees the enabled flag set */ 372 channel->enabled = true; 373 smp_wmb(); 374 375 efx_channel_enable(channel); 376 napi_enable(&channel->napi_str); 377 efx_nic_eventq_read_ack(channel); 378 } 379 380 /* Disable event queue processing and NAPI */ 381 void efx_stop_eventq(struct efx_channel *channel) 382 { 383 if (!channel->enabled) 384 return; 385 386 napi_disable(&channel->napi_str); 387 while (!efx_channel_disable(channel)) 388 usleep_range(1000, 20000); 389 channel->enabled = false; 390 } 391 392 static void efx_fini_eventq(struct efx_channel *channel) 393 { 394 if (!channel->eventq_init) 395 return; 396 397 netif_dbg(channel->efx, drv, channel->efx->net_dev, 398 "chan %d fini event queue\n", channel->channel); 399 400 efx_nic_fini_eventq(channel); 401 channel->eventq_init = false; 402 } 403 404 static void efx_remove_eventq(struct efx_channel *channel) 405 { 406 netif_dbg(channel->efx, drv, channel->efx->net_dev, 407 "chan %d remove event queue\n", channel->channel); 408 409 efx_nic_remove_eventq(channel); 410 } 411 412 /************************************************************************** 413 * 414 * Channel handling 415 * 416 *************************************************************************/ 417 418 /* Allocate and initialise a channel structure. */ 419 static struct efx_channel * 420 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel) 421 { 422 struct efx_channel *channel; 423 struct efx_rx_queue *rx_queue; 424 struct efx_tx_queue *tx_queue; 425 int j; 426 427 channel = kzalloc(sizeof(*channel), GFP_KERNEL); 428 if (!channel) 429 return NULL; 430 431 channel->efx = efx; 432 channel->channel = i; 433 channel->type = &efx_default_channel_type; 434 435 for (j = 0; j < EFX_TXQ_TYPES; j++) { 436 tx_queue = &channel->tx_queue[j]; 437 tx_queue->efx = efx; 438 tx_queue->queue = i * EFX_TXQ_TYPES + j; 439 tx_queue->channel = channel; 440 } 441 442 rx_queue = &channel->rx_queue; 443 rx_queue->efx = efx; 444 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 445 (unsigned long)rx_queue); 446 447 return channel; 448 } 449 450 /* Allocate and initialise a channel structure, copying parameters 451 * (but not resources) from an old channel structure. 452 */ 453 static struct efx_channel * 454 efx_copy_channel(const struct efx_channel *old_channel) 455 { 456 struct efx_channel *channel; 457 struct efx_rx_queue *rx_queue; 458 struct efx_tx_queue *tx_queue; 459 int j; 460 461 channel = kmalloc(sizeof(*channel), GFP_KERNEL); 462 if (!channel) 463 return NULL; 464 465 *channel = *old_channel; 466 467 channel->napi_dev = NULL; 468 memset(&channel->eventq, 0, sizeof(channel->eventq)); 469 470 for (j = 0; j < EFX_TXQ_TYPES; j++) { 471 tx_queue = &channel->tx_queue[j]; 472 if (tx_queue->channel) 473 tx_queue->channel = channel; 474 tx_queue->buffer = NULL; 475 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd)); 476 } 477 478 rx_queue = &channel->rx_queue; 479 rx_queue->buffer = NULL; 480 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd)); 481 setup_timer(&rx_queue->slow_fill, efx_rx_slow_fill, 482 (unsigned long)rx_queue); 483 484 return channel; 485 } 486 487 static int efx_probe_channel(struct efx_channel *channel) 488 { 489 struct efx_tx_queue *tx_queue; 490 struct efx_rx_queue *rx_queue; 491 int rc; 492 493 netif_dbg(channel->efx, probe, channel->efx->net_dev, 494 "creating channel %d\n", channel->channel); 495 496 rc = channel->type->pre_probe(channel); 497 if (rc) 498 goto fail; 499 500 rc = efx_probe_eventq(channel); 501 if (rc) 502 goto fail; 503 504 efx_for_each_channel_tx_queue(tx_queue, channel) { 505 rc = efx_probe_tx_queue(tx_queue); 506 if (rc) 507 goto fail; 508 } 509 510 efx_for_each_channel_rx_queue(rx_queue, channel) { 511 rc = efx_probe_rx_queue(rx_queue); 512 if (rc) 513 goto fail; 514 } 515 516 return 0; 517 518 fail: 519 efx_remove_channel(channel); 520 return rc; 521 } 522 523 static void 524 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len) 525 { 526 struct efx_nic *efx = channel->efx; 527 const char *type; 528 int number; 529 530 number = channel->channel; 531 if (efx->tx_channel_offset == 0) { 532 type = ""; 533 } else if (channel->channel < efx->tx_channel_offset) { 534 type = "-rx"; 535 } else { 536 type = "-tx"; 537 number -= efx->tx_channel_offset; 538 } 539 snprintf(buf, len, "%s%s-%d", efx->name, type, number); 540 } 541 542 static void efx_set_channel_names(struct efx_nic *efx) 543 { 544 struct efx_channel *channel; 545 546 efx_for_each_channel(channel, efx) 547 channel->type->get_name(channel, 548 efx->msi_context[channel->channel].name, 549 sizeof(efx->msi_context[0].name)); 550 } 551 552 static int efx_probe_channels(struct efx_nic *efx) 553 { 554 struct efx_channel *channel; 555 int rc; 556 557 /* Restart special buffer allocation */ 558 efx->next_buffer_table = 0; 559 560 /* Probe channels in reverse, so that any 'extra' channels 561 * use the start of the buffer table. This allows the traffic 562 * channels to be resized without moving them or wasting the 563 * entries before them. 564 */ 565 efx_for_each_channel_rev(channel, efx) { 566 rc = efx_probe_channel(channel); 567 if (rc) { 568 netif_err(efx, probe, efx->net_dev, 569 "failed to create channel %d\n", 570 channel->channel); 571 goto fail; 572 } 573 } 574 efx_set_channel_names(efx); 575 576 return 0; 577 578 fail: 579 efx_remove_channels(efx); 580 return rc; 581 } 582 583 /* Channels are shutdown and reinitialised whilst the NIC is running 584 * to propagate configuration changes (mtu, checksum offload), or 585 * to clear hardware error conditions 586 */ 587 static void efx_start_datapath(struct efx_nic *efx) 588 { 589 bool old_rx_scatter = efx->rx_scatter; 590 struct efx_tx_queue *tx_queue; 591 struct efx_rx_queue *rx_queue; 592 struct efx_channel *channel; 593 size_t rx_buf_len; 594 595 /* Calculate the rx buffer allocation parameters required to 596 * support the current MTU, including padding for header 597 * alignment and overruns. 598 */ 599 efx->rx_dma_len = (efx->rx_prefix_size + 600 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) + 601 efx->type->rx_buffer_padding); 602 rx_buf_len = (sizeof(struct efx_rx_page_state) + 603 efx->rx_ip_align + efx->rx_dma_len); 604 if (rx_buf_len <= PAGE_SIZE) { 605 efx->rx_scatter = efx->type->always_rx_scatter; 606 efx->rx_buffer_order = 0; 607 } else if (efx->type->can_rx_scatter) { 608 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES); 609 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) + 610 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE, 611 EFX_RX_BUF_ALIGNMENT) > 612 PAGE_SIZE); 613 efx->rx_scatter = true; 614 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE; 615 efx->rx_buffer_order = 0; 616 } else { 617 efx->rx_scatter = false; 618 efx->rx_buffer_order = get_order(rx_buf_len); 619 } 620 621 efx_rx_config_page_split(efx); 622 if (efx->rx_buffer_order) 623 netif_dbg(efx, drv, efx->net_dev, 624 "RX buf len=%u; page order=%u batch=%u\n", 625 efx->rx_dma_len, efx->rx_buffer_order, 626 efx->rx_pages_per_batch); 627 else 628 netif_dbg(efx, drv, efx->net_dev, 629 "RX buf len=%u step=%u bpp=%u; page batch=%u\n", 630 efx->rx_dma_len, efx->rx_page_buf_step, 631 efx->rx_bufs_per_page, efx->rx_pages_per_batch); 632 633 /* RX filters may also have scatter-enabled flags */ 634 if (efx->rx_scatter != old_rx_scatter) 635 efx->type->filter_update_rx_scatter(efx); 636 637 /* We must keep at least one descriptor in a TX ring empty. 638 * We could avoid this when the queue size does not exactly 639 * match the hardware ring size, but it's not that important. 640 * Therefore we stop the queue when one more skb might fill 641 * the ring completely. We wake it when half way back to 642 * empty. 643 */ 644 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx); 645 efx->txq_wake_thresh = efx->txq_stop_thresh / 2; 646 647 /* Initialise the channels */ 648 efx_for_each_channel(channel, efx) { 649 efx_for_each_channel_tx_queue(tx_queue, channel) { 650 efx_init_tx_queue(tx_queue); 651 atomic_inc(&efx->active_queues); 652 } 653 654 efx_for_each_channel_rx_queue(rx_queue, channel) { 655 efx_init_rx_queue(rx_queue); 656 atomic_inc(&efx->active_queues); 657 efx_stop_eventq(channel); 658 efx_fast_push_rx_descriptors(rx_queue, false); 659 efx_start_eventq(channel); 660 } 661 662 WARN_ON(channel->rx_pkt_n_frags); 663 } 664 665 efx_ptp_start_datapath(efx); 666 667 if (netif_device_present(efx->net_dev)) 668 netif_tx_wake_all_queues(efx->net_dev); 669 } 670 671 static void efx_stop_datapath(struct efx_nic *efx) 672 { 673 struct efx_channel *channel; 674 struct efx_tx_queue *tx_queue; 675 struct efx_rx_queue *rx_queue; 676 int rc; 677 678 EFX_ASSERT_RESET_SERIALISED(efx); 679 BUG_ON(efx->port_enabled); 680 681 efx_ptp_stop_datapath(efx); 682 683 /* Stop RX refill */ 684 efx_for_each_channel(channel, efx) { 685 efx_for_each_channel_rx_queue(rx_queue, channel) 686 rx_queue->refill_enabled = false; 687 } 688 689 efx_for_each_channel(channel, efx) { 690 /* RX packet processing is pipelined, so wait for the 691 * NAPI handler to complete. At least event queue 0 692 * might be kept active by non-data events, so don't 693 * use napi_synchronize() but actually disable NAPI 694 * temporarily. 695 */ 696 if (efx_channel_has_rx_queue(channel)) { 697 efx_stop_eventq(channel); 698 efx_start_eventq(channel); 699 } 700 } 701 702 rc = efx->type->fini_dmaq(efx); 703 if (rc && EFX_WORKAROUND_7803(efx)) { 704 /* Schedule a reset to recover from the flush failure. The 705 * descriptor caches reference memory we're about to free, 706 * but falcon_reconfigure_mac_wrapper() won't reconnect 707 * the MACs because of the pending reset. 708 */ 709 netif_err(efx, drv, efx->net_dev, 710 "Resetting to recover from flush failure\n"); 711 efx_schedule_reset(efx, RESET_TYPE_ALL); 712 } else if (rc) { 713 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n"); 714 } else { 715 netif_dbg(efx, drv, efx->net_dev, 716 "successfully flushed all queues\n"); 717 } 718 719 efx_for_each_channel(channel, efx) { 720 efx_for_each_channel_rx_queue(rx_queue, channel) 721 efx_fini_rx_queue(rx_queue); 722 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 723 efx_fini_tx_queue(tx_queue); 724 } 725 } 726 727 static void efx_remove_channel(struct efx_channel *channel) 728 { 729 struct efx_tx_queue *tx_queue; 730 struct efx_rx_queue *rx_queue; 731 732 netif_dbg(channel->efx, drv, channel->efx->net_dev, 733 "destroy chan %d\n", channel->channel); 734 735 efx_for_each_channel_rx_queue(rx_queue, channel) 736 efx_remove_rx_queue(rx_queue); 737 efx_for_each_possible_channel_tx_queue(tx_queue, channel) 738 efx_remove_tx_queue(tx_queue); 739 efx_remove_eventq(channel); 740 channel->type->post_remove(channel); 741 } 742 743 static void efx_remove_channels(struct efx_nic *efx) 744 { 745 struct efx_channel *channel; 746 747 efx_for_each_channel(channel, efx) 748 efx_remove_channel(channel); 749 } 750 751 int 752 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries) 753 { 754 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; 755 u32 old_rxq_entries, old_txq_entries; 756 unsigned i, next_buffer_table = 0; 757 int rc, rc2; 758 759 rc = efx_check_disabled(efx); 760 if (rc) 761 return rc; 762 763 /* Not all channels should be reallocated. We must avoid 764 * reallocating their buffer table entries. 765 */ 766 efx_for_each_channel(channel, efx) { 767 struct efx_rx_queue *rx_queue; 768 struct efx_tx_queue *tx_queue; 769 770 if (channel->type->copy) 771 continue; 772 next_buffer_table = max(next_buffer_table, 773 channel->eventq.index + 774 channel->eventq.entries); 775 efx_for_each_channel_rx_queue(rx_queue, channel) 776 next_buffer_table = max(next_buffer_table, 777 rx_queue->rxd.index + 778 rx_queue->rxd.entries); 779 efx_for_each_channel_tx_queue(tx_queue, channel) 780 next_buffer_table = max(next_buffer_table, 781 tx_queue->txd.index + 782 tx_queue->txd.entries); 783 } 784 785 efx_device_detach_sync(efx); 786 efx_stop_all(efx); 787 efx_soft_disable_interrupts(efx); 788 789 /* Clone channels (where possible) */ 790 memset(other_channel, 0, sizeof(other_channel)); 791 for (i = 0; i < efx->n_channels; i++) { 792 channel = efx->channel[i]; 793 if (channel->type->copy) 794 channel = channel->type->copy(channel); 795 if (!channel) { 796 rc = -ENOMEM; 797 goto out; 798 } 799 other_channel[i] = channel; 800 } 801 802 /* Swap entry counts and channel pointers */ 803 old_rxq_entries = efx->rxq_entries; 804 old_txq_entries = efx->txq_entries; 805 efx->rxq_entries = rxq_entries; 806 efx->txq_entries = txq_entries; 807 for (i = 0; i < efx->n_channels; i++) { 808 channel = efx->channel[i]; 809 efx->channel[i] = other_channel[i]; 810 other_channel[i] = channel; 811 } 812 813 /* Restart buffer table allocation */ 814 efx->next_buffer_table = next_buffer_table; 815 816 for (i = 0; i < efx->n_channels; i++) { 817 channel = efx->channel[i]; 818 if (!channel->type->copy) 819 continue; 820 rc = efx_probe_channel(channel); 821 if (rc) 822 goto rollback; 823 efx_init_napi_channel(efx->channel[i]); 824 } 825 826 out: 827 /* Destroy unused channel structures */ 828 for (i = 0; i < efx->n_channels; i++) { 829 channel = other_channel[i]; 830 if (channel && channel->type->copy) { 831 efx_fini_napi_channel(channel); 832 efx_remove_channel(channel); 833 kfree(channel); 834 } 835 } 836 837 rc2 = efx_soft_enable_interrupts(efx); 838 if (rc2) { 839 rc = rc ? rc : rc2; 840 netif_err(efx, drv, efx->net_dev, 841 "unable to restart interrupts on channel reallocation\n"); 842 efx_schedule_reset(efx, RESET_TYPE_DISABLE); 843 } else { 844 efx_start_all(efx); 845 netif_device_attach(efx->net_dev); 846 } 847 return rc; 848 849 rollback: 850 /* Swap back */ 851 efx->rxq_entries = old_rxq_entries; 852 efx->txq_entries = old_txq_entries; 853 for (i = 0; i < efx->n_channels; i++) { 854 channel = efx->channel[i]; 855 efx->channel[i] = other_channel[i]; 856 other_channel[i] = channel; 857 } 858 goto out; 859 } 860 861 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue) 862 { 863 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(100)); 864 } 865 866 static const struct efx_channel_type efx_default_channel_type = { 867 .pre_probe = efx_channel_dummy_op_int, 868 .post_remove = efx_channel_dummy_op_void, 869 .get_name = efx_get_channel_name, 870 .copy = efx_copy_channel, 871 .keep_eventq = false, 872 }; 873 874 int efx_channel_dummy_op_int(struct efx_channel *channel) 875 { 876 return 0; 877 } 878 879 void efx_channel_dummy_op_void(struct efx_channel *channel) 880 { 881 } 882 883 /************************************************************************** 884 * 885 * Port handling 886 * 887 **************************************************************************/ 888 889 /* This ensures that the kernel is kept informed (via 890 * netif_carrier_on/off) of the link status, and also maintains the 891 * link status's stop on the port's TX queue. 892 */ 893 void efx_link_status_changed(struct efx_nic *efx) 894 { 895 struct efx_link_state *link_state = &efx->link_state; 896 897 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure 898 * that no events are triggered between unregister_netdev() and the 899 * driver unloading. A more general condition is that NETDEV_CHANGE 900 * can only be generated between NETDEV_UP and NETDEV_DOWN */ 901 if (!netif_running(efx->net_dev)) 902 return; 903 904 if (link_state->up != netif_carrier_ok(efx->net_dev)) { 905 efx->n_link_state_changes++; 906 907 if (link_state->up) 908 netif_carrier_on(efx->net_dev); 909 else 910 netif_carrier_off(efx->net_dev); 911 } 912 913 /* Status message for kernel log */ 914 if (link_state->up) 915 netif_info(efx, link, efx->net_dev, 916 "link up at %uMbps %s-duplex (MTU %d)\n", 917 link_state->speed, link_state->fd ? "full" : "half", 918 efx->net_dev->mtu); 919 else 920 netif_info(efx, link, efx->net_dev, "link down\n"); 921 } 922 923 void efx_link_set_advertising(struct efx_nic *efx, u32 advertising) 924 { 925 efx->link_advertising = advertising; 926 if (advertising) { 927 if (advertising & ADVERTISED_Pause) 928 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX); 929 else 930 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX); 931 if (advertising & ADVERTISED_Asym_Pause) 932 efx->wanted_fc ^= EFX_FC_TX; 933 } 934 } 935 936 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc) 937 { 938 efx->wanted_fc = wanted_fc; 939 if (efx->link_advertising) { 940 if (wanted_fc & EFX_FC_RX) 941 efx->link_advertising |= (ADVERTISED_Pause | 942 ADVERTISED_Asym_Pause); 943 else 944 efx->link_advertising &= ~(ADVERTISED_Pause | 945 ADVERTISED_Asym_Pause); 946 if (wanted_fc & EFX_FC_TX) 947 efx->link_advertising ^= ADVERTISED_Asym_Pause; 948 } 949 } 950 951 static void efx_fini_port(struct efx_nic *efx); 952 953 /* We assume that efx->type->reconfigure_mac will always try to sync RX 954 * filters and therefore needs to read-lock the filter table against freeing 955 */ 956 void efx_mac_reconfigure(struct efx_nic *efx) 957 { 958 down_read(&efx->filter_sem); 959 efx->type->reconfigure_mac(efx); 960 up_read(&efx->filter_sem); 961 } 962 963 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure 964 * the MAC appropriately. All other PHY configuration changes are pushed 965 * through phy_op->set_settings(), and pushed asynchronously to the MAC 966 * through efx_monitor(). 967 * 968 * Callers must hold the mac_lock 969 */ 970 int __efx_reconfigure_port(struct efx_nic *efx) 971 { 972 enum efx_phy_mode phy_mode; 973 int rc; 974 975 WARN_ON(!mutex_is_locked(&efx->mac_lock)); 976 977 /* Disable PHY transmit in mac level loopbacks */ 978 phy_mode = efx->phy_mode; 979 if (LOOPBACK_INTERNAL(efx)) 980 efx->phy_mode |= PHY_MODE_TX_DISABLED; 981 else 982 efx->phy_mode &= ~PHY_MODE_TX_DISABLED; 983 984 rc = efx->type->reconfigure_port(efx); 985 986 if (rc) 987 efx->phy_mode = phy_mode; 988 989 return rc; 990 } 991 992 /* Reinitialise the MAC to pick up new PHY settings, even if the port is 993 * disabled. */ 994 int efx_reconfigure_port(struct efx_nic *efx) 995 { 996 int rc; 997 998 EFX_ASSERT_RESET_SERIALISED(efx); 999 1000 mutex_lock(&efx->mac_lock); 1001 rc = __efx_reconfigure_port(efx); 1002 mutex_unlock(&efx->mac_lock); 1003 1004 return rc; 1005 } 1006 1007 /* Asynchronous work item for changing MAC promiscuity and multicast 1008 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current 1009 * MAC directly. */ 1010 static void efx_mac_work(struct work_struct *data) 1011 { 1012 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work); 1013 1014 mutex_lock(&efx->mac_lock); 1015 if (efx->port_enabled) 1016 efx_mac_reconfigure(efx); 1017 mutex_unlock(&efx->mac_lock); 1018 } 1019 1020 static int efx_probe_port(struct efx_nic *efx) 1021 { 1022 int rc; 1023 1024 netif_dbg(efx, probe, efx->net_dev, "create port\n"); 1025 1026 if (phy_flash_cfg) 1027 efx->phy_mode = PHY_MODE_SPECIAL; 1028 1029 /* Connect up MAC/PHY operations table */ 1030 rc = efx->type->probe_port(efx); 1031 if (rc) 1032 return rc; 1033 1034 /* Initialise MAC address to permanent address */ 1035 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr); 1036 1037 return 0; 1038 } 1039 1040 static int efx_init_port(struct efx_nic *efx) 1041 { 1042 int rc; 1043 1044 netif_dbg(efx, drv, efx->net_dev, "init port\n"); 1045 1046 mutex_lock(&efx->mac_lock); 1047 1048 rc = efx->phy_op->init(efx); 1049 if (rc) 1050 goto fail1; 1051 1052 efx->port_initialized = true; 1053 1054 /* Reconfigure the MAC before creating dma queues (required for 1055 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */ 1056 efx_mac_reconfigure(efx); 1057 1058 /* Ensure the PHY advertises the correct flow control settings */ 1059 rc = efx->phy_op->reconfigure(efx); 1060 if (rc && rc != -EPERM) 1061 goto fail2; 1062 1063 mutex_unlock(&efx->mac_lock); 1064 return 0; 1065 1066 fail2: 1067 efx->phy_op->fini(efx); 1068 fail1: 1069 mutex_unlock(&efx->mac_lock); 1070 return rc; 1071 } 1072 1073 static void efx_start_port(struct efx_nic *efx) 1074 { 1075 netif_dbg(efx, ifup, efx->net_dev, "start port\n"); 1076 BUG_ON(efx->port_enabled); 1077 1078 mutex_lock(&efx->mac_lock); 1079 efx->port_enabled = true; 1080 1081 /* Ensure MAC ingress/egress is enabled */ 1082 efx_mac_reconfigure(efx); 1083 1084 mutex_unlock(&efx->mac_lock); 1085 } 1086 1087 /* Cancel work for MAC reconfiguration, periodic hardware monitoring 1088 * and the async self-test, wait for them to finish and prevent them 1089 * being scheduled again. This doesn't cover online resets, which 1090 * should only be cancelled when removing the device. 1091 */ 1092 static void efx_stop_port(struct efx_nic *efx) 1093 { 1094 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n"); 1095 1096 EFX_ASSERT_RESET_SERIALISED(efx); 1097 1098 mutex_lock(&efx->mac_lock); 1099 efx->port_enabled = false; 1100 mutex_unlock(&efx->mac_lock); 1101 1102 /* Serialise against efx_set_multicast_list() */ 1103 netif_addr_lock_bh(efx->net_dev); 1104 netif_addr_unlock_bh(efx->net_dev); 1105 1106 cancel_delayed_work_sync(&efx->monitor_work); 1107 efx_selftest_async_cancel(efx); 1108 cancel_work_sync(&efx->mac_work); 1109 } 1110 1111 static void efx_fini_port(struct efx_nic *efx) 1112 { 1113 netif_dbg(efx, drv, efx->net_dev, "shut down port\n"); 1114 1115 if (!efx->port_initialized) 1116 return; 1117 1118 efx->phy_op->fini(efx); 1119 efx->port_initialized = false; 1120 1121 efx->link_state.up = false; 1122 efx_link_status_changed(efx); 1123 } 1124 1125 static void efx_remove_port(struct efx_nic *efx) 1126 { 1127 netif_dbg(efx, drv, efx->net_dev, "destroying port\n"); 1128 1129 efx->type->remove_port(efx); 1130 } 1131 1132 /************************************************************************** 1133 * 1134 * NIC handling 1135 * 1136 **************************************************************************/ 1137 1138 static LIST_HEAD(efx_primary_list); 1139 static LIST_HEAD(efx_unassociated_list); 1140 1141 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right) 1142 { 1143 return left->type == right->type && 1144 left->vpd_sn && right->vpd_sn && 1145 !strcmp(left->vpd_sn, right->vpd_sn); 1146 } 1147 1148 static void efx_associate(struct efx_nic *efx) 1149 { 1150 struct efx_nic *other, *next; 1151 1152 if (efx->primary == efx) { 1153 /* Adding primary function; look for secondaries */ 1154 1155 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n"); 1156 list_add_tail(&efx->node, &efx_primary_list); 1157 1158 list_for_each_entry_safe(other, next, &efx_unassociated_list, 1159 node) { 1160 if (efx_same_controller(efx, other)) { 1161 list_del(&other->node); 1162 netif_dbg(other, probe, other->net_dev, 1163 "moving to secondary list of %s %s\n", 1164 pci_name(efx->pci_dev), 1165 efx->net_dev->name); 1166 list_add_tail(&other->node, 1167 &efx->secondary_list); 1168 other->primary = efx; 1169 } 1170 } 1171 } else { 1172 /* Adding secondary function; look for primary */ 1173 1174 list_for_each_entry(other, &efx_primary_list, node) { 1175 if (efx_same_controller(efx, other)) { 1176 netif_dbg(efx, probe, efx->net_dev, 1177 "adding to secondary list of %s %s\n", 1178 pci_name(other->pci_dev), 1179 other->net_dev->name); 1180 list_add_tail(&efx->node, 1181 &other->secondary_list); 1182 efx->primary = other; 1183 return; 1184 } 1185 } 1186 1187 netif_dbg(efx, probe, efx->net_dev, 1188 "adding to unassociated list\n"); 1189 list_add_tail(&efx->node, &efx_unassociated_list); 1190 } 1191 } 1192 1193 static void efx_dissociate(struct efx_nic *efx) 1194 { 1195 struct efx_nic *other, *next; 1196 1197 list_del(&efx->node); 1198 efx->primary = NULL; 1199 1200 list_for_each_entry_safe(other, next, &efx->secondary_list, node) { 1201 list_del(&other->node); 1202 netif_dbg(other, probe, other->net_dev, 1203 "moving to unassociated list\n"); 1204 list_add_tail(&other->node, &efx_unassociated_list); 1205 other->primary = NULL; 1206 } 1207 } 1208 1209 /* This configures the PCI device to enable I/O and DMA. */ 1210 static int efx_init_io(struct efx_nic *efx) 1211 { 1212 struct pci_dev *pci_dev = efx->pci_dev; 1213 dma_addr_t dma_mask = efx->type->max_dma_mask; 1214 unsigned int mem_map_size = efx->type->mem_map_size(efx); 1215 int rc, bar; 1216 1217 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); 1218 1219 bar = efx->type->mem_bar; 1220 1221 rc = pci_enable_device(pci_dev); 1222 if (rc) { 1223 netif_err(efx, probe, efx->net_dev, 1224 "failed to enable PCI device\n"); 1225 goto fail1; 1226 } 1227 1228 pci_set_master(pci_dev); 1229 1230 /* Set the PCI DMA mask. Try all possibilities from our 1231 * genuine mask down to 32 bits, because some architectures 1232 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit 1233 * masks event though they reject 46 bit masks. 1234 */ 1235 while (dma_mask > 0x7fffffffUL) { 1236 if (dma_supported(&pci_dev->dev, dma_mask)) { 1237 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask); 1238 if (rc == 0) 1239 break; 1240 } 1241 dma_mask >>= 1; 1242 } 1243 if (rc) { 1244 netif_err(efx, probe, efx->net_dev, 1245 "could not find a suitable DMA mask\n"); 1246 goto fail2; 1247 } 1248 netif_dbg(efx, probe, efx->net_dev, 1249 "using DMA mask %llx\n", (unsigned long long) dma_mask); 1250 1251 efx->membase_phys = pci_resource_start(efx->pci_dev, bar); 1252 rc = pci_request_region(pci_dev, bar, "sfc"); 1253 if (rc) { 1254 netif_err(efx, probe, efx->net_dev, 1255 "request for memory BAR failed\n"); 1256 rc = -EIO; 1257 goto fail3; 1258 } 1259 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size); 1260 if (!efx->membase) { 1261 netif_err(efx, probe, efx->net_dev, 1262 "could not map memory BAR at %llx+%x\n", 1263 (unsigned long long)efx->membase_phys, mem_map_size); 1264 rc = -ENOMEM; 1265 goto fail4; 1266 } 1267 netif_dbg(efx, probe, efx->net_dev, 1268 "memory BAR at %llx+%x (virtual %p)\n", 1269 (unsigned long long)efx->membase_phys, mem_map_size, 1270 efx->membase); 1271 1272 return 0; 1273 1274 fail4: 1275 pci_release_region(efx->pci_dev, bar); 1276 fail3: 1277 efx->membase_phys = 0; 1278 fail2: 1279 pci_disable_device(efx->pci_dev); 1280 fail1: 1281 return rc; 1282 } 1283 1284 static void efx_fini_io(struct efx_nic *efx) 1285 { 1286 int bar; 1287 1288 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n"); 1289 1290 if (efx->membase) { 1291 iounmap(efx->membase); 1292 efx->membase = NULL; 1293 } 1294 1295 if (efx->membase_phys) { 1296 bar = efx->type->mem_bar; 1297 pci_release_region(efx->pci_dev, bar); 1298 efx->membase_phys = 0; 1299 } 1300 1301 /* Don't disable bus-mastering if VFs are assigned */ 1302 if (!pci_vfs_assigned(efx->pci_dev)) 1303 pci_disable_device(efx->pci_dev); 1304 } 1305 1306 void efx_set_default_rx_indir_table(struct efx_nic *efx) 1307 { 1308 size_t i; 1309 1310 for (i = 0; i < ARRAY_SIZE(efx->rx_indir_table); i++) 1311 efx->rx_indir_table[i] = 1312 ethtool_rxfh_indir_default(i, efx->rss_spread); 1313 } 1314 1315 static unsigned int efx_wanted_parallelism(struct efx_nic *efx) 1316 { 1317 cpumask_var_t thread_mask; 1318 unsigned int count; 1319 int cpu; 1320 1321 if (rss_cpus) { 1322 count = rss_cpus; 1323 } else { 1324 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) { 1325 netif_warn(efx, probe, efx->net_dev, 1326 "RSS disabled due to allocation failure\n"); 1327 return 1; 1328 } 1329 1330 count = 0; 1331 for_each_online_cpu(cpu) { 1332 if (!cpumask_test_cpu(cpu, thread_mask)) { 1333 ++count; 1334 cpumask_or(thread_mask, thread_mask, 1335 topology_sibling_cpumask(cpu)); 1336 } 1337 } 1338 1339 free_cpumask_var(thread_mask); 1340 } 1341 1342 /* If RSS is requested for the PF *and* VFs then we can't write RSS 1343 * table entries that are inaccessible to VFs 1344 */ 1345 #ifdef CONFIG_SFC_SRIOV 1346 if (efx->type->sriov_wanted) { 1347 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 && 1348 count > efx_vf_size(efx)) { 1349 netif_warn(efx, probe, efx->net_dev, 1350 "Reducing number of RSS channels from %u to %u for " 1351 "VF support. Increase vf-msix-limit to use more " 1352 "channels on the PF.\n", 1353 count, efx_vf_size(efx)); 1354 count = efx_vf_size(efx); 1355 } 1356 } 1357 #endif 1358 1359 return count; 1360 } 1361 1362 /* Probe the number and type of interrupts we are able to obtain, and 1363 * the resulting numbers of channels and RX queues. 1364 */ 1365 static int efx_probe_interrupts(struct efx_nic *efx) 1366 { 1367 unsigned int extra_channels = 0; 1368 unsigned int i, j; 1369 int rc; 1370 1371 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) 1372 if (efx->extra_channel_type[i]) 1373 ++extra_channels; 1374 1375 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) { 1376 struct msix_entry xentries[EFX_MAX_CHANNELS]; 1377 unsigned int n_channels; 1378 1379 n_channels = efx_wanted_parallelism(efx); 1380 if (separate_tx_channels) 1381 n_channels *= 2; 1382 n_channels += extra_channels; 1383 n_channels = min(n_channels, efx->max_channels); 1384 1385 for (i = 0; i < n_channels; i++) 1386 xentries[i].entry = i; 1387 rc = pci_enable_msix_range(efx->pci_dev, 1388 xentries, 1, n_channels); 1389 if (rc < 0) { 1390 /* Fall back to single channel MSI */ 1391 efx->interrupt_mode = EFX_INT_MODE_MSI; 1392 netif_err(efx, drv, efx->net_dev, 1393 "could not enable MSI-X\n"); 1394 } else if (rc < n_channels) { 1395 netif_err(efx, drv, efx->net_dev, 1396 "WARNING: Insufficient MSI-X vectors" 1397 " available (%d < %u).\n", rc, n_channels); 1398 netif_err(efx, drv, efx->net_dev, 1399 "WARNING: Performance may be reduced.\n"); 1400 n_channels = rc; 1401 } 1402 1403 if (rc > 0) { 1404 efx->n_channels = n_channels; 1405 if (n_channels > extra_channels) 1406 n_channels -= extra_channels; 1407 if (separate_tx_channels) { 1408 efx->n_tx_channels = max(n_channels / 2, 1U); 1409 efx->n_rx_channels = max(n_channels - 1410 efx->n_tx_channels, 1411 1U); 1412 } else { 1413 efx->n_tx_channels = n_channels; 1414 efx->n_rx_channels = n_channels; 1415 } 1416 for (i = 0; i < efx->n_channels; i++) 1417 efx_get_channel(efx, i)->irq = 1418 xentries[i].vector; 1419 } 1420 } 1421 1422 /* Try single interrupt MSI */ 1423 if (efx->interrupt_mode == EFX_INT_MODE_MSI) { 1424 efx->n_channels = 1; 1425 efx->n_rx_channels = 1; 1426 efx->n_tx_channels = 1; 1427 rc = pci_enable_msi(efx->pci_dev); 1428 if (rc == 0) { 1429 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq; 1430 } else { 1431 netif_err(efx, drv, efx->net_dev, 1432 "could not enable MSI\n"); 1433 efx->interrupt_mode = EFX_INT_MODE_LEGACY; 1434 } 1435 } 1436 1437 /* Assume legacy interrupts */ 1438 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) { 1439 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0); 1440 efx->n_rx_channels = 1; 1441 efx->n_tx_channels = 1; 1442 efx->legacy_irq = efx->pci_dev->irq; 1443 } 1444 1445 /* Assign extra channels if possible */ 1446 j = efx->n_channels; 1447 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) { 1448 if (!efx->extra_channel_type[i]) 1449 continue; 1450 if (efx->interrupt_mode != EFX_INT_MODE_MSIX || 1451 efx->n_channels <= extra_channels) { 1452 efx->extra_channel_type[i]->handle_no_channel(efx); 1453 } else { 1454 --j; 1455 efx_get_channel(efx, j)->type = 1456 efx->extra_channel_type[i]; 1457 } 1458 } 1459 1460 /* RSS might be usable on VFs even if it is disabled on the PF */ 1461 #ifdef CONFIG_SFC_SRIOV 1462 if (efx->type->sriov_wanted) { 1463 efx->rss_spread = ((efx->n_rx_channels > 1 || 1464 !efx->type->sriov_wanted(efx)) ? 1465 efx->n_rx_channels : efx_vf_size(efx)); 1466 return 0; 1467 } 1468 #endif 1469 efx->rss_spread = efx->n_rx_channels; 1470 1471 return 0; 1472 } 1473 1474 static int efx_soft_enable_interrupts(struct efx_nic *efx) 1475 { 1476 struct efx_channel *channel, *end_channel; 1477 int rc; 1478 1479 BUG_ON(efx->state == STATE_DISABLED); 1480 1481 efx->irq_soft_enabled = true; 1482 smp_wmb(); 1483 1484 efx_for_each_channel(channel, efx) { 1485 if (!channel->type->keep_eventq) { 1486 rc = efx_init_eventq(channel); 1487 if (rc) 1488 goto fail; 1489 } 1490 efx_start_eventq(channel); 1491 } 1492 1493 efx_mcdi_mode_event(efx); 1494 1495 return 0; 1496 fail: 1497 end_channel = channel; 1498 efx_for_each_channel(channel, efx) { 1499 if (channel == end_channel) 1500 break; 1501 efx_stop_eventq(channel); 1502 if (!channel->type->keep_eventq) 1503 efx_fini_eventq(channel); 1504 } 1505 1506 return rc; 1507 } 1508 1509 static void efx_soft_disable_interrupts(struct efx_nic *efx) 1510 { 1511 struct efx_channel *channel; 1512 1513 if (efx->state == STATE_DISABLED) 1514 return; 1515 1516 efx_mcdi_mode_poll(efx); 1517 1518 efx->irq_soft_enabled = false; 1519 smp_wmb(); 1520 1521 if (efx->legacy_irq) 1522 synchronize_irq(efx->legacy_irq); 1523 1524 efx_for_each_channel(channel, efx) { 1525 if (channel->irq) 1526 synchronize_irq(channel->irq); 1527 1528 efx_stop_eventq(channel); 1529 if (!channel->type->keep_eventq) 1530 efx_fini_eventq(channel); 1531 } 1532 1533 /* Flush the asynchronous MCDI request queue */ 1534 efx_mcdi_flush_async(efx); 1535 } 1536 1537 static int efx_enable_interrupts(struct efx_nic *efx) 1538 { 1539 struct efx_channel *channel, *end_channel; 1540 int rc; 1541 1542 BUG_ON(efx->state == STATE_DISABLED); 1543 1544 if (efx->eeh_disabled_legacy_irq) { 1545 enable_irq(efx->legacy_irq); 1546 efx->eeh_disabled_legacy_irq = false; 1547 } 1548 1549 efx->type->irq_enable_master(efx); 1550 1551 efx_for_each_channel(channel, efx) { 1552 if (channel->type->keep_eventq) { 1553 rc = efx_init_eventq(channel); 1554 if (rc) 1555 goto fail; 1556 } 1557 } 1558 1559 rc = efx_soft_enable_interrupts(efx); 1560 if (rc) 1561 goto fail; 1562 1563 return 0; 1564 1565 fail: 1566 end_channel = channel; 1567 efx_for_each_channel(channel, efx) { 1568 if (channel == end_channel) 1569 break; 1570 if (channel->type->keep_eventq) 1571 efx_fini_eventq(channel); 1572 } 1573 1574 efx->type->irq_disable_non_ev(efx); 1575 1576 return rc; 1577 } 1578 1579 static void efx_disable_interrupts(struct efx_nic *efx) 1580 { 1581 struct efx_channel *channel; 1582 1583 efx_soft_disable_interrupts(efx); 1584 1585 efx_for_each_channel(channel, efx) { 1586 if (channel->type->keep_eventq) 1587 efx_fini_eventq(channel); 1588 } 1589 1590 efx->type->irq_disable_non_ev(efx); 1591 } 1592 1593 static void efx_remove_interrupts(struct efx_nic *efx) 1594 { 1595 struct efx_channel *channel; 1596 1597 /* Remove MSI/MSI-X interrupts */ 1598 efx_for_each_channel(channel, efx) 1599 channel->irq = 0; 1600 pci_disable_msi(efx->pci_dev); 1601 pci_disable_msix(efx->pci_dev); 1602 1603 /* Remove legacy interrupt */ 1604 efx->legacy_irq = 0; 1605 } 1606 1607 static void efx_set_channels(struct efx_nic *efx) 1608 { 1609 struct efx_channel *channel; 1610 struct efx_tx_queue *tx_queue; 1611 1612 efx->tx_channel_offset = 1613 separate_tx_channels ? efx->n_channels - efx->n_tx_channels : 0; 1614 1615 /* We need to mark which channels really have RX and TX 1616 * queues, and adjust the TX queue numbers if we have separate 1617 * RX-only and TX-only channels. 1618 */ 1619 efx_for_each_channel(channel, efx) { 1620 if (channel->channel < efx->n_rx_channels) 1621 channel->rx_queue.core_index = channel->channel; 1622 else 1623 channel->rx_queue.core_index = -1; 1624 1625 efx_for_each_channel_tx_queue(tx_queue, channel) 1626 tx_queue->queue -= (efx->tx_channel_offset * 1627 EFX_TXQ_TYPES); 1628 } 1629 } 1630 1631 static int efx_probe_nic(struct efx_nic *efx) 1632 { 1633 int rc; 1634 1635 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n"); 1636 1637 /* Carry out hardware-type specific initialisation */ 1638 rc = efx->type->probe(efx); 1639 if (rc) 1640 return rc; 1641 1642 /* Determine the number of channels and queues by trying to hook 1643 * in MSI-X interrupts. */ 1644 rc = efx_probe_interrupts(efx); 1645 if (rc) 1646 goto fail1; 1647 1648 efx_set_channels(efx); 1649 1650 rc = efx->type->dimension_resources(efx); 1651 if (rc) 1652 goto fail2; 1653 1654 if (efx->n_channels > 1) 1655 netdev_rss_key_fill(&efx->rx_hash_key, 1656 sizeof(efx->rx_hash_key)); 1657 efx_set_default_rx_indir_table(efx); 1658 1659 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels); 1660 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels); 1661 1662 /* Initialise the interrupt moderation settings */ 1663 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true, 1664 true); 1665 1666 return 0; 1667 1668 fail2: 1669 efx_remove_interrupts(efx); 1670 fail1: 1671 efx->type->remove(efx); 1672 return rc; 1673 } 1674 1675 static void efx_remove_nic(struct efx_nic *efx) 1676 { 1677 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n"); 1678 1679 efx_remove_interrupts(efx); 1680 efx->type->remove(efx); 1681 } 1682 1683 static int efx_probe_filters(struct efx_nic *efx) 1684 { 1685 int rc; 1686 1687 spin_lock_init(&efx->filter_lock); 1688 init_rwsem(&efx->filter_sem); 1689 down_write(&efx->filter_sem); 1690 rc = efx->type->filter_table_probe(efx); 1691 if (rc) 1692 goto out_unlock; 1693 1694 #ifdef CONFIG_RFS_ACCEL 1695 if (efx->type->offload_features & NETIF_F_NTUPLE) { 1696 efx->rps_flow_id = kcalloc(efx->type->max_rx_ip_filters, 1697 sizeof(*efx->rps_flow_id), 1698 GFP_KERNEL); 1699 if (!efx->rps_flow_id) { 1700 efx->type->filter_table_remove(efx); 1701 rc = -ENOMEM; 1702 goto out_unlock; 1703 } 1704 } 1705 #endif 1706 out_unlock: 1707 up_write(&efx->filter_sem); 1708 return rc; 1709 } 1710 1711 static void efx_remove_filters(struct efx_nic *efx) 1712 { 1713 #ifdef CONFIG_RFS_ACCEL 1714 kfree(efx->rps_flow_id); 1715 #endif 1716 down_write(&efx->filter_sem); 1717 efx->type->filter_table_remove(efx); 1718 up_write(&efx->filter_sem); 1719 } 1720 1721 static void efx_restore_filters(struct efx_nic *efx) 1722 { 1723 down_read(&efx->filter_sem); 1724 efx->type->filter_table_restore(efx); 1725 up_read(&efx->filter_sem); 1726 } 1727 1728 /************************************************************************** 1729 * 1730 * NIC startup/shutdown 1731 * 1732 *************************************************************************/ 1733 1734 static int efx_probe_all(struct efx_nic *efx) 1735 { 1736 int rc; 1737 1738 rc = efx_probe_nic(efx); 1739 if (rc) { 1740 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n"); 1741 goto fail1; 1742 } 1743 1744 rc = efx_probe_port(efx); 1745 if (rc) { 1746 netif_err(efx, probe, efx->net_dev, "failed to create port\n"); 1747 goto fail2; 1748 } 1749 1750 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT); 1751 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) { 1752 rc = -EINVAL; 1753 goto fail3; 1754 } 1755 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE; 1756 1757 #ifdef CONFIG_SFC_SRIOV 1758 rc = efx->type->vswitching_probe(efx); 1759 if (rc) /* not fatal; the PF will still work fine */ 1760 netif_warn(efx, probe, efx->net_dev, 1761 "failed to setup vswitching rc=%d;" 1762 " VFs may not function\n", rc); 1763 #endif 1764 1765 rc = efx_probe_filters(efx); 1766 if (rc) { 1767 netif_err(efx, probe, efx->net_dev, 1768 "failed to create filter tables\n"); 1769 goto fail4; 1770 } 1771 1772 rc = efx_probe_channels(efx); 1773 if (rc) 1774 goto fail5; 1775 1776 return 0; 1777 1778 fail5: 1779 efx_remove_filters(efx); 1780 fail4: 1781 #ifdef CONFIG_SFC_SRIOV 1782 efx->type->vswitching_remove(efx); 1783 #endif 1784 fail3: 1785 efx_remove_port(efx); 1786 fail2: 1787 efx_remove_nic(efx); 1788 fail1: 1789 return rc; 1790 } 1791 1792 /* If the interface is supposed to be running but is not, start 1793 * the hardware and software data path, regular activity for the port 1794 * (MAC statistics, link polling, etc.) and schedule the port to be 1795 * reconfigured. Interrupts must already be enabled. This function 1796 * is safe to call multiple times, so long as the NIC is not disabled. 1797 * Requires the RTNL lock. 1798 */ 1799 static void efx_start_all(struct efx_nic *efx) 1800 { 1801 EFX_ASSERT_RESET_SERIALISED(efx); 1802 BUG_ON(efx->state == STATE_DISABLED); 1803 1804 /* Check that it is appropriate to restart the interface. All 1805 * of these flags are safe to read under just the rtnl lock */ 1806 if (efx->port_enabled || !netif_running(efx->net_dev) || 1807 efx->reset_pending) 1808 return; 1809 1810 efx_start_port(efx); 1811 efx_start_datapath(efx); 1812 1813 /* Start the hardware monitor if there is one */ 1814 if (efx->type->monitor != NULL) 1815 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1816 efx_monitor_interval); 1817 1818 /* If link state detection is normally event-driven, we have 1819 * to poll now because we could have missed a change 1820 */ 1821 if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) { 1822 mutex_lock(&efx->mac_lock); 1823 if (efx->phy_op->poll(efx)) 1824 efx_link_status_changed(efx); 1825 mutex_unlock(&efx->mac_lock); 1826 } 1827 1828 efx->type->start_stats(efx); 1829 efx->type->pull_stats(efx); 1830 spin_lock_bh(&efx->stats_lock); 1831 efx->type->update_stats(efx, NULL, NULL); 1832 spin_unlock_bh(&efx->stats_lock); 1833 } 1834 1835 /* Quiesce the hardware and software data path, and regular activity 1836 * for the port without bringing the link down. Safe to call multiple 1837 * times with the NIC in almost any state, but interrupts should be 1838 * enabled. Requires the RTNL lock. 1839 */ 1840 static void efx_stop_all(struct efx_nic *efx) 1841 { 1842 EFX_ASSERT_RESET_SERIALISED(efx); 1843 1844 /* port_enabled can be read safely under the rtnl lock */ 1845 if (!efx->port_enabled) 1846 return; 1847 1848 /* update stats before we go down so we can accurately count 1849 * rx_nodesc_drops 1850 */ 1851 efx->type->pull_stats(efx); 1852 spin_lock_bh(&efx->stats_lock); 1853 efx->type->update_stats(efx, NULL, NULL); 1854 spin_unlock_bh(&efx->stats_lock); 1855 efx->type->stop_stats(efx); 1856 efx_stop_port(efx); 1857 1858 /* Stop the kernel transmit interface. This is only valid if 1859 * the device is stopped or detached; otherwise the watchdog 1860 * may fire immediately. 1861 */ 1862 WARN_ON(netif_running(efx->net_dev) && 1863 netif_device_present(efx->net_dev)); 1864 netif_tx_disable(efx->net_dev); 1865 1866 efx_stop_datapath(efx); 1867 } 1868 1869 static void efx_remove_all(struct efx_nic *efx) 1870 { 1871 efx_remove_channels(efx); 1872 efx_remove_filters(efx); 1873 #ifdef CONFIG_SFC_SRIOV 1874 efx->type->vswitching_remove(efx); 1875 #endif 1876 efx_remove_port(efx); 1877 efx_remove_nic(efx); 1878 } 1879 1880 /************************************************************************** 1881 * 1882 * Interrupt moderation 1883 * 1884 **************************************************************************/ 1885 1886 static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns) 1887 { 1888 if (usecs == 0) 1889 return 0; 1890 if (usecs * 1000 < quantum_ns) 1891 return 1; /* never round down to 0 */ 1892 return usecs * 1000 / quantum_ns; 1893 } 1894 1895 /* Set interrupt moderation parameters */ 1896 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs, 1897 unsigned int rx_usecs, bool rx_adaptive, 1898 bool rx_may_override_tx) 1899 { 1900 struct efx_channel *channel; 1901 unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max * 1902 efx->timer_quantum_ns, 1903 1000); 1904 unsigned int tx_ticks; 1905 unsigned int rx_ticks; 1906 1907 EFX_ASSERT_RESET_SERIALISED(efx); 1908 1909 if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max) 1910 return -EINVAL; 1911 1912 tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns); 1913 rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns); 1914 1915 if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 && 1916 !rx_may_override_tx) { 1917 netif_err(efx, drv, efx->net_dev, "Channels are shared. " 1918 "RX and TX IRQ moderation must be equal\n"); 1919 return -EINVAL; 1920 } 1921 1922 efx->irq_rx_adaptive = rx_adaptive; 1923 efx->irq_rx_moderation = rx_ticks; 1924 efx_for_each_channel(channel, efx) { 1925 if (efx_channel_has_rx_queue(channel)) 1926 channel->irq_moderation = rx_ticks; 1927 else if (efx_channel_has_tx_queues(channel)) 1928 channel->irq_moderation = tx_ticks; 1929 } 1930 1931 return 0; 1932 } 1933 1934 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs, 1935 unsigned int *rx_usecs, bool *rx_adaptive) 1936 { 1937 /* We must round up when converting ticks to microseconds 1938 * because we round down when converting the other way. 1939 */ 1940 1941 *rx_adaptive = efx->irq_rx_adaptive; 1942 *rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation * 1943 efx->timer_quantum_ns, 1944 1000); 1945 1946 /* If channels are shared between RX and TX, so is IRQ 1947 * moderation. Otherwise, IRQ moderation is the same for all 1948 * TX channels and is not adaptive. 1949 */ 1950 if (efx->tx_channel_offset == 0) 1951 *tx_usecs = *rx_usecs; 1952 else 1953 *tx_usecs = DIV_ROUND_UP( 1954 efx->channel[efx->tx_channel_offset]->irq_moderation * 1955 efx->timer_quantum_ns, 1956 1000); 1957 } 1958 1959 /************************************************************************** 1960 * 1961 * Hardware monitor 1962 * 1963 **************************************************************************/ 1964 1965 /* Run periodically off the general workqueue */ 1966 static void efx_monitor(struct work_struct *data) 1967 { 1968 struct efx_nic *efx = container_of(data, struct efx_nic, 1969 monitor_work.work); 1970 1971 netif_vdbg(efx, timer, efx->net_dev, 1972 "hardware monitor executing on CPU %d\n", 1973 raw_smp_processor_id()); 1974 BUG_ON(efx->type->monitor == NULL); 1975 1976 /* If the mac_lock is already held then it is likely a port 1977 * reconfiguration is already in place, which will likely do 1978 * most of the work of monitor() anyway. */ 1979 if (mutex_trylock(&efx->mac_lock)) { 1980 if (efx->port_enabled) 1981 efx->type->monitor(efx); 1982 mutex_unlock(&efx->mac_lock); 1983 } 1984 1985 queue_delayed_work(efx->workqueue, &efx->monitor_work, 1986 efx_monitor_interval); 1987 } 1988 1989 /************************************************************************** 1990 * 1991 * ioctls 1992 * 1993 *************************************************************************/ 1994 1995 /* Net device ioctl 1996 * Context: process, rtnl_lock() held. 1997 */ 1998 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd) 1999 { 2000 struct efx_nic *efx = netdev_priv(net_dev); 2001 struct mii_ioctl_data *data = if_mii(ifr); 2002 2003 if (cmd == SIOCSHWTSTAMP) 2004 return efx_ptp_set_ts_config(efx, ifr); 2005 if (cmd == SIOCGHWTSTAMP) 2006 return efx_ptp_get_ts_config(efx, ifr); 2007 2008 /* Convert phy_id from older PRTAD/DEVAD format */ 2009 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) && 2010 (data->phy_id & 0xfc00) == 0x0400) 2011 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400; 2012 2013 return mdio_mii_ioctl(&efx->mdio, data, cmd); 2014 } 2015 2016 /************************************************************************** 2017 * 2018 * NAPI interface 2019 * 2020 **************************************************************************/ 2021 2022 static void efx_init_napi_channel(struct efx_channel *channel) 2023 { 2024 struct efx_nic *efx = channel->efx; 2025 2026 channel->napi_dev = efx->net_dev; 2027 netif_napi_add(channel->napi_dev, &channel->napi_str, 2028 efx_poll, napi_weight); 2029 napi_hash_add(&channel->napi_str); 2030 efx_channel_init_lock(channel); 2031 } 2032 2033 static void efx_init_napi(struct efx_nic *efx) 2034 { 2035 struct efx_channel *channel; 2036 2037 efx_for_each_channel(channel, efx) 2038 efx_init_napi_channel(channel); 2039 } 2040 2041 static void efx_fini_napi_channel(struct efx_channel *channel) 2042 { 2043 if (channel->napi_dev) { 2044 netif_napi_del(&channel->napi_str); 2045 napi_hash_del(&channel->napi_str); 2046 } 2047 channel->napi_dev = NULL; 2048 } 2049 2050 static void efx_fini_napi(struct efx_nic *efx) 2051 { 2052 struct efx_channel *channel; 2053 2054 efx_for_each_channel(channel, efx) 2055 efx_fini_napi_channel(channel); 2056 } 2057 2058 /************************************************************************** 2059 * 2060 * Kernel netpoll interface 2061 * 2062 *************************************************************************/ 2063 2064 #ifdef CONFIG_NET_POLL_CONTROLLER 2065 2066 /* Although in the common case interrupts will be disabled, this is not 2067 * guaranteed. However, all our work happens inside the NAPI callback, 2068 * so no locking is required. 2069 */ 2070 static void efx_netpoll(struct net_device *net_dev) 2071 { 2072 struct efx_nic *efx = netdev_priv(net_dev); 2073 struct efx_channel *channel; 2074 2075 efx_for_each_channel(channel, efx) 2076 efx_schedule_channel(channel); 2077 } 2078 2079 #endif 2080 2081 #ifdef CONFIG_NET_RX_BUSY_POLL 2082 static int efx_busy_poll(struct napi_struct *napi) 2083 { 2084 struct efx_channel *channel = 2085 container_of(napi, struct efx_channel, napi_str); 2086 struct efx_nic *efx = channel->efx; 2087 int budget = 4; 2088 int old_rx_packets, rx_packets; 2089 2090 if (!netif_running(efx->net_dev)) 2091 return LL_FLUSH_FAILED; 2092 2093 if (!efx_channel_lock_poll(channel)) 2094 return LL_FLUSH_BUSY; 2095 2096 old_rx_packets = channel->rx_queue.rx_packets; 2097 efx_process_channel(channel, budget); 2098 2099 rx_packets = channel->rx_queue.rx_packets - old_rx_packets; 2100 2101 /* There is no race condition with NAPI here. 2102 * NAPI will automatically be rescheduled if it yielded during busy 2103 * polling, because it was not able to take the lock and thus returned 2104 * the full budget. 2105 */ 2106 efx_channel_unlock_poll(channel); 2107 2108 return rx_packets; 2109 } 2110 #endif 2111 2112 /************************************************************************** 2113 * 2114 * Kernel net device interface 2115 * 2116 *************************************************************************/ 2117 2118 /* Context: process, rtnl_lock() held. */ 2119 int efx_net_open(struct net_device *net_dev) 2120 { 2121 struct efx_nic *efx = netdev_priv(net_dev); 2122 int rc; 2123 2124 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n", 2125 raw_smp_processor_id()); 2126 2127 rc = efx_check_disabled(efx); 2128 if (rc) 2129 return rc; 2130 if (efx->phy_mode & PHY_MODE_SPECIAL) 2131 return -EBUSY; 2132 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL)) 2133 return -EIO; 2134 2135 /* Notify the kernel of the link state polled during driver load, 2136 * before the monitor starts running */ 2137 efx_link_status_changed(efx); 2138 2139 efx_start_all(efx); 2140 efx_selftest_async_start(efx); 2141 return 0; 2142 } 2143 2144 /* Context: process, rtnl_lock() held. 2145 * Note that the kernel will ignore our return code; this method 2146 * should really be a void. 2147 */ 2148 int efx_net_stop(struct net_device *net_dev) 2149 { 2150 struct efx_nic *efx = netdev_priv(net_dev); 2151 2152 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n", 2153 raw_smp_processor_id()); 2154 2155 /* Stop the device and flush all the channels */ 2156 efx_stop_all(efx); 2157 2158 return 0; 2159 } 2160 2161 /* Context: process, dev_base_lock or RTNL held, non-blocking. */ 2162 static struct rtnl_link_stats64 *efx_net_stats(struct net_device *net_dev, 2163 struct rtnl_link_stats64 *stats) 2164 { 2165 struct efx_nic *efx = netdev_priv(net_dev); 2166 2167 spin_lock_bh(&efx->stats_lock); 2168 efx->type->update_stats(efx, NULL, stats); 2169 spin_unlock_bh(&efx->stats_lock); 2170 2171 return stats; 2172 } 2173 2174 /* Context: netif_tx_lock held, BHs disabled. */ 2175 static void efx_watchdog(struct net_device *net_dev) 2176 { 2177 struct efx_nic *efx = netdev_priv(net_dev); 2178 2179 netif_err(efx, tx_err, efx->net_dev, 2180 "TX stuck with port_enabled=%d: resetting channels\n", 2181 efx->port_enabled); 2182 2183 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG); 2184 } 2185 2186 2187 /* Context: process, rtnl_lock() held. */ 2188 static int efx_change_mtu(struct net_device *net_dev, int new_mtu) 2189 { 2190 struct efx_nic *efx = netdev_priv(net_dev); 2191 int rc; 2192 2193 rc = efx_check_disabled(efx); 2194 if (rc) 2195 return rc; 2196 if (new_mtu > EFX_MAX_MTU) 2197 return -EINVAL; 2198 2199 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu); 2200 2201 efx_device_detach_sync(efx); 2202 efx_stop_all(efx); 2203 2204 mutex_lock(&efx->mac_lock); 2205 net_dev->mtu = new_mtu; 2206 efx_mac_reconfigure(efx); 2207 mutex_unlock(&efx->mac_lock); 2208 2209 efx_start_all(efx); 2210 netif_device_attach(efx->net_dev); 2211 return 0; 2212 } 2213 2214 static int efx_set_mac_address(struct net_device *net_dev, void *data) 2215 { 2216 struct efx_nic *efx = netdev_priv(net_dev); 2217 struct sockaddr *addr = data; 2218 u8 *new_addr = addr->sa_data; 2219 u8 old_addr[6]; 2220 int rc; 2221 2222 if (!is_valid_ether_addr(new_addr)) { 2223 netif_err(efx, drv, efx->net_dev, 2224 "invalid ethernet MAC address requested: %pM\n", 2225 new_addr); 2226 return -EADDRNOTAVAIL; 2227 } 2228 2229 /* save old address */ 2230 ether_addr_copy(old_addr, net_dev->dev_addr); 2231 ether_addr_copy(net_dev->dev_addr, new_addr); 2232 if (efx->type->set_mac_address) { 2233 rc = efx->type->set_mac_address(efx); 2234 if (rc) { 2235 ether_addr_copy(net_dev->dev_addr, old_addr); 2236 return rc; 2237 } 2238 } 2239 2240 /* Reconfigure the MAC */ 2241 mutex_lock(&efx->mac_lock); 2242 efx_mac_reconfigure(efx); 2243 mutex_unlock(&efx->mac_lock); 2244 2245 return 0; 2246 } 2247 2248 /* Context: netif_addr_lock held, BHs disabled. */ 2249 static void efx_set_rx_mode(struct net_device *net_dev) 2250 { 2251 struct efx_nic *efx = netdev_priv(net_dev); 2252 2253 if (efx->port_enabled) 2254 queue_work(efx->workqueue, &efx->mac_work); 2255 /* Otherwise efx_start_port() will do this */ 2256 } 2257 2258 static int efx_set_features(struct net_device *net_dev, netdev_features_t data) 2259 { 2260 struct efx_nic *efx = netdev_priv(net_dev); 2261 2262 /* If disabling RX n-tuple filtering, clear existing filters */ 2263 if (net_dev->features & ~data & NETIF_F_NTUPLE) 2264 return efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL); 2265 2266 return 0; 2267 } 2268 2269 static const struct net_device_ops efx_netdev_ops = { 2270 .ndo_open = efx_net_open, 2271 .ndo_stop = efx_net_stop, 2272 .ndo_get_stats64 = efx_net_stats, 2273 .ndo_tx_timeout = efx_watchdog, 2274 .ndo_start_xmit = efx_hard_start_xmit, 2275 .ndo_validate_addr = eth_validate_addr, 2276 .ndo_do_ioctl = efx_ioctl, 2277 .ndo_change_mtu = efx_change_mtu, 2278 .ndo_set_mac_address = efx_set_mac_address, 2279 .ndo_set_rx_mode = efx_set_rx_mode, 2280 .ndo_set_features = efx_set_features, 2281 #ifdef CONFIG_SFC_SRIOV 2282 .ndo_set_vf_mac = efx_sriov_set_vf_mac, 2283 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan, 2284 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk, 2285 .ndo_get_vf_config = efx_sriov_get_vf_config, 2286 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state, 2287 .ndo_get_phys_port_id = efx_sriov_get_phys_port_id, 2288 #endif 2289 #ifdef CONFIG_NET_POLL_CONTROLLER 2290 .ndo_poll_controller = efx_netpoll, 2291 #endif 2292 .ndo_setup_tc = efx_setup_tc, 2293 #ifdef CONFIG_NET_RX_BUSY_POLL 2294 .ndo_busy_poll = efx_busy_poll, 2295 #endif 2296 #ifdef CONFIG_RFS_ACCEL 2297 .ndo_rx_flow_steer = efx_filter_rfs, 2298 #endif 2299 }; 2300 2301 static void efx_update_name(struct efx_nic *efx) 2302 { 2303 strcpy(efx->name, efx->net_dev->name); 2304 efx_mtd_rename(efx); 2305 efx_set_channel_names(efx); 2306 } 2307 2308 static int efx_netdev_event(struct notifier_block *this, 2309 unsigned long event, void *ptr) 2310 { 2311 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr); 2312 2313 if ((net_dev->netdev_ops == &efx_netdev_ops) && 2314 event == NETDEV_CHANGENAME) 2315 efx_update_name(netdev_priv(net_dev)); 2316 2317 return NOTIFY_DONE; 2318 } 2319 2320 static struct notifier_block efx_netdev_notifier = { 2321 .notifier_call = efx_netdev_event, 2322 }; 2323 2324 static ssize_t 2325 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf) 2326 { 2327 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2328 return sprintf(buf, "%d\n", efx->phy_type); 2329 } 2330 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL); 2331 2332 #ifdef CONFIG_SFC_MCDI_LOGGING 2333 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr, 2334 char *buf) 2335 { 2336 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2337 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 2338 2339 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled); 2340 } 2341 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr, 2342 const char *buf, size_t count) 2343 { 2344 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 2345 struct efx_mcdi_iface *mcdi = efx_mcdi(efx); 2346 bool enable = count > 0 && *buf != '0'; 2347 2348 mcdi->logging_enabled = enable; 2349 return count; 2350 } 2351 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log); 2352 #endif 2353 2354 static int efx_register_netdev(struct efx_nic *efx) 2355 { 2356 struct net_device *net_dev = efx->net_dev; 2357 struct efx_channel *channel; 2358 int rc; 2359 2360 net_dev->watchdog_timeo = 5 * HZ; 2361 net_dev->irq = efx->pci_dev->irq; 2362 net_dev->netdev_ops = &efx_netdev_ops; 2363 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) 2364 net_dev->priv_flags |= IFF_UNICAST_FLT; 2365 net_dev->ethtool_ops = &efx_ethtool_ops; 2366 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS; 2367 2368 rtnl_lock(); 2369 2370 /* Enable resets to be scheduled and check whether any were 2371 * already requested. If so, the NIC is probably hosed so we 2372 * abort. 2373 */ 2374 efx->state = STATE_READY; 2375 smp_mb(); /* ensure we change state before checking reset_pending */ 2376 if (efx->reset_pending) { 2377 netif_err(efx, probe, efx->net_dev, 2378 "aborting probe due to scheduled reset\n"); 2379 rc = -EIO; 2380 goto fail_locked; 2381 } 2382 2383 rc = dev_alloc_name(net_dev, net_dev->name); 2384 if (rc < 0) 2385 goto fail_locked; 2386 efx_update_name(efx); 2387 2388 /* Always start with carrier off; PHY events will detect the link */ 2389 netif_carrier_off(net_dev); 2390 2391 rc = register_netdevice(net_dev); 2392 if (rc) 2393 goto fail_locked; 2394 2395 efx_for_each_channel(channel, efx) { 2396 struct efx_tx_queue *tx_queue; 2397 efx_for_each_channel_tx_queue(tx_queue, channel) 2398 efx_init_tx_queue_core_txq(tx_queue); 2399 } 2400 2401 efx_associate(efx); 2402 2403 rtnl_unlock(); 2404 2405 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2406 if (rc) { 2407 netif_err(efx, drv, efx->net_dev, 2408 "failed to init net dev attributes\n"); 2409 goto fail_registered; 2410 } 2411 #ifdef CONFIG_SFC_MCDI_LOGGING 2412 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging); 2413 if (rc) { 2414 netif_err(efx, drv, efx->net_dev, 2415 "failed to init net dev attributes\n"); 2416 goto fail_attr_mcdi_logging; 2417 } 2418 #endif 2419 2420 return 0; 2421 2422 #ifdef CONFIG_SFC_MCDI_LOGGING 2423 fail_attr_mcdi_logging: 2424 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2425 #endif 2426 fail_registered: 2427 rtnl_lock(); 2428 efx_dissociate(efx); 2429 unregister_netdevice(net_dev); 2430 fail_locked: 2431 efx->state = STATE_UNINIT; 2432 rtnl_unlock(); 2433 netif_err(efx, drv, efx->net_dev, "could not register net dev\n"); 2434 return rc; 2435 } 2436 2437 static void efx_unregister_netdev(struct efx_nic *efx) 2438 { 2439 if (!efx->net_dev) 2440 return; 2441 2442 BUG_ON(netdev_priv(efx->net_dev) != efx); 2443 2444 if (efx_dev_registered(efx)) { 2445 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name)); 2446 #ifdef CONFIG_SFC_MCDI_LOGGING 2447 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging); 2448 #endif 2449 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type); 2450 unregister_netdev(efx->net_dev); 2451 } 2452 } 2453 2454 /************************************************************************** 2455 * 2456 * Device reset and suspend 2457 * 2458 **************************************************************************/ 2459 2460 /* Tears down the entire software state and most of the hardware state 2461 * before reset. */ 2462 void efx_reset_down(struct efx_nic *efx, enum reset_type method) 2463 { 2464 EFX_ASSERT_RESET_SERIALISED(efx); 2465 2466 if (method == RESET_TYPE_MCDI_TIMEOUT) 2467 efx->type->prepare_flr(efx); 2468 2469 efx_stop_all(efx); 2470 efx_disable_interrupts(efx); 2471 2472 mutex_lock(&efx->mac_lock); 2473 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && 2474 method != RESET_TYPE_DATAPATH) 2475 efx->phy_op->fini(efx); 2476 efx->type->fini(efx); 2477 } 2478 2479 /* This function will always ensure that the locks acquired in 2480 * efx_reset_down() are released. A failure return code indicates 2481 * that we were unable to reinitialise the hardware, and the 2482 * driver should be disabled. If ok is false, then the rx and tx 2483 * engines are not restarted, pending a RESET_DISABLE. */ 2484 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok) 2485 { 2486 int rc; 2487 2488 EFX_ASSERT_RESET_SERIALISED(efx); 2489 2490 if (method == RESET_TYPE_MCDI_TIMEOUT) 2491 efx->type->finish_flr(efx); 2492 2493 /* Ensure that SRAM is initialised even if we're disabling the device */ 2494 rc = efx->type->init(efx); 2495 if (rc) { 2496 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n"); 2497 goto fail; 2498 } 2499 2500 if (!ok) 2501 goto fail; 2502 2503 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE && 2504 method != RESET_TYPE_DATAPATH) { 2505 rc = efx->phy_op->init(efx); 2506 if (rc) 2507 goto fail; 2508 rc = efx->phy_op->reconfigure(efx); 2509 if (rc && rc != -EPERM) 2510 netif_err(efx, drv, efx->net_dev, 2511 "could not restore PHY settings\n"); 2512 } 2513 2514 rc = efx_enable_interrupts(efx); 2515 if (rc) 2516 goto fail; 2517 2518 #ifdef CONFIG_SFC_SRIOV 2519 rc = efx->type->vswitching_restore(efx); 2520 if (rc) /* not fatal; the PF will still work fine */ 2521 netif_warn(efx, probe, efx->net_dev, 2522 "failed to restore vswitching rc=%d;" 2523 " VFs may not function\n", rc); 2524 #endif 2525 2526 down_read(&efx->filter_sem); 2527 efx_restore_filters(efx); 2528 up_read(&efx->filter_sem); 2529 if (efx->type->sriov_reset) 2530 efx->type->sriov_reset(efx); 2531 2532 mutex_unlock(&efx->mac_lock); 2533 2534 efx_start_all(efx); 2535 2536 return 0; 2537 2538 fail: 2539 efx->port_initialized = false; 2540 2541 mutex_unlock(&efx->mac_lock); 2542 2543 return rc; 2544 } 2545 2546 /* Reset the NIC using the specified method. Note that the reset may 2547 * fail, in which case the card will be left in an unusable state. 2548 * 2549 * Caller must hold the rtnl_lock. 2550 */ 2551 int efx_reset(struct efx_nic *efx, enum reset_type method) 2552 { 2553 int rc, rc2; 2554 bool disabled; 2555 2556 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n", 2557 RESET_TYPE(method)); 2558 2559 efx_device_detach_sync(efx); 2560 efx_reset_down(efx, method); 2561 2562 rc = efx->type->reset(efx, method); 2563 if (rc) { 2564 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n"); 2565 goto out; 2566 } 2567 2568 /* Clear flags for the scopes we covered. We assume the NIC and 2569 * driver are now quiescent so that there is no race here. 2570 */ 2571 if (method < RESET_TYPE_MAX_METHOD) 2572 efx->reset_pending &= -(1 << (method + 1)); 2573 else /* it doesn't fit into the well-ordered scope hierarchy */ 2574 __clear_bit(method, &efx->reset_pending); 2575 2576 /* Reinitialise bus-mastering, which may have been turned off before 2577 * the reset was scheduled. This is still appropriate, even in the 2578 * RESET_TYPE_DISABLE since this driver generally assumes the hardware 2579 * can respond to requests. */ 2580 pci_set_master(efx->pci_dev); 2581 2582 out: 2583 /* Leave device stopped if necessary */ 2584 disabled = rc || 2585 method == RESET_TYPE_DISABLE || 2586 method == RESET_TYPE_RECOVER_OR_DISABLE; 2587 rc2 = efx_reset_up(efx, method, !disabled); 2588 if (rc2) { 2589 disabled = true; 2590 if (!rc) 2591 rc = rc2; 2592 } 2593 2594 if (disabled) { 2595 dev_close(efx->net_dev); 2596 netif_err(efx, drv, efx->net_dev, "has been disabled\n"); 2597 efx->state = STATE_DISABLED; 2598 } else { 2599 netif_dbg(efx, drv, efx->net_dev, "reset complete\n"); 2600 netif_device_attach(efx->net_dev); 2601 } 2602 return rc; 2603 } 2604 2605 /* Try recovery mechanisms. 2606 * For now only EEH is supported. 2607 * Returns 0 if the recovery mechanisms are unsuccessful. 2608 * Returns a non-zero value otherwise. 2609 */ 2610 int efx_try_recovery(struct efx_nic *efx) 2611 { 2612 #ifdef CONFIG_EEH 2613 /* A PCI error can occur and not be seen by EEH because nothing 2614 * happens on the PCI bus. In this case the driver may fail and 2615 * schedule a 'recover or reset', leading to this recovery handler. 2616 * Manually call the eeh failure check function. 2617 */ 2618 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev); 2619 if (eeh_dev_check_failure(eehdev)) { 2620 /* The EEH mechanisms will handle the error and reset the 2621 * device if necessary. 2622 */ 2623 return 1; 2624 } 2625 #endif 2626 return 0; 2627 } 2628 2629 static void efx_wait_for_bist_end(struct efx_nic *efx) 2630 { 2631 int i; 2632 2633 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) { 2634 if (efx_mcdi_poll_reboot(efx)) 2635 goto out; 2636 msleep(BIST_WAIT_DELAY_MS); 2637 } 2638 2639 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n"); 2640 out: 2641 /* Either way unset the BIST flag. If we found no reboot we probably 2642 * won't recover, but we should try. 2643 */ 2644 efx->mc_bist_for_other_fn = false; 2645 } 2646 2647 /* The worker thread exists so that code that cannot sleep can 2648 * schedule a reset for later. 2649 */ 2650 static void efx_reset_work(struct work_struct *data) 2651 { 2652 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work); 2653 unsigned long pending; 2654 enum reset_type method; 2655 2656 pending = ACCESS_ONCE(efx->reset_pending); 2657 method = fls(pending) - 1; 2658 2659 if (method == RESET_TYPE_MC_BIST) 2660 efx_wait_for_bist_end(efx); 2661 2662 if ((method == RESET_TYPE_RECOVER_OR_DISABLE || 2663 method == RESET_TYPE_RECOVER_OR_ALL) && 2664 efx_try_recovery(efx)) 2665 return; 2666 2667 if (!pending) 2668 return; 2669 2670 rtnl_lock(); 2671 2672 /* We checked the state in efx_schedule_reset() but it may 2673 * have changed by now. Now that we have the RTNL lock, 2674 * it cannot change again. 2675 */ 2676 if (efx->state == STATE_READY) 2677 (void)efx_reset(efx, method); 2678 2679 rtnl_unlock(); 2680 } 2681 2682 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type) 2683 { 2684 enum reset_type method; 2685 2686 if (efx->state == STATE_RECOVERY) { 2687 netif_dbg(efx, drv, efx->net_dev, 2688 "recovering: skip scheduling %s reset\n", 2689 RESET_TYPE(type)); 2690 return; 2691 } 2692 2693 switch (type) { 2694 case RESET_TYPE_INVISIBLE: 2695 case RESET_TYPE_ALL: 2696 case RESET_TYPE_RECOVER_OR_ALL: 2697 case RESET_TYPE_WORLD: 2698 case RESET_TYPE_DISABLE: 2699 case RESET_TYPE_RECOVER_OR_DISABLE: 2700 case RESET_TYPE_DATAPATH: 2701 case RESET_TYPE_MC_BIST: 2702 case RESET_TYPE_MCDI_TIMEOUT: 2703 method = type; 2704 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n", 2705 RESET_TYPE(method)); 2706 break; 2707 default: 2708 method = efx->type->map_reset_reason(type); 2709 netif_dbg(efx, drv, efx->net_dev, 2710 "scheduling %s reset for %s\n", 2711 RESET_TYPE(method), RESET_TYPE(type)); 2712 break; 2713 } 2714 2715 set_bit(method, &efx->reset_pending); 2716 smp_mb(); /* ensure we change reset_pending before checking state */ 2717 2718 /* If we're not READY then just leave the flags set as the cue 2719 * to abort probing or reschedule the reset later. 2720 */ 2721 if (ACCESS_ONCE(efx->state) != STATE_READY) 2722 return; 2723 2724 /* efx_process_channel() will no longer read events once a 2725 * reset is scheduled. So switch back to poll'd MCDI completions. */ 2726 efx_mcdi_mode_poll(efx); 2727 2728 queue_work(reset_workqueue, &efx->reset_work); 2729 } 2730 2731 /************************************************************************** 2732 * 2733 * List of NICs we support 2734 * 2735 **************************************************************************/ 2736 2737 /* PCI device ID table */ 2738 static const struct pci_device_id efx_pci_table[] = { 2739 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2740 PCI_DEVICE_ID_SOLARFLARE_SFC4000A_0), 2741 .driver_data = (unsigned long) &falcon_a1_nic_type}, 2742 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 2743 PCI_DEVICE_ID_SOLARFLARE_SFC4000B), 2744 .driver_data = (unsigned long) &falcon_b0_nic_type}, 2745 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */ 2746 .driver_data = (unsigned long) &siena_a0_nic_type}, 2747 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */ 2748 .driver_data = (unsigned long) &siena_a0_nic_type}, 2749 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */ 2750 .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, 2751 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */ 2752 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type}, 2753 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */ 2754 .driver_data = (unsigned long) &efx_hunt_a0_nic_type}, 2755 {0} /* end of list */ 2756 }; 2757 2758 /************************************************************************** 2759 * 2760 * Dummy PHY/MAC operations 2761 * 2762 * Can be used for some unimplemented operations 2763 * Needed so all function pointers are valid and do not have to be tested 2764 * before use 2765 * 2766 **************************************************************************/ 2767 int efx_port_dummy_op_int(struct efx_nic *efx) 2768 { 2769 return 0; 2770 } 2771 void efx_port_dummy_op_void(struct efx_nic *efx) {} 2772 2773 static bool efx_port_dummy_op_poll(struct efx_nic *efx) 2774 { 2775 return false; 2776 } 2777 2778 static const struct efx_phy_operations efx_dummy_phy_operations = { 2779 .init = efx_port_dummy_op_int, 2780 .reconfigure = efx_port_dummy_op_int, 2781 .poll = efx_port_dummy_op_poll, 2782 .fini = efx_port_dummy_op_void, 2783 }; 2784 2785 /************************************************************************** 2786 * 2787 * Data housekeeping 2788 * 2789 **************************************************************************/ 2790 2791 /* This zeroes out and then fills in the invariants in a struct 2792 * efx_nic (including all sub-structures). 2793 */ 2794 static int efx_init_struct(struct efx_nic *efx, 2795 struct pci_dev *pci_dev, struct net_device *net_dev) 2796 { 2797 int i; 2798 2799 /* Initialise common structures */ 2800 INIT_LIST_HEAD(&efx->node); 2801 INIT_LIST_HEAD(&efx->secondary_list); 2802 spin_lock_init(&efx->biu_lock); 2803 #ifdef CONFIG_SFC_MTD 2804 INIT_LIST_HEAD(&efx->mtd_list); 2805 #endif 2806 INIT_WORK(&efx->reset_work, efx_reset_work); 2807 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor); 2808 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work); 2809 efx->pci_dev = pci_dev; 2810 efx->msg_enable = debug; 2811 efx->state = STATE_UNINIT; 2812 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name)); 2813 2814 efx->net_dev = net_dev; 2815 efx->rx_prefix_size = efx->type->rx_prefix_size; 2816 efx->rx_ip_align = 2817 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0; 2818 efx->rx_packet_hash_offset = 2819 efx->type->rx_hash_offset - efx->type->rx_prefix_size; 2820 efx->rx_packet_ts_offset = 2821 efx->type->rx_ts_offset - efx->type->rx_prefix_size; 2822 spin_lock_init(&efx->stats_lock); 2823 mutex_init(&efx->mac_lock); 2824 efx->phy_op = &efx_dummy_phy_operations; 2825 efx->mdio.dev = net_dev; 2826 INIT_WORK(&efx->mac_work, efx_mac_work); 2827 init_waitqueue_head(&efx->flush_wq); 2828 2829 for (i = 0; i < EFX_MAX_CHANNELS; i++) { 2830 efx->channel[i] = efx_alloc_channel(efx, i, NULL); 2831 if (!efx->channel[i]) 2832 goto fail; 2833 efx->msi_context[i].efx = efx; 2834 efx->msi_context[i].index = i; 2835 } 2836 2837 /* Higher numbered interrupt modes are less capable! */ 2838 efx->interrupt_mode = max(efx->type->max_interrupt_mode, 2839 interrupt_mode); 2840 2841 /* Would be good to use the net_dev name, but we're too early */ 2842 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s", 2843 pci_name(pci_dev)); 2844 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name); 2845 if (!efx->workqueue) 2846 goto fail; 2847 2848 return 0; 2849 2850 fail: 2851 efx_fini_struct(efx); 2852 return -ENOMEM; 2853 } 2854 2855 static void efx_fini_struct(struct efx_nic *efx) 2856 { 2857 int i; 2858 2859 for (i = 0; i < EFX_MAX_CHANNELS; i++) 2860 kfree(efx->channel[i]); 2861 2862 kfree(efx->vpd_sn); 2863 2864 if (efx->workqueue) { 2865 destroy_workqueue(efx->workqueue); 2866 efx->workqueue = NULL; 2867 } 2868 } 2869 2870 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats) 2871 { 2872 u64 n_rx_nodesc_trunc = 0; 2873 struct efx_channel *channel; 2874 2875 efx_for_each_channel(channel, efx) 2876 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc; 2877 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc; 2878 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops); 2879 } 2880 2881 /************************************************************************** 2882 * 2883 * PCI interface 2884 * 2885 **************************************************************************/ 2886 2887 /* Main body of final NIC shutdown code 2888 * This is called only at module unload (or hotplug removal). 2889 */ 2890 static void efx_pci_remove_main(struct efx_nic *efx) 2891 { 2892 /* Flush reset_work. It can no longer be scheduled since we 2893 * are not READY. 2894 */ 2895 BUG_ON(efx->state == STATE_READY); 2896 cancel_work_sync(&efx->reset_work); 2897 2898 efx_disable_interrupts(efx); 2899 efx_nic_fini_interrupt(efx); 2900 efx_fini_port(efx); 2901 efx->type->fini(efx); 2902 efx_fini_napi(efx); 2903 efx_remove_all(efx); 2904 } 2905 2906 /* Final NIC shutdown 2907 * This is called only at module unload (or hotplug removal). A PF can call 2908 * this on its VFs to ensure they are unbound first. 2909 */ 2910 static void efx_pci_remove(struct pci_dev *pci_dev) 2911 { 2912 struct efx_nic *efx; 2913 2914 efx = pci_get_drvdata(pci_dev); 2915 if (!efx) 2916 return; 2917 2918 /* Mark the NIC as fini, then stop the interface */ 2919 rtnl_lock(); 2920 efx_dissociate(efx); 2921 dev_close(efx->net_dev); 2922 efx_disable_interrupts(efx); 2923 efx->state = STATE_UNINIT; 2924 rtnl_unlock(); 2925 2926 if (efx->type->sriov_fini) 2927 efx->type->sriov_fini(efx); 2928 2929 efx_unregister_netdev(efx); 2930 2931 efx_mtd_remove(efx); 2932 2933 efx_pci_remove_main(efx); 2934 2935 efx_fini_io(efx); 2936 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n"); 2937 2938 efx_fini_struct(efx); 2939 free_netdev(efx->net_dev); 2940 2941 pci_disable_pcie_error_reporting(pci_dev); 2942 }; 2943 2944 /* NIC VPD information 2945 * Called during probe to display the part number of the 2946 * installed NIC. VPD is potentially very large but this should 2947 * always appear within the first 512 bytes. 2948 */ 2949 #define SFC_VPD_LEN 512 2950 static void efx_probe_vpd_strings(struct efx_nic *efx) 2951 { 2952 struct pci_dev *dev = efx->pci_dev; 2953 char vpd_data[SFC_VPD_LEN]; 2954 ssize_t vpd_size; 2955 int ro_start, ro_size, i, j; 2956 2957 /* Get the vpd data from the device */ 2958 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data); 2959 if (vpd_size <= 0) { 2960 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n"); 2961 return; 2962 } 2963 2964 /* Get the Read only section */ 2965 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA); 2966 if (ro_start < 0) { 2967 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n"); 2968 return; 2969 } 2970 2971 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]); 2972 j = ro_size; 2973 i = ro_start + PCI_VPD_LRDT_TAG_SIZE; 2974 if (i + j > vpd_size) 2975 j = vpd_size - i; 2976 2977 /* Get the Part number */ 2978 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN"); 2979 if (i < 0) { 2980 netif_err(efx, drv, efx->net_dev, "Part number not found\n"); 2981 return; 2982 } 2983 2984 j = pci_vpd_info_field_size(&vpd_data[i]); 2985 i += PCI_VPD_INFO_FLD_HDR_SIZE; 2986 if (i + j > vpd_size) { 2987 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n"); 2988 return; 2989 } 2990 2991 netif_info(efx, drv, efx->net_dev, 2992 "Part Number : %.*s\n", j, &vpd_data[i]); 2993 2994 i = ro_start + PCI_VPD_LRDT_TAG_SIZE; 2995 j = ro_size; 2996 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN"); 2997 if (i < 0) { 2998 netif_err(efx, drv, efx->net_dev, "Serial number not found\n"); 2999 return; 3000 } 3001 3002 j = pci_vpd_info_field_size(&vpd_data[i]); 3003 i += PCI_VPD_INFO_FLD_HDR_SIZE; 3004 if (i + j > vpd_size) { 3005 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n"); 3006 return; 3007 } 3008 3009 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL); 3010 if (!efx->vpd_sn) 3011 return; 3012 3013 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]); 3014 } 3015 3016 3017 /* Main body of NIC initialisation 3018 * This is called at module load (or hotplug insertion, theoretically). 3019 */ 3020 static int efx_pci_probe_main(struct efx_nic *efx) 3021 { 3022 int rc; 3023 3024 /* Do start-of-day initialisation */ 3025 rc = efx_probe_all(efx); 3026 if (rc) 3027 goto fail1; 3028 3029 efx_init_napi(efx); 3030 3031 rc = efx->type->init(efx); 3032 if (rc) { 3033 netif_err(efx, probe, efx->net_dev, 3034 "failed to initialise NIC\n"); 3035 goto fail3; 3036 } 3037 3038 rc = efx_init_port(efx); 3039 if (rc) { 3040 netif_err(efx, probe, efx->net_dev, 3041 "failed to initialise port\n"); 3042 goto fail4; 3043 } 3044 3045 rc = efx_nic_init_interrupt(efx); 3046 if (rc) 3047 goto fail5; 3048 rc = efx_enable_interrupts(efx); 3049 if (rc) 3050 goto fail6; 3051 3052 return 0; 3053 3054 fail6: 3055 efx_nic_fini_interrupt(efx); 3056 fail5: 3057 efx_fini_port(efx); 3058 fail4: 3059 efx->type->fini(efx); 3060 fail3: 3061 efx_fini_napi(efx); 3062 efx_remove_all(efx); 3063 fail1: 3064 return rc; 3065 } 3066 3067 /* NIC initialisation 3068 * 3069 * This is called at module load (or hotplug insertion, 3070 * theoretically). It sets up PCI mappings, resets the NIC, 3071 * sets up and registers the network devices with the kernel and hooks 3072 * the interrupt service routine. It does not prepare the device for 3073 * transmission; this is left to the first time one of the network 3074 * interfaces is brought up (i.e. efx_net_open). 3075 */ 3076 static int efx_pci_probe(struct pci_dev *pci_dev, 3077 const struct pci_device_id *entry) 3078 { 3079 struct net_device *net_dev; 3080 struct efx_nic *efx; 3081 int rc; 3082 3083 /* Allocate and initialise a struct net_device and struct efx_nic */ 3084 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES, 3085 EFX_MAX_RX_QUEUES); 3086 if (!net_dev) 3087 return -ENOMEM; 3088 efx = netdev_priv(net_dev); 3089 efx->type = (const struct efx_nic_type *) entry->driver_data; 3090 net_dev->features |= (efx->type->offload_features | NETIF_F_SG | 3091 NETIF_F_HIGHDMA | NETIF_F_TSO | 3092 NETIF_F_RXCSUM); 3093 if (efx->type->offload_features & NETIF_F_V6_CSUM) 3094 net_dev->features |= NETIF_F_TSO6; 3095 /* Mask for features that also apply to VLAN devices */ 3096 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG | 3097 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO | 3098 NETIF_F_RXCSUM); 3099 /* All offloads can be toggled */ 3100 net_dev->hw_features = net_dev->features & ~NETIF_F_HIGHDMA; 3101 pci_set_drvdata(pci_dev, efx); 3102 SET_NETDEV_DEV(net_dev, &pci_dev->dev); 3103 rc = efx_init_struct(efx, pci_dev, net_dev); 3104 if (rc) 3105 goto fail1; 3106 3107 netif_info(efx, probe, efx->net_dev, 3108 "Solarflare NIC detected\n"); 3109 3110 if (!efx->type->is_vf) 3111 efx_probe_vpd_strings(efx); 3112 3113 /* Set up basic I/O (BAR mappings etc) */ 3114 rc = efx_init_io(efx); 3115 if (rc) 3116 goto fail2; 3117 3118 rc = efx_pci_probe_main(efx); 3119 if (rc) 3120 goto fail3; 3121 3122 rc = efx_register_netdev(efx); 3123 if (rc) 3124 goto fail4; 3125 3126 if (efx->type->sriov_init) { 3127 rc = efx->type->sriov_init(efx); 3128 if (rc) 3129 netif_err(efx, probe, efx->net_dev, 3130 "SR-IOV can't be enabled rc %d\n", rc); 3131 } 3132 3133 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n"); 3134 3135 /* Try to create MTDs, but allow this to fail */ 3136 rtnl_lock(); 3137 rc = efx_mtd_probe(efx); 3138 rtnl_unlock(); 3139 if (rc) 3140 netif_warn(efx, probe, efx->net_dev, 3141 "failed to create MTDs (%d)\n", rc); 3142 3143 rc = pci_enable_pcie_error_reporting(pci_dev); 3144 if (rc && rc != -EINVAL) 3145 netif_warn(efx, probe, efx->net_dev, 3146 "pci_enable_pcie_error_reporting failed (%d)\n", rc); 3147 3148 return 0; 3149 3150 fail4: 3151 efx_pci_remove_main(efx); 3152 fail3: 3153 efx_fini_io(efx); 3154 fail2: 3155 efx_fini_struct(efx); 3156 fail1: 3157 WARN_ON(rc > 0); 3158 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc); 3159 free_netdev(net_dev); 3160 return rc; 3161 } 3162 3163 /* efx_pci_sriov_configure returns the actual number of Virtual Functions 3164 * enabled on success 3165 */ 3166 #ifdef CONFIG_SFC_SRIOV 3167 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs) 3168 { 3169 int rc; 3170 struct efx_nic *efx = pci_get_drvdata(dev); 3171 3172 if (efx->type->sriov_configure) { 3173 rc = efx->type->sriov_configure(efx, num_vfs); 3174 if (rc) 3175 return rc; 3176 else 3177 return num_vfs; 3178 } else 3179 return -EOPNOTSUPP; 3180 } 3181 #endif 3182 3183 static int efx_pm_freeze(struct device *dev) 3184 { 3185 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 3186 3187 rtnl_lock(); 3188 3189 if (efx->state != STATE_DISABLED) { 3190 efx->state = STATE_UNINIT; 3191 3192 efx_device_detach_sync(efx); 3193 3194 efx_stop_all(efx); 3195 efx_disable_interrupts(efx); 3196 } 3197 3198 rtnl_unlock(); 3199 3200 return 0; 3201 } 3202 3203 static int efx_pm_thaw(struct device *dev) 3204 { 3205 int rc; 3206 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev)); 3207 3208 rtnl_lock(); 3209 3210 if (efx->state != STATE_DISABLED) { 3211 rc = efx_enable_interrupts(efx); 3212 if (rc) 3213 goto fail; 3214 3215 mutex_lock(&efx->mac_lock); 3216 efx->phy_op->reconfigure(efx); 3217 mutex_unlock(&efx->mac_lock); 3218 3219 efx_start_all(efx); 3220 3221 netif_device_attach(efx->net_dev); 3222 3223 efx->state = STATE_READY; 3224 3225 efx->type->resume_wol(efx); 3226 } 3227 3228 rtnl_unlock(); 3229 3230 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */ 3231 queue_work(reset_workqueue, &efx->reset_work); 3232 3233 return 0; 3234 3235 fail: 3236 rtnl_unlock(); 3237 3238 return rc; 3239 } 3240 3241 static int efx_pm_poweroff(struct device *dev) 3242 { 3243 struct pci_dev *pci_dev = to_pci_dev(dev); 3244 struct efx_nic *efx = pci_get_drvdata(pci_dev); 3245 3246 efx->type->fini(efx); 3247 3248 efx->reset_pending = 0; 3249 3250 pci_save_state(pci_dev); 3251 return pci_set_power_state(pci_dev, PCI_D3hot); 3252 } 3253 3254 /* Used for both resume and restore */ 3255 static int efx_pm_resume(struct device *dev) 3256 { 3257 struct pci_dev *pci_dev = to_pci_dev(dev); 3258 struct efx_nic *efx = pci_get_drvdata(pci_dev); 3259 int rc; 3260 3261 rc = pci_set_power_state(pci_dev, PCI_D0); 3262 if (rc) 3263 return rc; 3264 pci_restore_state(pci_dev); 3265 rc = pci_enable_device(pci_dev); 3266 if (rc) 3267 return rc; 3268 pci_set_master(efx->pci_dev); 3269 rc = efx->type->reset(efx, RESET_TYPE_ALL); 3270 if (rc) 3271 return rc; 3272 rc = efx->type->init(efx); 3273 if (rc) 3274 return rc; 3275 rc = efx_pm_thaw(dev); 3276 return rc; 3277 } 3278 3279 static int efx_pm_suspend(struct device *dev) 3280 { 3281 int rc; 3282 3283 efx_pm_freeze(dev); 3284 rc = efx_pm_poweroff(dev); 3285 if (rc) 3286 efx_pm_resume(dev); 3287 return rc; 3288 } 3289 3290 static const struct dev_pm_ops efx_pm_ops = { 3291 .suspend = efx_pm_suspend, 3292 .resume = efx_pm_resume, 3293 .freeze = efx_pm_freeze, 3294 .thaw = efx_pm_thaw, 3295 .poweroff = efx_pm_poweroff, 3296 .restore = efx_pm_resume, 3297 }; 3298 3299 /* A PCI error affecting this device was detected. 3300 * At this point MMIO and DMA may be disabled. 3301 * Stop the software path and request a slot reset. 3302 */ 3303 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev, 3304 enum pci_channel_state state) 3305 { 3306 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 3307 struct efx_nic *efx = pci_get_drvdata(pdev); 3308 3309 if (state == pci_channel_io_perm_failure) 3310 return PCI_ERS_RESULT_DISCONNECT; 3311 3312 rtnl_lock(); 3313 3314 if (efx->state != STATE_DISABLED) { 3315 efx->state = STATE_RECOVERY; 3316 efx->reset_pending = 0; 3317 3318 efx_device_detach_sync(efx); 3319 3320 efx_stop_all(efx); 3321 efx_disable_interrupts(efx); 3322 3323 status = PCI_ERS_RESULT_NEED_RESET; 3324 } else { 3325 /* If the interface is disabled we don't want to do anything 3326 * with it. 3327 */ 3328 status = PCI_ERS_RESULT_RECOVERED; 3329 } 3330 3331 rtnl_unlock(); 3332 3333 pci_disable_device(pdev); 3334 3335 return status; 3336 } 3337 3338 /* Fake a successful reset, which will be performed later in efx_io_resume. */ 3339 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev) 3340 { 3341 struct efx_nic *efx = pci_get_drvdata(pdev); 3342 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; 3343 int rc; 3344 3345 if (pci_enable_device(pdev)) { 3346 netif_err(efx, hw, efx->net_dev, 3347 "Cannot re-enable PCI device after reset.\n"); 3348 status = PCI_ERS_RESULT_DISCONNECT; 3349 } 3350 3351 rc = pci_cleanup_aer_uncorrect_error_status(pdev); 3352 if (rc) { 3353 netif_err(efx, hw, efx->net_dev, 3354 "pci_cleanup_aer_uncorrect_error_status failed (%d)\n", rc); 3355 /* Non-fatal error. Continue. */ 3356 } 3357 3358 return status; 3359 } 3360 3361 /* Perform the actual reset and resume I/O operations. */ 3362 static void efx_io_resume(struct pci_dev *pdev) 3363 { 3364 struct efx_nic *efx = pci_get_drvdata(pdev); 3365 int rc; 3366 3367 rtnl_lock(); 3368 3369 if (efx->state == STATE_DISABLED) 3370 goto out; 3371 3372 rc = efx_reset(efx, RESET_TYPE_ALL); 3373 if (rc) { 3374 netif_err(efx, hw, efx->net_dev, 3375 "efx_reset failed after PCI error (%d)\n", rc); 3376 } else { 3377 efx->state = STATE_READY; 3378 netif_dbg(efx, hw, efx->net_dev, 3379 "Done resetting and resuming IO after PCI error.\n"); 3380 } 3381 3382 out: 3383 rtnl_unlock(); 3384 } 3385 3386 /* For simplicity and reliability, we always require a slot reset and try to 3387 * reset the hardware when a pci error affecting the device is detected. 3388 * We leave both the link_reset and mmio_enabled callback unimplemented: 3389 * with our request for slot reset the mmio_enabled callback will never be 3390 * called, and the link_reset callback is not used by AER or EEH mechanisms. 3391 */ 3392 static struct pci_error_handlers efx_err_handlers = { 3393 .error_detected = efx_io_error_detected, 3394 .slot_reset = efx_io_slot_reset, 3395 .resume = efx_io_resume, 3396 }; 3397 3398 static struct pci_driver efx_pci_driver = { 3399 .name = KBUILD_MODNAME, 3400 .id_table = efx_pci_table, 3401 .probe = efx_pci_probe, 3402 .remove = efx_pci_remove, 3403 .driver.pm = &efx_pm_ops, 3404 .err_handler = &efx_err_handlers, 3405 #ifdef CONFIG_SFC_SRIOV 3406 .sriov_configure = efx_pci_sriov_configure, 3407 #endif 3408 }; 3409 3410 /************************************************************************** 3411 * 3412 * Kernel module interface 3413 * 3414 *************************************************************************/ 3415 3416 module_param(interrupt_mode, uint, 0444); 3417 MODULE_PARM_DESC(interrupt_mode, 3418 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)"); 3419 3420 static int __init efx_init_module(void) 3421 { 3422 int rc; 3423 3424 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n"); 3425 3426 rc = register_netdevice_notifier(&efx_netdev_notifier); 3427 if (rc) 3428 goto err_notifier; 3429 3430 #ifdef CONFIG_SFC_SRIOV 3431 rc = efx_init_sriov(); 3432 if (rc) 3433 goto err_sriov; 3434 #endif 3435 3436 reset_workqueue = create_singlethread_workqueue("sfc_reset"); 3437 if (!reset_workqueue) { 3438 rc = -ENOMEM; 3439 goto err_reset; 3440 } 3441 3442 rc = pci_register_driver(&efx_pci_driver); 3443 if (rc < 0) 3444 goto err_pci; 3445 3446 return 0; 3447 3448 err_pci: 3449 destroy_workqueue(reset_workqueue); 3450 err_reset: 3451 #ifdef CONFIG_SFC_SRIOV 3452 efx_fini_sriov(); 3453 err_sriov: 3454 #endif 3455 unregister_netdevice_notifier(&efx_netdev_notifier); 3456 err_notifier: 3457 return rc; 3458 } 3459 3460 static void __exit efx_exit_module(void) 3461 { 3462 printk(KERN_INFO "Solarflare NET driver unloading\n"); 3463 3464 pci_unregister_driver(&efx_pci_driver); 3465 destroy_workqueue(reset_workqueue); 3466 #ifdef CONFIG_SFC_SRIOV 3467 efx_fini_sriov(); 3468 #endif 3469 unregister_netdevice_notifier(&efx_netdev_notifier); 3470 3471 } 3472 3473 module_init(efx_init_module); 3474 module_exit(efx_exit_module); 3475 3476 MODULE_AUTHOR("Solarflare Communications and " 3477 "Michael Brown <mbrown@fensystems.co.uk>"); 3478 MODULE_DESCRIPTION("Solarflare network driver"); 3479 MODULE_LICENSE("GPL"); 3480 MODULE_DEVICE_TABLE(pci, efx_pci_table); 3481