1*17fcb3dcSFan Gong /* SPDX-License-Identifier: GPL-2.0 */ 2*17fcb3dcSFan Gong /* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */ 3*17fcb3dcSFan Gong 4*17fcb3dcSFan Gong #ifndef _HINIC3_HWDEV_H_ 5*17fcb3dcSFan Gong #define _HINIC3_HWDEV_H_ 6*17fcb3dcSFan Gong 7*17fcb3dcSFan Gong #include <linux/auxiliary_bus.h> 8*17fcb3dcSFan Gong #include <linux/pci.h> 9*17fcb3dcSFan Gong 10*17fcb3dcSFan Gong #include "hinic3_hw_intf.h" 11*17fcb3dcSFan Gong 12*17fcb3dcSFan Gong struct hinic3_cmdqs; 13*17fcb3dcSFan Gong struct hinic3_hwif; 14*17fcb3dcSFan Gong 15*17fcb3dcSFan Gong enum hinic3_event_service_type { 16*17fcb3dcSFan Gong HINIC3_EVENT_SRV_COMM = 0, 17*17fcb3dcSFan Gong HINIC3_EVENT_SRV_NIC = 1 18*17fcb3dcSFan Gong }; 19*17fcb3dcSFan Gong 20*17fcb3dcSFan Gong #define HINIC3_SRV_EVENT_TYPE(svc, type) (((svc) << 16) | (type)) 21*17fcb3dcSFan Gong 22*17fcb3dcSFan Gong /* driver-specific data of pci_dev */ 23*17fcb3dcSFan Gong struct hinic3_pcidev { 24*17fcb3dcSFan Gong struct pci_dev *pdev; 25*17fcb3dcSFan Gong struct hinic3_hwdev *hwdev; 26*17fcb3dcSFan Gong /* Auxiliary devices */ 27*17fcb3dcSFan Gong struct hinic3_adev *hadev[HINIC3_SERVICE_T_MAX]; 28*17fcb3dcSFan Gong 29*17fcb3dcSFan Gong void __iomem *cfg_reg_base; 30*17fcb3dcSFan Gong void __iomem *intr_reg_base; 31*17fcb3dcSFan Gong void __iomem *db_base; 32*17fcb3dcSFan Gong u64 db_dwqe_len; 33*17fcb3dcSFan Gong u64 db_base_phy; 34*17fcb3dcSFan Gong 35*17fcb3dcSFan Gong /* lock for attach/detach uld */ 36*17fcb3dcSFan Gong struct mutex pdev_mutex; 37*17fcb3dcSFan Gong unsigned long state; 38*17fcb3dcSFan Gong }; 39*17fcb3dcSFan Gong 40*17fcb3dcSFan Gong struct hinic3_hwdev { 41*17fcb3dcSFan Gong struct hinic3_pcidev *adapter; 42*17fcb3dcSFan Gong struct pci_dev *pdev; 43*17fcb3dcSFan Gong struct device *dev; 44*17fcb3dcSFan Gong int dev_id; 45*17fcb3dcSFan Gong struct hinic3_hwif *hwif; 46*17fcb3dcSFan Gong struct hinic3_cfg_mgmt_info *cfg_mgmt; 47*17fcb3dcSFan Gong struct hinic3_aeqs *aeqs; 48*17fcb3dcSFan Gong struct hinic3_ceqs *ceqs; 49*17fcb3dcSFan Gong struct hinic3_mbox *mbox; 50*17fcb3dcSFan Gong struct hinic3_cmdqs *cmdqs; 51*17fcb3dcSFan Gong struct workqueue_struct *workq; 52*17fcb3dcSFan Gong /* protect channel init and uninit */ 53*17fcb3dcSFan Gong spinlock_t channel_lock; 54*17fcb3dcSFan Gong u64 features[COMM_MAX_FEATURE_QWORD]; 55*17fcb3dcSFan Gong u32 wq_page_size; 56*17fcb3dcSFan Gong u8 max_cmdq; 57*17fcb3dcSFan Gong ulong func_state; 58*17fcb3dcSFan Gong }; 59*17fcb3dcSFan Gong 60*17fcb3dcSFan Gong struct hinic3_event_info { 61*17fcb3dcSFan Gong /* enum hinic3_event_service_type */ 62*17fcb3dcSFan Gong u16 service; 63*17fcb3dcSFan Gong u16 type; 64*17fcb3dcSFan Gong u8 event_data[104]; 65*17fcb3dcSFan Gong }; 66*17fcb3dcSFan Gong 67*17fcb3dcSFan Gong struct hinic3_adev { 68*17fcb3dcSFan Gong struct auxiliary_device adev; 69*17fcb3dcSFan Gong struct hinic3_hwdev *hwdev; 70*17fcb3dcSFan Gong enum hinic3_service_type svc_type; 71*17fcb3dcSFan Gong 72*17fcb3dcSFan Gong void (*event)(struct auxiliary_device *adev, 73*17fcb3dcSFan Gong struct hinic3_event_info *event); 74*17fcb3dcSFan Gong }; 75*17fcb3dcSFan Gong 76*17fcb3dcSFan Gong int hinic3_init_hwdev(struct pci_dev *pdev); 77*17fcb3dcSFan Gong void hinic3_free_hwdev(struct hinic3_hwdev *hwdev); 78*17fcb3dcSFan Gong 79*17fcb3dcSFan Gong void hinic3_set_api_stop(struct hinic3_hwdev *hwdev); 80*17fcb3dcSFan Gong 81*17fcb3dcSFan Gong #endif 82