1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */ 3 4 #ifndef _HINIC3_HWDEV_H_ 5 #define _HINIC3_HWDEV_H_ 6 7 #include <linux/auxiliary_bus.h> 8 #include <linux/pci.h> 9 10 #include "hinic3_hw_intf.h" 11 12 struct hinic3_cmdqs; 13 struct hinic3_hwif; 14 15 enum hinic3_event_service_type { 16 HINIC3_EVENT_SRV_COMM = 0, 17 HINIC3_EVENT_SRV_NIC = 1 18 }; 19 20 #define HINIC3_SRV_EVENT_TYPE(svc, type) (((svc) << 16) | (type)) 21 22 /* driver-specific data of pci_dev */ 23 struct hinic3_pcidev { 24 struct pci_dev *pdev; 25 struct hinic3_hwdev *hwdev; 26 /* Auxiliary devices */ 27 struct hinic3_adev *hadev[HINIC3_SERVICE_T_MAX]; 28 29 void __iomem *cfg_reg_base; 30 void __iomem *intr_reg_base; 31 void __iomem *db_base; 32 u64 db_dwqe_len; 33 u64 db_base_phy; 34 35 /* lock for attach/detach uld */ 36 struct mutex pdev_mutex; 37 unsigned long state; 38 }; 39 40 struct hinic3_hwdev { 41 struct hinic3_pcidev *adapter; 42 struct pci_dev *pdev; 43 struct device *dev; 44 int dev_id; 45 struct hinic3_hwif *hwif; 46 struct hinic3_cfg_mgmt_info *cfg_mgmt; 47 struct hinic3_aeqs *aeqs; 48 struct hinic3_ceqs *ceqs; 49 struct hinic3_mbox *mbox; 50 struct hinic3_cmdqs *cmdqs; 51 struct workqueue_struct *workq; 52 /* protect channel init and uninit */ 53 spinlock_t channel_lock; 54 u64 features[COMM_MAX_FEATURE_QWORD]; 55 u32 wq_page_size; 56 u8 max_cmdq; 57 ulong func_state; 58 }; 59 60 struct hinic3_event_info { 61 /* enum hinic3_event_service_type */ 62 u16 service; 63 u16 type; 64 u8 event_data[104]; 65 }; 66 67 struct hinic3_adev { 68 struct auxiliary_device adev; 69 struct hinic3_hwdev *hwdev; 70 enum hinic3_service_type svc_type; 71 72 void (*event)(struct auxiliary_device *adev, 73 struct hinic3_event_info *event); 74 }; 75 76 int hinic3_init_hwdev(struct pci_dev *pdev); 77 void hinic3_free_hwdev(struct hinic3_hwdev *hwdev); 78 79 void hinic3_set_api_stop(struct hinic3_hwdev *hwdev); 80 81 #endif 82