1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (c) Huawei Technologies Co., Ltd. 2025. All rights reserved. */ 3 4 #ifndef _HINIC3_HW_CFG_H_ 5 #define _HINIC3_HW_CFG_H_ 6 7 #include <linux/mutex.h> 8 #include <linux/pci.h> 9 10 struct hinic3_hwdev; 11 12 struct hinic3_irq { 13 u32 irq_id; 14 u16 msix_entry_idx; 15 bool allocated; 16 }; 17 18 struct hinic3_irq_info { 19 struct hinic3_irq *irq; 20 u16 num_irq; 21 /* device max irq number */ 22 u16 num_irq_hw; 23 /* protect irq alloc and free */ 24 struct mutex irq_mutex; 25 }; 26 27 struct hinic3_nic_service_cap { 28 u16 max_sqs; 29 }; 30 31 /* Device capabilities */ 32 struct hinic3_dev_cap { 33 /* Bitmasks of services supported by device */ 34 u16 supp_svcs_bitmap; 35 /* Physical port */ 36 u8 port_id; 37 struct hinic3_nic_service_cap nic_svc_cap; 38 }; 39 40 struct hinic3_cfg_mgmt_info { 41 struct hinic3_irq_info irq_info; 42 struct hinic3_dev_cap cap; 43 }; 44 45 int hinic3_alloc_irqs(struct hinic3_hwdev *hwdev, u16 num, 46 struct msix_entry *alloc_arr, u16 *act_num); 47 void hinic3_free_irq(struct hinic3_hwdev *hwdev, u32 irq_id); 48 49 bool hinic3_support_nic(struct hinic3_hwdev *hwdev); 50 u16 hinic3_func_max_qnum(struct hinic3_hwdev *hwdev); 51 u8 hinic3_physical_port_id(struct hinic3_hwdev *hwdev); 52 53 #endif 54