1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for Alibaba Elastic Ethernet Adapter. 4 * 5 * Copyright (C) 2025 Alibaba Inc. 6 */ 7 8 #include <linux/io-64-nonatomic-lo-hi.h> 9 #include <linux/iopoll.h> 10 11 #include "eea_net.h" 12 #include "eea_pci.h" 13 14 #define EEA_PCI_DB_OFFSET 4096 15 #define EEA_PCI_DB_MIN_SIZE 8 16 #define EEA_PCI_DB_MAX_SIZE 512 17 #define EEA_PCI_Q_MAX_NUM 1000 18 19 #define EEA_PCI_CAP_RESET_DEVICE 0xFA 20 #define EEA_PCI_CAP_RESET_FLAG BIT(1) 21 22 struct eea_pci_cfg { 23 __le32 reserve0; 24 __le32 reserve1; 25 __le32 drv_f_idx; 26 __le32 drv_f; 27 28 #define EEA_S_INIT (BIT(0) | BIT(1)) 29 #define EEA_S_OK BIT(2) 30 #define EEA_S_FEATURE_DONE BIT(3) 31 #define EEA_S_FAILED BIT(7) 32 u8 device_status; 33 u8 reserved[7]; 34 35 __le32 rx_num_max; 36 __le32 tx_num_max; 37 __le32 db_blk_size; 38 39 /* admin queue cfg */ 40 __le16 aq_size; 41 __le16 aq_msix_vector; 42 __le32 aq_db_off; 43 44 __le32 aq_sq_addr; 45 __le32 aq_sq_addr_hi; 46 __le32 aq_cq_addr; 47 __le32 aq_cq_addr_hi; 48 49 __le32 reserved1; 50 __le64 hw_ts; 51 }; 52 53 struct eea_pci_device { 54 struct eea_device edev; 55 struct pci_dev *pci_dev; 56 57 u32 msix_vec_n; 58 u32 db_len; 59 60 void __iomem *reg; 61 void __iomem *db_base; 62 void __iomem *db_end; 63 64 int ha_irq; 65 66 struct work_struct ha_handle_work; 67 char ha_irq_name[32]; 68 int reset_pos; 69 bool ha_ready; 70 71 bool shutdown; 72 }; 73 74 #define cfg_pointer(reg, item) \ 75 ((void __iomem *)((reg) + offsetof(struct eea_pci_cfg, item))) 76 77 #define cfg_write8(reg, item, val) iowrite8(val, cfg_pointer(reg, item)) 78 #define cfg_write16(reg, item, val) iowrite16(val, cfg_pointer(reg, item)) 79 #define cfg_write32(reg, item, val) iowrite32(val, cfg_pointer(reg, item)) 80 #define cfg_write64(reg, item, val) iowrite64_lo_hi(val, cfg_pointer(reg, item)) 81 82 #define cfg_read8(reg, item) ioread8(cfg_pointer(reg, item)) 83 #define cfg_read32(reg, item) ioread32(cfg_pointer(reg, item)) 84 #define cfg_read64(reg, item) ioread64(cfg_pointer(reg, item)) 85 86 /* Due to circular references, we have to add function definitions here. */ 87 static int __eea_pci_probe(struct pci_dev *pci_dev, 88 struct eea_pci_device *ep_dev, bool pci_probe); 89 static void __eea_pci_remove(struct pci_dev *pci_dev, bool pci_remove); 90 91 const char *eea_pci_name(struct eea_device *edev) 92 { 93 return pci_name(edev->ep_dev->pci_dev); 94 } 95 96 int eea_pci_domain_nr(struct eea_device *edev) 97 { 98 return pci_domain_nr(edev->ep_dev->pci_dev->bus); 99 } 100 101 u16 eea_pci_bdf(struct eea_device *edev) 102 { 103 return pci_dev_id(edev->ep_dev->pci_dev); 104 } 105 106 static void eea_pci_io_set_status(struct eea_device *edev, u8 status) 107 { 108 struct eea_pci_device *ep_dev = edev->ep_dev; 109 110 cfg_write8(ep_dev->reg, device_status, status); 111 } 112 113 static u8 eea_pci_io_get_status(struct eea_device *edev) 114 { 115 struct eea_pci_device *ep_dev = edev->ep_dev; 116 117 return cfg_read8(ep_dev->reg, device_status); 118 } 119 120 static void eea_add_status(struct eea_device *dev, u32 status) 121 { 122 eea_pci_io_set_status(dev, eea_pci_io_get_status(dev) | status); 123 } 124 125 #define EEA_RESET_TIMEOUT_US (60 * 1000 * 1000) 126 127 int eea_device_reset(struct eea_device *edev) 128 { 129 struct eea_pci_device *ep_dev = edev->ep_dev; 130 int err; 131 u8 val; 132 133 eea_pci_io_set_status(edev, 0); 134 135 /* We are no longer waiting for device ack during the shutdown flow. */ 136 if (ep_dev->shutdown) 137 return 0; 138 139 /* A longer timeout is set here to handle edge cases, though it should 140 * return promptly in most scenarios. 141 * 142 * In our case, all replies are handled by the DPU software, so there is 143 * no race condition between the hardware processes and the register. 144 */ 145 err = read_poll_timeout(cfg_read8, val, (!val || val == 0xFF), 20, 146 EEA_RESET_TIMEOUT_US, 147 false, ep_dev->reg, device_status); 148 149 /* Surprise PCIe Removal */ 150 if (val == 0xFF) 151 return -EINVAL; 152 153 return err; 154 } 155 156 int eea_pci_set_aq_up(struct eea_device *edev) 157 { 158 struct eea_pci_device *ep_dev = edev->ep_dev; 159 u8 status = eea_pci_io_get_status(edev); 160 int err; 161 u8 val; 162 163 eea_pci_io_set_status(edev, status | EEA_S_OK); 164 165 /* A longer timeout is set here to handle edge cases, though it should 166 * return promptly in most scenarios. 167 * 168 * In our case, all replies are handled by the DPU software, so there is 169 * no race condition between the hardware processes and the register. 170 */ 171 err = read_poll_timeout(cfg_read8, val, 172 val & (EEA_S_OK | EEA_S_FAILED), 173 20, EEA_RESET_TIMEOUT_US, 174 false, ep_dev->reg, device_status); 175 176 /* Surprise PCIe Removal */ 177 if (val == 0xFF) 178 return -EINVAL; 179 180 /* device fail */ 181 if (val & EEA_S_FAILED) 182 return -EINVAL; 183 184 return err; 185 } 186 187 static int eea_negotiate(struct eea_device *edev) 188 { 189 struct eea_pci_device *ep_dev; 190 u32 status; 191 192 ep_dev = edev->ep_dev; 193 194 edev->features = 0; 195 196 cfg_write32(ep_dev->reg, drv_f_idx, 0); 197 cfg_write32(ep_dev->reg, drv_f, lower_32_bits(edev->features)); 198 cfg_write32(ep_dev->reg, drv_f_idx, 1); 199 cfg_write32(ep_dev->reg, drv_f, upper_32_bits(edev->features)); 200 201 eea_add_status(edev, EEA_S_FEATURE_DONE); 202 status = eea_pci_io_get_status(edev); 203 204 /* Surprise PCIe Removal */ 205 if (status == 0xFF) 206 return -EINVAL; 207 208 if (!(status & EEA_S_FEATURE_DONE)) 209 return -ENODEV; 210 211 return 0; 212 } 213 214 static void eea_pci_release_resource(struct eea_pci_device *ep_dev) 215 { 216 struct pci_dev *pci_dev = ep_dev->pci_dev; 217 struct eea_device *edev; 218 219 edev = &ep_dev->edev; 220 221 if (edev->status < EEA_PCI_STATUS_READY) 222 return; 223 224 if (ep_dev->reg) { 225 pci_iounmap(pci_dev, ep_dev->reg); 226 ep_dev->reg = NULL; 227 } 228 229 if (ep_dev->msix_vec_n) { 230 ep_dev->msix_vec_n = 0; 231 pci_free_irq_vectors(ep_dev->pci_dev); 232 } 233 234 pci_clear_master(pci_dev); 235 pci_release_regions(pci_dev); 236 pci_disable_device(pci_dev); 237 238 edev->status = EEA_PCI_STATUS_NONE; 239 } 240 241 static int eea_pci_setup(struct pci_dev *pci_dev, struct eea_pci_device *ep_dev) 242 { 243 int err, n, ret, len; 244 245 ep_dev->edev.status = EEA_PCI_STATUS_ERR; 246 247 ep_dev->pci_dev = pci_dev; 248 249 err = pci_enable_device(pci_dev); 250 if (err) 251 return err; 252 253 err = pci_request_regions(pci_dev, "EEA"); 254 if (err) 255 goto err_disable_dev; 256 257 if (pci_resource_len(pci_dev, 0) < EEA_PCI_DB_OFFSET) { 258 dev_err(&pci_dev->dev, "Bar 0 is too small %llu\n", 259 (u64)pci_resource_len(pci_dev, 0)); 260 err = -EINVAL; 261 goto err_release_regions; 262 } 263 264 ep_dev->reg = pci_iomap(pci_dev, 0, 0); 265 if (!ep_dev->reg) { 266 dev_err(&pci_dev->dev, "Failed to map pci bar!\n"); 267 err = -ENOMEM; 268 goto err_release_regions; 269 } 270 271 err = eea_device_reset(&ep_dev->edev); 272 if (err) { 273 dev_err(&pci_dev->dev, "Failed to reset device for setup!\n"); 274 goto err_unmap_reg; 275 } 276 277 err = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(64)); 278 if (err) { 279 dev_warn(&pci_dev->dev, "Failed to enable 64-bit DMA.\n"); 280 goto err_unmap_reg; 281 } 282 283 pci_set_master(pci_dev); 284 285 ep_dev->edev.rx_num = cfg_read32(ep_dev->reg, rx_num_max); 286 ep_dev->edev.tx_num = cfg_read32(ep_dev->reg, tx_num_max); 287 288 if (ep_dev->edev.rx_num > EEA_PCI_Q_MAX_NUM || 289 ep_dev->edev.tx_num > EEA_PCI_Q_MAX_NUM) { 290 dev_err(&pci_dev->dev, "Invalid queue num %u %u\n", 291 ep_dev->edev.rx_num, 292 ep_dev->edev.tx_num); 293 err = -EINVAL; 294 goto err_clear_master; 295 } 296 297 ep_dev->edev.db_blk_size = cfg_read32(ep_dev->reg, db_blk_size); 298 if (!IS_ALIGNED(ep_dev->edev.db_blk_size, 8) || 299 ep_dev->edev.db_blk_size > EEA_PCI_DB_MAX_SIZE || 300 ep_dev->edev.db_blk_size < EEA_PCI_DB_MIN_SIZE) { 301 dev_err(&pci_dev->dev, "Invalid db size %u\n", 302 ep_dev->edev.db_blk_size); 303 err = -EINVAL; 304 goto err_clear_master; 305 } 306 307 ep_dev->db_len = ep_dev->edev.db_blk_size * (ep_dev->edev.rx_num + 308 ep_dev->edev.tx_num + 1); 309 ep_dev->db_base = ep_dev->reg + EEA_PCI_DB_OFFSET; 310 ep_dev->db_end = ep_dev->db_base + ep_dev->db_len; 311 312 len = ep_dev->db_end - ep_dev->reg; 313 314 if (pci_resource_len(pci_dev, 0) < len) { 315 dev_err(&pci_dev->dev, "Bar 0 is too small %llu\n", 316 (u64)pci_resource_len(pci_dev, 0)); 317 err = -EINVAL; 318 goto err_clear_master; 319 } 320 321 /* In our design, the number of hardware interrupts matches the maximum 322 * number of queues. If pci_alloc_irq_vectors failed, return directly. 323 * 324 * 2: adminq, error handle 325 */ 326 n = ep_dev->edev.rx_num + 2; 327 ret = pci_alloc_irq_vectors(ep_dev->pci_dev, n, n, PCI_IRQ_MSIX); 328 if (ret != n) { 329 err = ret; 330 goto err_clear_master; 331 } 332 333 ep_dev->msix_vec_n = ret; 334 335 ep_dev->edev.status = EEA_PCI_STATUS_READY; 336 337 return 0; 338 339 err_clear_master: 340 pci_clear_master(pci_dev); 341 342 err_unmap_reg: 343 pci_iounmap(pci_dev, ep_dev->reg); 344 ep_dev->reg = NULL; 345 346 err_release_regions: 347 pci_release_regions(pci_dev); 348 349 err_disable_dev: 350 pci_disable_device(pci_dev); 351 352 return err; 353 } 354 355 void __iomem *eea_pci_db_addr(struct eea_device *edev, u32 off) 356 { 357 u32 max_off; 358 359 if (!IS_ALIGNED(off, 8)) 360 return NULL; 361 362 max_off = edev->ep_dev->db_len - edev->db_blk_size; 363 364 if (off > max_off) 365 return NULL; 366 367 return edev->ep_dev->db_base + off; 368 } 369 370 int eea_pci_active_aq(struct eea_ring *ering, int msix_vec) 371 { 372 struct eea_pci_device *ep_dev = ering->edev->ep_dev; 373 374 cfg_write16(ep_dev->reg, aq_size, ering->num); 375 cfg_write16(ep_dev->reg, aq_msix_vector, msix_vec); 376 377 cfg_write64(ep_dev->reg, aq_sq_addr, ering->sq.dma_addr); 378 cfg_write64(ep_dev->reg, aq_cq_addr, ering->cq.dma_addr); 379 380 ering->db = eea_pci_db_addr(ering->edev, 381 cfg_read32(ep_dev->reg, aq_db_off)); 382 383 if (!ering->db) 384 return -EIO; 385 386 return 0; 387 } 388 389 void eea_pci_free_irq(struct eea_irq_blk *blk) 390 { 391 irq_update_affinity_hint(blk->irq, NULL); 392 free_irq(blk->irq, blk); 393 } 394 395 int eea_pci_request_irq(struct eea_device *edev, struct eea_irq_blk *blk, 396 irqreturn_t (*callback)(int irq, void *data)) 397 { 398 struct eea_pci_device *ep_dev = edev->ep_dev; 399 int irq; 400 401 snprintf(blk->irq_name, sizeof(blk->irq_name), "eea-q%d@%s", blk->idx, 402 pci_name(ep_dev->pci_dev)); 403 404 irq = pci_irq_vector(ep_dev->pci_dev, blk->msix_vec); 405 406 blk->irq = irq; 407 408 return request_irq(irq, callback, IRQF_NO_AUTOEN, blk->irq_name, blk); 409 } 410 411 static void eea_ha_handle_reset(struct eea_pci_device *ep_dev) 412 { 413 struct eea_device *edev; 414 struct pci_dev *pci_dev; 415 u16 reset; 416 int err; 417 418 if (!ep_dev->reset_pos) { 419 eea_queues_check_and_reset(&ep_dev->edev); 420 return; 421 } 422 423 edev = &ep_dev->edev; 424 425 pci_read_config_word(ep_dev->pci_dev, ep_dev->reset_pos, &reset); 426 427 /* Clear bits using 0xFFFF and ignore all previous messages. */ 428 pci_write_config_word(ep_dev->pci_dev, ep_dev->reset_pos, 0xFFFF); 429 430 if (reset & EEA_PCI_CAP_RESET_FLAG) { 431 dev_warn(&ep_dev->pci_dev->dev, "recv device reset request.\n"); 432 433 pci_dev = ep_dev->pci_dev; 434 435 /* The pci remove callback may hold this lock. If the 436 * pci remove callback is called, then we can ignore the 437 * ha interrupt. 438 */ 439 if (mutex_trylock(&edev->ha_lock)) { 440 if (edev->status != EEA_PCI_STATUS_DONE) { 441 dev_err(&ep_dev->pci_dev->dev, "ha: reset device: pci status is %d. skip it.\n", 442 edev->status); 443 444 mutex_unlock(&edev->ha_lock); 445 return; 446 } 447 448 __eea_pci_remove(pci_dev, false); 449 err = __eea_pci_probe(pci_dev, ep_dev, false); 450 if (err) 451 /* Currently, for some reason, PCI 452 * initialization or network device re-probing 453 * has failed. Waiting for the PCI subsystem to 454 * call the remove callback to release the 455 * remaining resources. 456 */ 457 dev_err(&ep_dev->pci_dev->dev, 458 "ha: re-setup failed.\n"); 459 460 mutex_unlock(&edev->ha_lock); 461 } else { 462 /* Device removal is in progress, so return directly. */ 463 dev_warn(&ep_dev->pci_dev->dev, 464 "ha device reset: trylock failed.\n"); 465 } 466 return; 467 } 468 469 eea_queues_check_and_reset(&ep_dev->edev); 470 } 471 472 /* ha handle code */ 473 static void eea_ha_handle_work(struct work_struct *work) 474 { 475 struct eea_pci_device *ep_dev; 476 477 ep_dev = container_of(work, struct eea_pci_device, ha_handle_work); 478 479 /* Ha interrupt is triggered, so there maybe some error, we may need to 480 * reset the device or reset some queues. 481 */ 482 dev_warn(&ep_dev->pci_dev->dev, "recv ha interrupt.\n"); 483 484 eea_ha_handle_reset(ep_dev); 485 } 486 487 static irqreturn_t eea_pci_ha_handle(int irq, void *data) 488 { 489 struct eea_device *edev = data; 490 491 schedule_work(&edev->ep_dev->ha_handle_work); 492 493 return IRQ_HANDLED; 494 } 495 496 static void eea_pci_free_ha_irq(struct eea_device *edev) 497 { 498 struct eea_pci_device *ep_dev = edev->ep_dev; 499 int irq; 500 501 if (ep_dev->ha_ready) { 502 irq = pci_irq_vector(ep_dev->pci_dev, 0); 503 free_irq(irq, edev); 504 ep_dev->ha_ready = false; 505 } 506 } 507 508 static int eea_pci_ha_init(struct eea_device *edev, struct pci_dev *pci_dev, 509 bool pci_probe) 510 { 511 int pos, cfg_type_off, cfg_drv_off, cfg_dev_off; 512 struct eea_pci_device *ep_dev = edev->ep_dev; 513 int irq, err; 514 u8 type; 515 516 snprintf(ep_dev->ha_irq_name, sizeof(ep_dev->ha_irq_name), "eea-ha@%s", 517 pci_name(ep_dev->pci_dev)); 518 519 irq = pci_irq_vector(ep_dev->pci_dev, 0); 520 521 if (pci_probe) 522 INIT_WORK(&ep_dev->ha_handle_work, eea_ha_handle_work); 523 524 /* This irq is not only work for ha, so request it always. */ 525 err = request_irq(irq, eea_pci_ha_handle, IRQF_NO_AUTOEN, 526 ep_dev->ha_irq_name, edev); 527 if (err) 528 return err; 529 530 ep_dev->ha_irq = irq; 531 532 ep_dev->ha_ready = true; 533 ep_dev->reset_pos = 0; 534 535 cfg_type_off = offsetof(struct eea_pci_cap, cfg_type); 536 cfg_drv_off = offsetof(struct eea_pci_reset_reg, driver); 537 cfg_dev_off = offsetof(struct eea_pci_reset_reg, device); 538 539 for (pos = pci_find_capability(pci_dev, PCI_CAP_ID_VNDR); 540 pos > 0; 541 pos = pci_find_next_capability(pci_dev, pos, PCI_CAP_ID_VNDR)) { 542 pci_read_config_byte(pci_dev, pos + cfg_type_off, &type); 543 544 if (type == EEA_PCI_CAP_RESET_DEVICE) { 545 /* notify device, driver support this feature. */ 546 pci_write_config_word(pci_dev, pos + cfg_drv_off, 547 EEA_PCI_CAP_RESET_FLAG); 548 pci_write_config_word(pci_dev, pos + cfg_dev_off, 549 0xFFFF); 550 551 edev->ep_dev->reset_pos = pos + cfg_dev_off; 552 return 0; 553 } 554 } 555 556 /* irq just for event notify */ 557 dev_warn(&edev->ep_dev->pci_dev->dev, "Not Found reset cap.\n"); 558 return 0; 559 } 560 561 u64 eea_pci_device_ts(struct eea_device *edev) 562 { 563 struct eea_pci_device *ep_dev = edev->ep_dev; 564 565 return cfg_read64(ep_dev->reg, hw_ts); 566 } 567 568 static int eea_init_device(struct eea_device *edev) 569 { 570 int err; 571 572 err = eea_device_reset(edev); 573 if (err) 574 return err; 575 576 eea_pci_io_set_status(edev, EEA_S_INIT); 577 578 err = eea_negotiate(edev); 579 if (err) 580 goto err; 581 582 err = eea_net_probe(edev); 583 if (err) 584 goto err; 585 586 return 0; 587 err: 588 eea_add_status(edev, EEA_S_FAILED); 589 return err; 590 } 591 592 static int __eea_pci_probe(struct pci_dev *pci_dev, 593 struct eea_pci_device *ep_dev, 594 bool pci_probe) 595 { 596 struct eea_device *edev; 597 int err; 598 599 pci_set_drvdata(pci_dev, ep_dev); 600 601 edev = &ep_dev->edev; 602 603 err = eea_pci_setup(pci_dev, ep_dev); 604 if (err) 605 return err; 606 607 err = eea_init_device(&ep_dev->edev); 608 if (err) 609 goto err_pci_rel; 610 611 err = eea_pci_ha_init(edev, pci_dev, pci_probe); 612 if (err) 613 goto err_net_rm; 614 615 edev->status = EEA_PCI_STATUS_DONE; 616 617 enable_irq(ep_dev->ha_irq); 618 619 return 0; 620 621 err_net_rm: 622 eea_net_remove(edev, !pci_probe); 623 624 err_pci_rel: 625 eea_pci_release_resource(ep_dev); 626 return err; 627 } 628 629 static void __eea_pci_remove(struct pci_dev *pci_dev, bool pci_remove) 630 { 631 struct eea_pci_device *ep_dev = pci_get_drvdata(pci_dev); 632 struct device *dev = get_device(&ep_dev->pci_dev->dev); 633 struct eea_device *edev = &ep_dev->edev; 634 635 eea_pci_free_ha_irq(edev); 636 637 if (pci_remove) 638 flush_work(&ep_dev->ha_handle_work); 639 640 eea_net_remove(edev, !pci_remove); 641 642 eea_pci_release_resource(ep_dev); 643 644 put_device(dev); 645 } 646 647 static int eea_pci_probe(struct pci_dev *pci_dev, 648 const struct pci_device_id *id) 649 { 650 struct eea_pci_device *ep_dev; 651 struct eea_device *edev; 652 int err; 653 654 ep_dev = kzalloc(sizeof(*ep_dev), GFP_KERNEL); 655 if (!ep_dev) 656 return -ENOMEM; 657 658 edev = &ep_dev->edev; 659 660 edev->ep_dev = ep_dev; 661 edev->dma_dev = &pci_dev->dev; 662 663 ep_dev->pci_dev = pci_dev; 664 665 mutex_init(&edev->ha_lock); 666 667 err = __eea_pci_probe(pci_dev, ep_dev, true); 668 if (err) { 669 mutex_destroy(&edev->ha_lock); 670 pci_set_drvdata(pci_dev, NULL); 671 kfree(ep_dev); 672 } 673 674 return err; 675 } 676 677 static void eea_pci_remove(struct pci_dev *pci_dev) 678 { 679 struct eea_pci_device *ep_dev = pci_get_drvdata(pci_dev); 680 struct eea_device *edev; 681 682 edev = &ep_dev->edev; 683 684 mutex_lock(&edev->ha_lock); 685 __eea_pci_remove(pci_dev, true); 686 mutex_unlock(&edev->ha_lock); 687 688 pci_set_drvdata(pci_dev, NULL); 689 690 mutex_destroy(&edev->ha_lock); 691 kfree(ep_dev); 692 } 693 694 static void eea_pci_shutdown(struct pci_dev *pci_dev) 695 { 696 struct eea_pci_device *ep_dev = pci_get_drvdata(pci_dev); 697 struct eea_device *edev; 698 699 edev = &ep_dev->edev; 700 701 ep_dev->shutdown = true; 702 703 mutex_lock(&edev->ha_lock); 704 eea_pci_free_ha_irq(edev); 705 flush_work(&ep_dev->ha_handle_work); 706 mutex_unlock(&edev->ha_lock); 707 708 eea_net_shutdown(edev); 709 710 pci_clear_master(pci_dev); 711 } 712 713 static const struct pci_device_id eea_pci_id_table[] = { 714 { PCI_DEVICE(PCI_VENDOR_ID_ALIBABA, 0x500B) }, 715 { 0 } 716 }; 717 718 MODULE_DEVICE_TABLE(pci, eea_pci_id_table); 719 720 static struct pci_driver eea_pci_driver = { 721 .name = "alibaba_eea", 722 .id_table = eea_pci_id_table, 723 .probe = eea_pci_probe, 724 .remove = eea_pci_remove, 725 .shutdown = eea_pci_shutdown, 726 .sriov_configure = pci_sriov_configure_simple, 727 }; 728 729 static __init int eea_pci_init(void) 730 { 731 return pci_register_driver(&eea_pci_driver); 732 } 733 734 static __exit void eea_pci_exit(void) 735 { 736 pci_unregister_driver(&eea_pci_driver); 737 } 738 739 module_init(eea_pci_init); 740 module_exit(eea_pci_exit); 741 742 MODULE_DESCRIPTION("Driver for Alibaba Elastic Ethernet Adapter"); 743 MODULE_AUTHOR("Xuan Zhuo <xuanzhuo@linux.alibaba.com>"); 744 MODULE_LICENSE("GPL"); 745