1 // SPDX-License-Identifier: GPL-2.0 2 /* Fintek F81604 USB-to-2CAN controller driver. 3 * 4 * Copyright (C) 2023 Ji-Ze Hong (Peter Hong) <peter_hong@fintek.com.tw> 5 */ 6 #include <linux/bitfield.h> 7 #include <linux/netdevice.h> 8 #include <linux/units.h> 9 #include <linux/usb.h> 10 11 #include <linux/can.h> 12 #include <linux/can/dev.h> 13 #include <linux/can/error.h> 14 #include <linux/can/platform/sja1000.h> 15 16 #include <linux/unaligned.h> 17 18 /* vendor and product id */ 19 #define F81604_VENDOR_ID 0x2c42 20 #define F81604_PRODUCT_ID 0x1709 21 #define F81604_CAN_CLOCK (12 * MEGA) 22 #define F81604_MAX_DEV 2 23 #define F81604_SET_DEVICE_RETRY 10 24 25 #define F81604_USB_TIMEOUT 2000 26 #define F81604_SET_GET_REGISTER 0xA0 27 #define F81604_PORT_OFFSET 0x1000 28 #define F81604_MAX_RX_URBS 4 29 30 #define F81604_CMD_DATA 0x00 31 32 #define F81604_DLC_LEN_MASK GENMASK(3, 0) 33 #define F81604_DLC_EFF_BIT BIT(7) 34 #define F81604_DLC_RTR_BIT BIT(6) 35 36 #define F81604_SFF_SHIFT 5 37 #define F81604_EFF_SHIFT 3 38 39 #define F81604_BRP_MASK GENMASK(5, 0) 40 #define F81604_SJW_MASK GENMASK(7, 6) 41 42 #define F81604_SEG1_MASK GENMASK(3, 0) 43 #define F81604_SEG2_MASK GENMASK(6, 4) 44 45 #define F81604_CLEAR_ALC 0 46 #define F81604_CLEAR_ECC 1 47 #define F81604_CLEAR_OVERRUN 2 48 49 /* device setting */ 50 #define F81604_CTRL_MODE_REG 0x80 51 #define F81604_TX_ONESHOT (0x03 << 3) 52 #define F81604_TX_NORMAL (0x01 << 3) 53 #define F81604_RX_AUTO_RELEASE_BUF BIT(1) 54 #define F81604_INT_WHEN_CHANGE BIT(0) 55 56 #define F81604_TERMINATOR_REG 0x105 57 #define F81604_CAN0_TERM BIT(2) 58 #define F81604_CAN1_TERM BIT(3) 59 60 #define F81604_TERMINATION_DISABLED CAN_TERMINATION_DISABLED 61 #define F81604_TERMINATION_ENABLED 120 62 63 /* SJA1000 registers - manual section 6.4 (Pelican Mode) */ 64 #define F81604_SJA1000_MOD 0x00 65 #define F81604_SJA1000_CMR 0x01 66 #define F81604_SJA1000_IR 0x03 67 #define F81604_SJA1000_IER 0x04 68 #define F81604_SJA1000_ALC 0x0B 69 #define F81604_SJA1000_ECC 0x0C 70 #define F81604_SJA1000_RXERR 0x0E 71 #define F81604_SJA1000_TXERR 0x0F 72 #define F81604_SJA1000_ACCC0 0x10 73 #define F81604_SJA1000_ACCM0 0x14 74 #define F81604_MAX_FILTER_CNT 4 75 76 /* Common registers - manual section 6.5 */ 77 #define F81604_SJA1000_BTR0 0x06 78 #define F81604_SJA1000_BTR1 0x07 79 #define F81604_SJA1000_BTR1_SAMPLE_TRIPLE BIT(7) 80 #define F81604_SJA1000_OCR 0x08 81 #define F81604_SJA1000_CDR 0x1F 82 83 /* mode register */ 84 #define F81604_SJA1000_MOD_RM 0x01 85 #define F81604_SJA1000_MOD_LOM 0x02 86 #define F81604_SJA1000_MOD_STM 0x04 87 88 /* commands */ 89 #define F81604_SJA1000_CMD_CDO 0x08 90 91 /* interrupt sources */ 92 #define F81604_SJA1000_IRQ_BEI 0x80 93 #define F81604_SJA1000_IRQ_ALI 0x40 94 #define F81604_SJA1000_IRQ_EPI 0x20 95 #define F81604_SJA1000_IRQ_DOI 0x08 96 #define F81604_SJA1000_IRQ_EI 0x04 97 #define F81604_SJA1000_IRQ_TI 0x02 98 #define F81604_SJA1000_IRQ_RI 0x01 99 #define F81604_SJA1000_IRQ_ALL 0xFF 100 #define F81604_SJA1000_IRQ_OFF 0x00 101 102 /* status register content */ 103 #define F81604_SJA1000_SR_BS 0x80 104 #define F81604_SJA1000_SR_ES 0x40 105 #define F81604_SJA1000_SR_TCS 0x08 106 107 /* ECC register */ 108 #define F81604_SJA1000_ECC_SEG 0x1F 109 #define F81604_SJA1000_ECC_DIR 0x20 110 #define F81604_SJA1000_ECC_BIT 0x00 111 #define F81604_SJA1000_ECC_FORM 0x40 112 #define F81604_SJA1000_ECC_STUFF 0x80 113 #define F81604_SJA1000_ECC_MASK 0xc0 114 115 /* ALC register */ 116 #define F81604_SJA1000_ALC_MASK 0x1f 117 118 /* table of devices that work with this driver */ 119 static const struct usb_device_id f81604_table[] = { 120 { USB_DEVICE(F81604_VENDOR_ID, F81604_PRODUCT_ID) }, 121 {} /* Terminating entry */ 122 }; 123 124 MODULE_DEVICE_TABLE(usb, f81604_table); 125 126 static const struct ethtool_ops f81604_ethtool_ops = { 127 .get_ts_info = ethtool_op_get_ts_info, 128 }; 129 130 static const u16 f81604_termination[] = { F81604_TERMINATION_DISABLED, 131 F81604_TERMINATION_ENABLED }; 132 133 struct f81604_priv { 134 struct net_device *netdev[F81604_MAX_DEV]; 135 }; 136 137 struct f81604_port_priv { 138 struct can_priv can; 139 struct net_device *netdev; 140 struct sk_buff *echo_skb; 141 142 unsigned long clear_flags; 143 struct work_struct clear_reg_work; 144 145 struct usb_device *dev; 146 struct usb_interface *intf; 147 148 struct usb_anchor urbs_anchor; 149 }; 150 151 /* Interrupt endpoint data format: 152 * Byte 0: Status register. 153 * Byte 1: Interrupt register. 154 * Byte 2: Interrupt enable register. 155 * Byte 3: Arbitration lost capture(ALC) register. 156 * Byte 4: Error code capture(ECC) register. 157 * Byte 5: Error warning limit register. 158 * Byte 6: RX error counter register. 159 * Byte 7: TX error counter register. 160 * Byte 8: Reserved. 161 */ 162 struct f81604_int_data { 163 u8 sr; 164 u8 isrc; 165 u8 ier; 166 u8 alc; 167 u8 ecc; 168 u8 ewlr; 169 u8 rxerr; 170 u8 txerr; 171 u8 val; 172 } __packed __aligned(4); 173 174 struct f81604_sff { 175 __be16 id; 176 u8 data[CAN_MAX_DLEN]; 177 } __packed __aligned(2); 178 179 struct f81604_eff { 180 __be32 id; 181 u8 data[CAN_MAX_DLEN]; 182 } __packed __aligned(2); 183 184 struct f81604_can_frame { 185 u8 cmd; 186 187 /* According for F81604 DLC define: 188 * bit 3~0: data length (0~8) 189 * bit6: is RTR flag. 190 * bit7: is EFF frame. 191 */ 192 u8 dlc; 193 194 union { 195 struct f81604_sff sff; 196 struct f81604_eff eff; 197 }; 198 } __packed __aligned(2); 199 200 static const u8 bulk_in_addr[F81604_MAX_DEV] = { 2, 4 }; 201 static const u8 bulk_out_addr[F81604_MAX_DEV] = { 1, 3 }; 202 static const u8 int_in_addr[F81604_MAX_DEV] = { 1, 3 }; 203 204 static int f81604_write(struct usb_device *dev, u16 reg, u8 data) 205 { 206 int ret; 207 208 ret = usb_control_msg_send(dev, 0, F81604_SET_GET_REGISTER, 209 USB_TYPE_VENDOR | USB_DIR_OUT, 0, reg, 210 &data, sizeof(data), F81604_USB_TIMEOUT, 211 GFP_KERNEL); 212 if (ret) 213 dev_err(&dev->dev, "%s: reg: %x data: %x failed: %pe\n", 214 __func__, reg, data, ERR_PTR(ret)); 215 216 return ret; 217 } 218 219 static int f81604_read(struct usb_device *dev, u16 reg, u8 *data) 220 { 221 int ret; 222 223 ret = usb_control_msg_recv(dev, 0, F81604_SET_GET_REGISTER, 224 USB_TYPE_VENDOR | USB_DIR_IN, 0, reg, data, 225 sizeof(*data), F81604_USB_TIMEOUT, 226 GFP_KERNEL); 227 228 if (ret < 0) 229 dev_err(&dev->dev, "%s: reg: %x failed: %pe\n", __func__, reg, 230 ERR_PTR(ret)); 231 232 return ret; 233 } 234 235 static int f81604_update_bits(struct usb_device *dev, u16 reg, u8 mask, 236 u8 data) 237 { 238 int ret; 239 u8 tmp; 240 241 ret = f81604_read(dev, reg, &tmp); 242 if (ret) 243 return ret; 244 245 tmp &= ~mask; 246 tmp |= (mask & data); 247 248 return f81604_write(dev, reg, tmp); 249 } 250 251 static int f81604_sja1000_write(struct f81604_port_priv *priv, u16 reg, 252 u8 data) 253 { 254 int port = priv->netdev->dev_port; 255 int real_reg; 256 257 real_reg = reg + F81604_PORT_OFFSET * port + F81604_PORT_OFFSET; 258 return f81604_write(priv->dev, real_reg, data); 259 } 260 261 static int f81604_sja1000_read(struct f81604_port_priv *priv, u16 reg, 262 u8 *data) 263 { 264 int port = priv->netdev->dev_port; 265 int real_reg; 266 267 real_reg = reg + F81604_PORT_OFFSET * port + F81604_PORT_OFFSET; 268 return f81604_read(priv->dev, real_reg, data); 269 } 270 271 static int f81604_set_reset_mode(struct f81604_port_priv *priv) 272 { 273 int ret, i; 274 u8 tmp; 275 276 /* disable interrupts */ 277 ret = f81604_sja1000_write(priv, F81604_SJA1000_IER, 278 F81604_SJA1000_IRQ_OFF); 279 if (ret) 280 return ret; 281 282 for (i = 0; i < F81604_SET_DEVICE_RETRY; i++) { 283 ret = f81604_sja1000_read(priv, F81604_SJA1000_MOD, &tmp); 284 if (ret) 285 return ret; 286 287 /* check reset bit */ 288 if (tmp & F81604_SJA1000_MOD_RM) { 289 priv->can.state = CAN_STATE_STOPPED; 290 return 0; 291 } 292 293 /* reset chip */ 294 ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD, 295 F81604_SJA1000_MOD_RM); 296 if (ret) 297 return ret; 298 } 299 300 return -EPERM; 301 } 302 303 static int f81604_set_normal_mode(struct f81604_port_priv *priv) 304 { 305 u8 tmp, ier = 0; 306 u8 mod_reg = 0; 307 int ret, i; 308 309 for (i = 0; i < F81604_SET_DEVICE_RETRY; i++) { 310 ret = f81604_sja1000_read(priv, F81604_SJA1000_MOD, &tmp); 311 if (ret) 312 return ret; 313 314 /* check reset bit */ 315 if ((tmp & F81604_SJA1000_MOD_RM) == 0) { 316 priv->can.state = CAN_STATE_ERROR_ACTIVE; 317 /* enable interrupts, RI handled by bulk-in */ 318 ier = F81604_SJA1000_IRQ_ALL & ~F81604_SJA1000_IRQ_RI; 319 if (!(priv->can.ctrlmode & 320 CAN_CTRLMODE_BERR_REPORTING)) 321 ier &= ~F81604_SJA1000_IRQ_BEI; 322 323 return f81604_sja1000_write(priv, F81604_SJA1000_IER, 324 ier); 325 } 326 327 /* set chip to normal mode */ 328 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) 329 mod_reg |= F81604_SJA1000_MOD_LOM; 330 if (priv->can.ctrlmode & CAN_CTRLMODE_PRESUME_ACK) 331 mod_reg |= F81604_SJA1000_MOD_STM; 332 333 ret = f81604_sja1000_write(priv, F81604_SJA1000_MOD, mod_reg); 334 if (ret) 335 return ret; 336 } 337 338 return -EPERM; 339 } 340 341 static int f81604_chipset_init(struct f81604_port_priv *priv) 342 { 343 int i, ret; 344 345 /* set clock divider and output control register */ 346 ret = f81604_sja1000_write(priv, F81604_SJA1000_CDR, 347 CDR_CBP | CDR_PELICAN); 348 if (ret) 349 return ret; 350 351 /* set acceptance filter (accept all) */ 352 for (i = 0; i < F81604_MAX_FILTER_CNT; ++i) { 353 ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCC0 + i, 0); 354 if (ret) 355 return ret; 356 } 357 358 for (i = 0; i < F81604_MAX_FILTER_CNT; ++i) { 359 ret = f81604_sja1000_write(priv, F81604_SJA1000_ACCM0 + i, 360 0xFF); 361 if (ret) 362 return ret; 363 } 364 365 return f81604_sja1000_write(priv, F81604_SJA1000_OCR, 366 OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL | 367 OCR_MODE_NORMAL); 368 } 369 370 static void f81604_process_rx_packet(struct net_device *netdev, 371 struct f81604_can_frame *frame) 372 { 373 struct net_device_stats *stats = &netdev->stats; 374 struct can_frame *cf; 375 struct sk_buff *skb; 376 377 if (frame->cmd != F81604_CMD_DATA) 378 return; 379 380 skb = alloc_can_skb(netdev, &cf); 381 if (!skb) { 382 stats->rx_dropped++; 383 return; 384 } 385 386 cf->len = can_cc_dlc2len(frame->dlc & F81604_DLC_LEN_MASK); 387 388 if (frame->dlc & F81604_DLC_EFF_BIT) { 389 cf->can_id = get_unaligned_be32(&frame->eff.id) >> 390 F81604_EFF_SHIFT; 391 cf->can_id |= CAN_EFF_FLAG; 392 393 if (!(frame->dlc & F81604_DLC_RTR_BIT)) 394 memcpy(cf->data, frame->eff.data, cf->len); 395 } else { 396 cf->can_id = get_unaligned_be16(&frame->sff.id) >> 397 F81604_SFF_SHIFT; 398 399 if (!(frame->dlc & F81604_DLC_RTR_BIT)) 400 memcpy(cf->data, frame->sff.data, cf->len); 401 } 402 403 if (frame->dlc & F81604_DLC_RTR_BIT) 404 cf->can_id |= CAN_RTR_FLAG; 405 else 406 stats->rx_bytes += cf->len; 407 408 stats->rx_packets++; 409 netif_rx(skb); 410 } 411 412 static void f81604_read_bulk_callback(struct urb *urb) 413 { 414 struct f81604_can_frame *frame = urb->transfer_buffer; 415 struct net_device *netdev = urb->context; 416 int ret; 417 418 if (!netif_device_present(netdev)) 419 return; 420 421 if (urb->status) 422 netdev_info(netdev, "%s: URB aborted %pe\n", __func__, 423 ERR_PTR(urb->status)); 424 425 switch (urb->status) { 426 case 0: /* success */ 427 break; 428 429 case -ENOENT: 430 case -EPIPE: 431 case -EPROTO: 432 case -ESHUTDOWN: 433 return; 434 435 default: 436 goto resubmit_urb; 437 } 438 439 if (urb->actual_length != sizeof(*frame)) { 440 netdev_warn(netdev, "URB length %u not equal to %zu\n", 441 urb->actual_length, sizeof(*frame)); 442 goto resubmit_urb; 443 } 444 445 f81604_process_rx_packet(netdev, frame); 446 447 resubmit_urb: 448 ret = usb_submit_urb(urb, GFP_ATOMIC); 449 if (ret == -ENODEV) 450 netif_device_detach(netdev); 451 else if (ret) 452 netdev_err(netdev, 453 "%s: failed to resubmit read bulk urb: %pe\n", 454 __func__, ERR_PTR(ret)); 455 } 456 457 static void f81604_handle_tx(struct f81604_port_priv *priv, 458 struct f81604_int_data *data) 459 { 460 struct net_device *netdev = priv->netdev; 461 struct net_device_stats *stats = &netdev->stats; 462 463 /* transmission buffer released */ 464 if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT && 465 !(data->sr & F81604_SJA1000_SR_TCS)) { 466 stats->tx_errors++; 467 can_free_echo_skb(netdev, 0, NULL); 468 } else { 469 /* transmission complete */ 470 stats->tx_bytes += can_get_echo_skb(netdev, 0, NULL); 471 stats->tx_packets++; 472 } 473 474 netif_wake_queue(netdev); 475 } 476 477 static void f81604_handle_can_bus_errors(struct f81604_port_priv *priv, 478 struct f81604_int_data *data) 479 { 480 enum can_state can_state = priv->can.state; 481 struct net_device *netdev = priv->netdev; 482 struct net_device_stats *stats = &netdev->stats; 483 struct can_frame *cf; 484 struct sk_buff *skb; 485 486 /* Note: ALC/ECC will not auto clear by read here, must be cleared by 487 * read register (via clear_reg_work). 488 */ 489 490 skb = alloc_can_err_skb(netdev, &cf); 491 if (skb) { 492 cf->can_id |= CAN_ERR_CNT; 493 cf->data[6] = data->txerr; 494 cf->data[7] = data->rxerr; 495 } 496 497 if (data->isrc & F81604_SJA1000_IRQ_DOI) { 498 /* data overrun interrupt */ 499 netdev_dbg(netdev, "data overrun interrupt\n"); 500 501 if (skb) { 502 cf->can_id |= CAN_ERR_CRTL; 503 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 504 } 505 506 stats->rx_over_errors++; 507 stats->rx_errors++; 508 509 set_bit(F81604_CLEAR_OVERRUN, &priv->clear_flags); 510 } 511 512 if (data->isrc & F81604_SJA1000_IRQ_EI) { 513 /* error warning interrupt */ 514 netdev_dbg(netdev, "error warning interrupt\n"); 515 516 if (data->sr & F81604_SJA1000_SR_BS) 517 can_state = CAN_STATE_BUS_OFF; 518 else if (data->sr & F81604_SJA1000_SR_ES) 519 can_state = CAN_STATE_ERROR_WARNING; 520 else 521 can_state = CAN_STATE_ERROR_ACTIVE; 522 } 523 524 if (data->isrc & F81604_SJA1000_IRQ_BEI) { 525 /* bus error interrupt */ 526 netdev_dbg(netdev, "bus error interrupt\n"); 527 528 priv->can.can_stats.bus_error++; 529 530 if (skb) { 531 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 532 533 /* set error type */ 534 switch (data->ecc & F81604_SJA1000_ECC_MASK) { 535 case F81604_SJA1000_ECC_BIT: 536 cf->data[2] |= CAN_ERR_PROT_BIT; 537 break; 538 case F81604_SJA1000_ECC_FORM: 539 cf->data[2] |= CAN_ERR_PROT_FORM; 540 break; 541 case F81604_SJA1000_ECC_STUFF: 542 cf->data[2] |= CAN_ERR_PROT_STUFF; 543 break; 544 default: 545 break; 546 } 547 548 /* set error location */ 549 cf->data[3] = data->ecc & F81604_SJA1000_ECC_SEG; 550 } 551 552 /* Error occurred during transmission? */ 553 if ((data->ecc & F81604_SJA1000_ECC_DIR) == 0) { 554 stats->tx_errors++; 555 if (skb) 556 cf->data[2] |= CAN_ERR_PROT_TX; 557 } else { 558 stats->rx_errors++; 559 } 560 561 set_bit(F81604_CLEAR_ECC, &priv->clear_flags); 562 } 563 564 if (data->isrc & F81604_SJA1000_IRQ_EPI) { 565 if (can_state == CAN_STATE_ERROR_PASSIVE) 566 can_state = CAN_STATE_ERROR_WARNING; 567 else 568 can_state = CAN_STATE_ERROR_PASSIVE; 569 570 /* error passive interrupt */ 571 netdev_dbg(netdev, "error passive interrupt: %d\n", can_state); 572 } 573 574 if (data->isrc & F81604_SJA1000_IRQ_ALI) { 575 /* arbitration lost interrupt */ 576 netdev_dbg(netdev, "arbitration lost interrupt\n"); 577 578 priv->can.can_stats.arbitration_lost++; 579 580 if (skb) { 581 cf->can_id |= CAN_ERR_LOSTARB; 582 cf->data[0] = data->alc & F81604_SJA1000_ALC_MASK; 583 } 584 585 set_bit(F81604_CLEAR_ALC, &priv->clear_flags); 586 } 587 588 if (can_state != priv->can.state) { 589 enum can_state tx_state, rx_state; 590 591 tx_state = data->txerr >= data->rxerr ? can_state : 0; 592 rx_state = data->txerr <= data->rxerr ? can_state : 0; 593 594 can_change_state(netdev, cf, tx_state, rx_state); 595 596 if (can_state == CAN_STATE_BUS_OFF) 597 can_bus_off(netdev); 598 } 599 600 if (priv->clear_flags) 601 schedule_work(&priv->clear_reg_work); 602 603 if (skb) 604 netif_rx(skb); 605 } 606 607 static void f81604_read_int_callback(struct urb *urb) 608 { 609 struct f81604_int_data *data = urb->transfer_buffer; 610 struct net_device *netdev = urb->context; 611 struct f81604_port_priv *priv; 612 int ret; 613 614 priv = netdev_priv(netdev); 615 616 if (!netif_device_present(netdev)) 617 return; 618 619 if (urb->status) 620 netdev_info(netdev, "%s: Int URB aborted: %pe\n", __func__, 621 ERR_PTR(urb->status)); 622 623 switch (urb->status) { 624 case 0: /* success */ 625 break; 626 627 case -ENOENT: 628 case -EPIPE: 629 case -EPROTO: 630 case -ESHUTDOWN: 631 return; 632 633 default: 634 goto resubmit_urb; 635 } 636 637 /* handle Errors */ 638 if (data->isrc & (F81604_SJA1000_IRQ_DOI | F81604_SJA1000_IRQ_EI | 639 F81604_SJA1000_IRQ_BEI | F81604_SJA1000_IRQ_EPI | 640 F81604_SJA1000_IRQ_ALI)) 641 f81604_handle_can_bus_errors(priv, data); 642 643 /* handle TX */ 644 if (priv->can.state != CAN_STATE_BUS_OFF && 645 (data->isrc & F81604_SJA1000_IRQ_TI)) 646 f81604_handle_tx(priv, data); 647 648 resubmit_urb: 649 ret = usb_submit_urb(urb, GFP_ATOMIC); 650 if (ret == -ENODEV) 651 netif_device_detach(netdev); 652 else if (ret) 653 netdev_err(netdev, "%s: failed to resubmit int urb: %pe\n", 654 __func__, ERR_PTR(ret)); 655 } 656 657 static void f81604_unregister_urbs(struct f81604_port_priv *priv) 658 { 659 usb_kill_anchored_urbs(&priv->urbs_anchor); 660 } 661 662 static int f81604_register_urbs(struct f81604_port_priv *priv) 663 { 664 struct net_device *netdev = priv->netdev; 665 struct f81604_int_data *int_data; 666 int id = netdev->dev_port; 667 struct urb *int_urb; 668 int rx_urb_cnt; 669 int ret; 670 671 for (rx_urb_cnt = 0; rx_urb_cnt < F81604_MAX_RX_URBS; ++rx_urb_cnt) { 672 struct f81604_can_frame *frame; 673 struct urb *rx_urb; 674 675 rx_urb = usb_alloc_urb(0, GFP_KERNEL); 676 if (!rx_urb) { 677 ret = -ENOMEM; 678 break; 679 } 680 681 frame = kmalloc(sizeof(*frame), GFP_KERNEL); 682 if (!frame) { 683 usb_free_urb(rx_urb); 684 ret = -ENOMEM; 685 break; 686 } 687 688 usb_fill_bulk_urb(rx_urb, priv->dev, 689 usb_rcvbulkpipe(priv->dev, bulk_in_addr[id]), 690 frame, sizeof(*frame), 691 f81604_read_bulk_callback, netdev); 692 693 rx_urb->transfer_flags |= URB_FREE_BUFFER; 694 usb_anchor_urb(rx_urb, &priv->urbs_anchor); 695 696 ret = usb_submit_urb(rx_urb, GFP_KERNEL); 697 if (ret) { 698 usb_unanchor_urb(rx_urb); 699 usb_free_urb(rx_urb); 700 break; 701 } 702 703 /* Drop reference, USB core will take care of freeing it */ 704 usb_free_urb(rx_urb); 705 } 706 707 if (rx_urb_cnt == 0) { 708 netdev_warn(netdev, "%s: submit rx urb failed: %pe\n", 709 __func__, ERR_PTR(ret)); 710 711 goto error; 712 } 713 714 int_urb = usb_alloc_urb(0, GFP_KERNEL); 715 if (!int_urb) { 716 ret = -ENOMEM; 717 goto error; 718 } 719 720 int_data = kmalloc(sizeof(*int_data), GFP_KERNEL); 721 if (!int_data) { 722 usb_free_urb(int_urb); 723 ret = -ENOMEM; 724 goto error; 725 } 726 727 usb_fill_int_urb(int_urb, priv->dev, 728 usb_rcvintpipe(priv->dev, int_in_addr[id]), int_data, 729 sizeof(*int_data), f81604_read_int_callback, netdev, 730 1); 731 732 int_urb->transfer_flags |= URB_FREE_BUFFER; 733 usb_anchor_urb(int_urb, &priv->urbs_anchor); 734 735 ret = usb_submit_urb(int_urb, GFP_KERNEL); 736 if (ret) { 737 usb_unanchor_urb(int_urb); 738 usb_free_urb(int_urb); 739 740 netdev_warn(netdev, "%s: submit int urb failed: %pe\n", 741 __func__, ERR_PTR(ret)); 742 goto error; 743 } 744 745 /* Drop reference, USB core will take care of freeing it */ 746 usb_free_urb(int_urb); 747 748 return 0; 749 750 error: 751 f81604_unregister_urbs(priv); 752 return ret; 753 } 754 755 static int f81604_start(struct net_device *netdev) 756 { 757 struct f81604_port_priv *priv = netdev_priv(netdev); 758 int ret; 759 u8 mode; 760 u8 tmp; 761 762 mode = F81604_RX_AUTO_RELEASE_BUF | F81604_INT_WHEN_CHANGE; 763 764 /* Set TR/AT mode */ 765 if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT) 766 mode |= F81604_TX_ONESHOT; 767 else 768 mode |= F81604_TX_NORMAL; 769 770 ret = f81604_sja1000_write(priv, F81604_CTRL_MODE_REG, mode); 771 if (ret) 772 return ret; 773 774 /* set reset mode */ 775 ret = f81604_set_reset_mode(priv); 776 if (ret) 777 return ret; 778 779 ret = f81604_chipset_init(priv); 780 if (ret) 781 return ret; 782 783 /* Clear error counters and error code capture */ 784 ret = f81604_sja1000_write(priv, F81604_SJA1000_TXERR, 0); 785 if (ret) 786 return ret; 787 788 ret = f81604_sja1000_write(priv, F81604_SJA1000_RXERR, 0); 789 if (ret) 790 return ret; 791 792 /* Read clear for ECC/ALC/IR register */ 793 ret = f81604_sja1000_read(priv, F81604_SJA1000_ECC, &tmp); 794 if (ret) 795 return ret; 796 797 ret = f81604_sja1000_read(priv, F81604_SJA1000_ALC, &tmp); 798 if (ret) 799 return ret; 800 801 ret = f81604_sja1000_read(priv, F81604_SJA1000_IR, &tmp); 802 if (ret) 803 return ret; 804 805 ret = f81604_register_urbs(priv); 806 if (ret) 807 return ret; 808 809 ret = f81604_set_normal_mode(priv); 810 if (ret) { 811 f81604_unregister_urbs(priv); 812 return ret; 813 } 814 815 return 0; 816 } 817 818 static int f81604_set_bittiming(struct net_device *dev) 819 { 820 struct f81604_port_priv *priv = netdev_priv(dev); 821 struct can_bittiming *bt = &priv->can.bittiming; 822 u8 btr0, btr1; 823 int ret; 824 825 btr0 = FIELD_PREP(F81604_BRP_MASK, bt->brp - 1) | 826 FIELD_PREP(F81604_SJW_MASK, bt->sjw - 1); 827 828 btr1 = FIELD_PREP(F81604_SEG1_MASK, 829 bt->prop_seg + bt->phase_seg1 - 1) | 830 FIELD_PREP(F81604_SEG2_MASK, bt->phase_seg2 - 1); 831 832 if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) 833 btr1 |= F81604_SJA1000_BTR1_SAMPLE_TRIPLE; 834 835 ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR0, btr0); 836 if (ret) { 837 netdev_warn(dev, "%s: Set BTR0 failed: %pe\n", __func__, 838 ERR_PTR(ret)); 839 return ret; 840 } 841 842 ret = f81604_sja1000_write(priv, F81604_SJA1000_BTR1, btr1); 843 if (ret) { 844 netdev_warn(dev, "%s: Set BTR1 failed: %pe\n", __func__, 845 ERR_PTR(ret)); 846 return ret; 847 } 848 849 return 0; 850 } 851 852 static int f81604_set_mode(struct net_device *netdev, enum can_mode mode) 853 { 854 int ret; 855 856 switch (mode) { 857 case CAN_MODE_START: 858 ret = f81604_start(netdev); 859 if (!ret && netif_queue_stopped(netdev)) 860 netif_wake_queue(netdev); 861 break; 862 863 default: 864 ret = -EOPNOTSUPP; 865 } 866 867 return ret; 868 } 869 870 static void f81604_write_bulk_callback(struct urb *urb) 871 { 872 struct net_device *netdev = urb->context; 873 874 if (!netif_device_present(netdev)) 875 return; 876 877 if (urb->status) 878 netdev_info(netdev, "%s: Tx URB error: %pe\n", __func__, 879 ERR_PTR(urb->status)); 880 } 881 882 static void f81604_clear_reg_work(struct work_struct *work) 883 { 884 struct f81604_port_priv *priv; 885 u8 tmp; 886 887 priv = container_of(work, struct f81604_port_priv, clear_reg_work); 888 889 /* dummy read for clear Arbitration lost capture(ALC) register. */ 890 if (test_and_clear_bit(F81604_CLEAR_ALC, &priv->clear_flags)) 891 f81604_sja1000_read(priv, F81604_SJA1000_ALC, &tmp); 892 893 /* dummy read for clear Error code capture(ECC) register. */ 894 if (test_and_clear_bit(F81604_CLEAR_ECC, &priv->clear_flags)) 895 f81604_sja1000_read(priv, F81604_SJA1000_ECC, &tmp); 896 897 /* dummy write for clear data overrun flag. */ 898 if (test_and_clear_bit(F81604_CLEAR_OVERRUN, &priv->clear_flags)) 899 f81604_sja1000_write(priv, F81604_SJA1000_CMR, 900 F81604_SJA1000_CMD_CDO); 901 } 902 903 static netdev_tx_t f81604_start_xmit(struct sk_buff *skb, 904 struct net_device *netdev) 905 { 906 struct can_frame *cf = (struct can_frame *)skb->data; 907 struct f81604_port_priv *priv = netdev_priv(netdev); 908 struct net_device_stats *stats = &netdev->stats; 909 struct f81604_can_frame *frame; 910 struct urb *write_urb; 911 int ret; 912 913 if (can_dev_dropped_skb(netdev, skb)) 914 return NETDEV_TX_OK; 915 916 netif_stop_queue(netdev); 917 918 write_urb = usb_alloc_urb(0, GFP_ATOMIC); 919 if (!write_urb) 920 goto nomem_urb; 921 922 frame = kzalloc(sizeof(*frame), GFP_ATOMIC); 923 if (!frame) 924 goto nomem_buf; 925 926 usb_fill_bulk_urb(write_urb, priv->dev, 927 usb_sndbulkpipe(priv->dev, 928 bulk_out_addr[netdev->dev_port]), 929 frame, sizeof(*frame), f81604_write_bulk_callback, 930 priv->netdev); 931 932 write_urb->transfer_flags |= URB_FREE_BUFFER; 933 934 frame->cmd = F81604_CMD_DATA; 935 frame->dlc = cf->len; 936 937 if (cf->can_id & CAN_RTR_FLAG) 938 frame->dlc |= F81604_DLC_RTR_BIT; 939 940 if (cf->can_id & CAN_EFF_FLAG) { 941 u32 id = (cf->can_id & CAN_EFF_MASK) << F81604_EFF_SHIFT; 942 943 put_unaligned_be32(id, &frame->eff.id); 944 945 frame->dlc |= F81604_DLC_EFF_BIT; 946 947 if (!(cf->can_id & CAN_RTR_FLAG)) 948 memcpy(&frame->eff.data, cf->data, cf->len); 949 } else { 950 u32 id = (cf->can_id & CAN_SFF_MASK) << F81604_SFF_SHIFT; 951 952 put_unaligned_be16(id, &frame->sff.id); 953 954 if (!(cf->can_id & CAN_RTR_FLAG)) 955 memcpy(&frame->sff.data, cf->data, cf->len); 956 } 957 958 can_put_echo_skb(skb, netdev, 0, 0); 959 960 ret = usb_submit_urb(write_urb, GFP_ATOMIC); 961 if (ret) { 962 netdev_err(netdev, "%s: failed to resubmit tx bulk urb: %pe\n", 963 __func__, ERR_PTR(ret)); 964 965 can_free_echo_skb(netdev, 0, NULL); 966 stats->tx_dropped++; 967 stats->tx_errors++; 968 969 if (ret == -ENODEV) 970 netif_device_detach(netdev); 971 else 972 netif_wake_queue(netdev); 973 } 974 975 /* let usb core take care of this urb */ 976 usb_free_urb(write_urb); 977 978 return NETDEV_TX_OK; 979 980 nomem_buf: 981 usb_free_urb(write_urb); 982 983 nomem_urb: 984 dev_kfree_skb(skb); 985 stats->tx_dropped++; 986 stats->tx_errors++; 987 netif_wake_queue(netdev); 988 989 return NETDEV_TX_OK; 990 } 991 992 static int f81604_get_berr_counter(const struct net_device *netdev, 993 struct can_berr_counter *bec) 994 { 995 struct f81604_port_priv *priv = netdev_priv(netdev); 996 u8 txerr, rxerr; 997 int ret; 998 999 ret = f81604_sja1000_read(priv, F81604_SJA1000_TXERR, &txerr); 1000 if (ret) 1001 return ret; 1002 1003 ret = f81604_sja1000_read(priv, F81604_SJA1000_RXERR, &rxerr); 1004 if (ret) 1005 return ret; 1006 1007 bec->txerr = txerr; 1008 bec->rxerr = rxerr; 1009 1010 return 0; 1011 } 1012 1013 /* Open USB device */ 1014 static int f81604_open(struct net_device *netdev) 1015 { 1016 int ret; 1017 1018 ret = open_candev(netdev); 1019 if (ret) 1020 return ret; 1021 1022 ret = f81604_start(netdev); 1023 if (ret) { 1024 if (ret == -ENODEV) 1025 netif_device_detach(netdev); 1026 1027 close_candev(netdev); 1028 return ret; 1029 } 1030 1031 netif_start_queue(netdev); 1032 return 0; 1033 } 1034 1035 /* Close USB device */ 1036 static int f81604_close(struct net_device *netdev) 1037 { 1038 struct f81604_port_priv *priv = netdev_priv(netdev); 1039 1040 f81604_set_reset_mode(priv); 1041 1042 netif_stop_queue(netdev); 1043 cancel_work_sync(&priv->clear_reg_work); 1044 close_candev(netdev); 1045 1046 f81604_unregister_urbs(priv); 1047 1048 return 0; 1049 } 1050 1051 static const struct net_device_ops f81604_netdev_ops = { 1052 .ndo_open = f81604_open, 1053 .ndo_stop = f81604_close, 1054 .ndo_start_xmit = f81604_start_xmit, 1055 .ndo_change_mtu = can_change_mtu, 1056 }; 1057 1058 static const struct can_bittiming_const f81604_bittiming_const = { 1059 .name = KBUILD_MODNAME, 1060 .tseg1_min = 1, 1061 .tseg1_max = 16, 1062 .tseg2_min = 1, 1063 .tseg2_max = 8, 1064 .sjw_max = 4, 1065 .brp_min = 1, 1066 .brp_max = 64, 1067 .brp_inc = 1, 1068 }; 1069 1070 /* Called by the usb core when driver is unloaded or device is removed */ 1071 static void f81604_disconnect(struct usb_interface *intf) 1072 { 1073 struct f81604_priv *priv = usb_get_intfdata(intf); 1074 int i; 1075 1076 for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) { 1077 if (!priv->netdev[i]) 1078 continue; 1079 1080 unregister_netdev(priv->netdev[i]); 1081 free_candev(priv->netdev[i]); 1082 } 1083 } 1084 1085 static int __f81604_set_termination(struct usb_device *dev, int idx, u16 term) 1086 { 1087 u8 mask, data = 0; 1088 1089 if (idx == 0) 1090 mask = F81604_CAN0_TERM; 1091 else 1092 mask = F81604_CAN1_TERM; 1093 1094 if (term) 1095 data = mask; 1096 1097 return f81604_update_bits(dev, F81604_TERMINATOR_REG, mask, data); 1098 } 1099 1100 static int f81604_set_termination(struct net_device *netdev, u16 term) 1101 { 1102 struct f81604_port_priv *port_priv = netdev_priv(netdev); 1103 1104 ASSERT_RTNL(); 1105 1106 return __f81604_set_termination(port_priv->dev, netdev->dev_port, 1107 term); 1108 } 1109 1110 static int f81604_probe(struct usb_interface *intf, 1111 const struct usb_device_id *id) 1112 { 1113 struct usb_device *dev = interface_to_usbdev(intf); 1114 struct net_device *netdev; 1115 struct f81604_priv *priv; 1116 int i, ret; 1117 1118 priv = devm_kzalloc(&intf->dev, sizeof(*priv), GFP_KERNEL); 1119 if (!priv) 1120 return -ENOMEM; 1121 1122 usb_set_intfdata(intf, priv); 1123 1124 for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) { 1125 ret = __f81604_set_termination(dev, i, 0); 1126 if (ret) { 1127 dev_err(&intf->dev, 1128 "Setting termination of CH#%d failed: %pe\n", 1129 i, ERR_PTR(ret)); 1130 return ret; 1131 } 1132 } 1133 1134 for (i = 0; i < ARRAY_SIZE(priv->netdev); ++i) { 1135 struct f81604_port_priv *port_priv; 1136 1137 netdev = alloc_candev(sizeof(*port_priv), 1); 1138 if (!netdev) { 1139 dev_err(&intf->dev, "Couldn't alloc candev: %d\n", i); 1140 ret = -ENOMEM; 1141 1142 goto failure_cleanup; 1143 } 1144 1145 port_priv = netdev_priv(netdev); 1146 1147 INIT_WORK(&port_priv->clear_reg_work, f81604_clear_reg_work); 1148 init_usb_anchor(&port_priv->urbs_anchor); 1149 1150 port_priv->intf = intf; 1151 port_priv->dev = dev; 1152 port_priv->netdev = netdev; 1153 port_priv->can.clock.freq = F81604_CAN_CLOCK; 1154 1155 port_priv->can.termination_const = f81604_termination; 1156 port_priv->can.termination_const_cnt = 1157 ARRAY_SIZE(f81604_termination); 1158 port_priv->can.bittiming_const = &f81604_bittiming_const; 1159 port_priv->can.do_set_bittiming = f81604_set_bittiming; 1160 port_priv->can.do_set_mode = f81604_set_mode; 1161 port_priv->can.do_set_termination = f81604_set_termination; 1162 port_priv->can.do_get_berr_counter = f81604_get_berr_counter; 1163 port_priv->can.ctrlmode_supported = 1164 CAN_CTRLMODE_LISTENONLY | CAN_CTRLMODE_3_SAMPLES | 1165 CAN_CTRLMODE_ONE_SHOT | CAN_CTRLMODE_BERR_REPORTING | 1166 CAN_CTRLMODE_PRESUME_ACK; 1167 1168 netdev->ethtool_ops = &f81604_ethtool_ops; 1169 netdev->netdev_ops = &f81604_netdev_ops; 1170 netdev->flags |= IFF_ECHO; 1171 netdev->dev_port = i; 1172 1173 SET_NETDEV_DEV(netdev, &intf->dev); 1174 1175 ret = register_candev(netdev); 1176 if (ret) { 1177 netdev_err(netdev, "register CAN device failed: %pe\n", 1178 ERR_PTR(ret)); 1179 free_candev(netdev); 1180 1181 goto failure_cleanup; 1182 } 1183 1184 priv->netdev[i] = netdev; 1185 } 1186 1187 return 0; 1188 1189 failure_cleanup: 1190 f81604_disconnect(intf); 1191 return ret; 1192 } 1193 1194 static struct usb_driver f81604_driver = { 1195 .name = KBUILD_MODNAME, 1196 .probe = f81604_probe, 1197 .disconnect = f81604_disconnect, 1198 .id_table = f81604_table, 1199 }; 1200 1201 module_usb_driver(f81604_driver); 1202 1203 MODULE_AUTHOR("Ji-Ze Hong (Peter Hong) <peter_hong@fintek.com.tw>"); 1204 MODULE_DESCRIPTION("Fintek F81604 USB to 2xCANBUS"); 1205 MODULE_LICENSE("GPL"); 1206