1 /* 2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver 3 * 4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/interrupt.h> 15 #include <linux/delay.h> 16 #include <linux/platform_device.h> 17 18 #include <linux/netdevice.h> 19 #include <linux/can.h> 20 #include <linux/can/dev.h> 21 #include <linux/can/skb.h> 22 #include <linux/can/error.h> 23 24 #include <linux/mfd/janz.h> 25 #include <asm/io.h> 26 27 /* the DPM has 64k of memory, organized into 256x 256 byte pages */ 28 #define DPM_NUM_PAGES 256 29 #define DPM_PAGE_SIZE 256 30 #define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE) 31 32 /* JANZ ICAN3 "old-style" host interface queue page numbers */ 33 #define QUEUE_OLD_CONTROL 0 34 #define QUEUE_OLD_RB0 1 35 #define QUEUE_OLD_RB1 2 36 #define QUEUE_OLD_WB0 3 37 #define QUEUE_OLD_WB1 4 38 39 /* Janz ICAN3 "old-style" host interface control registers */ 40 #define MSYNC_PEER 0x00 /* ICAN only */ 41 #define MSYNC_LOCL 0x01 /* host only */ 42 #define TARGET_RUNNING 0x02 43 #define FIRMWARE_STAMP 0x60 /* big endian firmware stamp */ 44 45 #define MSYNC_RB0 0x01 46 #define MSYNC_RB1 0x02 47 #define MSYNC_RBLW 0x04 48 #define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1) 49 50 #define MSYNC_WB0 0x10 51 #define MSYNC_WB1 0x20 52 #define MSYNC_WBLW 0x40 53 #define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1) 54 55 /* Janz ICAN3 "new-style" host interface queue page numbers */ 56 #define QUEUE_TOHOST 5 57 #define QUEUE_FROMHOST_MID 6 58 #define QUEUE_FROMHOST_HIGH 7 59 #define QUEUE_FROMHOST_LOW 8 60 61 /* The first free page in the DPM is #9 */ 62 #define DPM_FREE_START 9 63 64 /* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */ 65 #define DESC_VALID 0x80 66 #define DESC_WRAP 0x40 67 #define DESC_INTERRUPT 0x20 68 #define DESC_IVALID 0x10 69 #define DESC_LEN(len) (len) 70 71 /* Janz ICAN3 Firmware Messages */ 72 #define MSG_CONNECTI 0x02 73 #define MSG_DISCONNECT 0x03 74 #define MSG_IDVERS 0x04 75 #define MSG_MSGLOST 0x05 76 #define MSG_NEWHOSTIF 0x08 77 #define MSG_INQUIRY 0x0a 78 #define MSG_SETAFILMASK 0x10 79 #define MSG_INITFDPMQUEUE 0x11 80 #define MSG_HWCONF 0x12 81 #define MSG_FMSGLOST 0x15 82 #define MSG_CEVTIND 0x37 83 #define MSG_CBTRREQ 0x41 84 #define MSG_COFFREQ 0x42 85 #define MSG_CONREQ 0x43 86 #define MSG_CCONFREQ 0x47 87 #define MSG_LMTS 0xb4 88 89 /* 90 * Janz ICAN3 CAN Inquiry Message Types 91 * 92 * NOTE: there appears to be a firmware bug here. You must send 93 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED 94 * NOTE: response. The controller never responds to a message with 95 * NOTE: the INQUIRY_EXTENDED subspec :( 96 */ 97 #define INQUIRY_STATUS 0x00 98 #define INQUIRY_TERMINATION 0x01 99 #define INQUIRY_EXTENDED 0x04 100 101 /* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */ 102 #define SETAFILMASK_REJECT 0x00 103 #define SETAFILMASK_FASTIF 0x02 104 105 /* Janz ICAN3 CAN Hardware Configuration Message Types */ 106 #define HWCONF_TERMINATE_ON 0x01 107 #define HWCONF_TERMINATE_OFF 0x00 108 109 /* Janz ICAN3 CAN Event Indication Message Types */ 110 #define CEVTIND_EI 0x01 111 #define CEVTIND_DOI 0x02 112 #define CEVTIND_LOST 0x04 113 #define CEVTIND_FULL 0x08 114 #define CEVTIND_BEI 0x10 115 116 #define CEVTIND_CHIP_SJA1000 0x02 117 118 #define ICAN3_BUSERR_QUOTA_MAX 255 119 120 /* Janz ICAN3 CAN Frame Conversion */ 121 #define ICAN3_SNGL 0x02 122 #define ICAN3_ECHO 0x10 123 #define ICAN3_EFF_RTR 0x40 124 #define ICAN3_SFF_RTR 0x10 125 #define ICAN3_EFF 0x80 126 127 #define ICAN3_CAN_TYPE_MASK 0x0f 128 #define ICAN3_CAN_TYPE_SFF 0x00 129 #define ICAN3_CAN_TYPE_EFF 0x01 130 131 #define ICAN3_CAN_DLC_MASK 0x0f 132 133 /* 134 * SJA1000 Status and Error Register Definitions 135 * 136 * Copied from drivers/net/can/sja1000/sja1000.h 137 */ 138 139 /* status register content */ 140 #define SR_BS 0x80 141 #define SR_ES 0x40 142 #define SR_TS 0x20 143 #define SR_RS 0x10 144 #define SR_TCS 0x08 145 #define SR_TBS 0x04 146 #define SR_DOS 0x02 147 #define SR_RBS 0x01 148 149 #define SR_CRIT (SR_BS|SR_ES) 150 151 /* ECC register */ 152 #define ECC_SEG 0x1F 153 #define ECC_DIR 0x20 154 #define ECC_ERR 6 155 #define ECC_BIT 0x00 156 #define ECC_FORM 0x40 157 #define ECC_STUFF 0x80 158 #define ECC_MASK 0xc0 159 160 /* Number of buffers for use in the "new-style" host interface */ 161 #define ICAN3_NEW_BUFFERS 16 162 163 /* Number of buffers for use in the "fast" host interface */ 164 #define ICAN3_TX_BUFFERS 512 165 #define ICAN3_RX_BUFFERS 1024 166 167 /* SJA1000 Clock Input */ 168 #define ICAN3_CAN_CLOCK 8000000 169 170 /* Janz ICAN3 firmware types */ 171 enum ican3_fwtype { 172 ICAN3_FWTYPE_ICANOS, 173 ICAN3_FWTYPE_CAL_CANOPEN, 174 }; 175 176 /* Driver Name */ 177 #define DRV_NAME "janz-ican3" 178 179 /* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */ 180 struct ican3_dpm_control { 181 /* window address register */ 182 u8 window_address; 183 u8 unused1; 184 185 /* 186 * Read access: clear interrupt from microcontroller 187 * Write access: send interrupt to microcontroller 188 */ 189 u8 interrupt; 190 u8 unused2; 191 192 /* write-only: reset all hardware on the module */ 193 u8 hwreset; 194 u8 unused3; 195 196 /* write-only: generate an interrupt to the TPU */ 197 u8 tpuinterrupt; 198 }; 199 200 struct ican3_dev { 201 202 /* must be the first member */ 203 struct can_priv can; 204 205 /* CAN network device */ 206 struct net_device *ndev; 207 struct napi_struct napi; 208 209 /* module number */ 210 unsigned int num; 211 212 /* base address of registers and IRQ */ 213 struct janz_cmodio_onboard_regs __iomem *ctrl; 214 struct ican3_dpm_control __iomem *dpmctrl; 215 void __iomem *dpm; 216 int irq; 217 218 /* CAN bus termination status */ 219 struct completion termination_comp; 220 bool termination_enabled; 221 222 /* CAN bus error status registers */ 223 struct completion buserror_comp; 224 struct can_berr_counter bec; 225 226 /* firmware type */ 227 enum ican3_fwtype fwtype; 228 char fwinfo[32]; 229 230 /* old and new style host interface */ 231 unsigned int iftype; 232 233 /* queue for echo packets */ 234 struct sk_buff_head echoq; 235 236 /* 237 * Any function which changes the current DPM page must hold this 238 * lock while it is performing data accesses. This ensures that the 239 * function will not be preempted and end up reading data from a 240 * different DPM page than it expects. 241 */ 242 spinlock_t lock; 243 244 /* new host interface */ 245 unsigned int rx_int; 246 unsigned int rx_num; 247 unsigned int tx_num; 248 249 /* fast host interface */ 250 unsigned int fastrx_start; 251 unsigned int fastrx_num; 252 unsigned int fasttx_start; 253 unsigned int fasttx_num; 254 255 /* first free DPM page */ 256 unsigned int free_page; 257 }; 258 259 struct ican3_msg { 260 u8 control; 261 u8 spec; 262 __le16 len; 263 u8 data[252]; 264 }; 265 266 struct ican3_new_desc { 267 u8 control; 268 u8 pointer; 269 }; 270 271 struct ican3_fast_desc { 272 u8 control; 273 u8 command; 274 u8 data[14]; 275 }; 276 277 /* write to the window basic address register */ 278 static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page) 279 { 280 BUG_ON(page >= DPM_NUM_PAGES); 281 iowrite8(page, &mod->dpmctrl->window_address); 282 } 283 284 /* 285 * ICAN3 "old-style" host interface 286 */ 287 288 /* 289 * Receive a message from the ICAN3 "old-style" firmware interface 290 * 291 * LOCKING: must hold mod->lock 292 * 293 * returns 0 on success, -ENOMEM when no message exists 294 */ 295 static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 296 { 297 unsigned int mbox, mbox_page; 298 u8 locl, peer, xord; 299 300 /* get the MSYNC registers */ 301 ican3_set_page(mod, QUEUE_OLD_CONTROL); 302 peer = ioread8(mod->dpm + MSYNC_PEER); 303 locl = ioread8(mod->dpm + MSYNC_LOCL); 304 xord = locl ^ peer; 305 306 if ((xord & MSYNC_RB_MASK) == 0x00) { 307 netdev_dbg(mod->ndev, "no mbox for reading\n"); 308 return -ENOMEM; 309 } 310 311 /* find the first free mbox to read */ 312 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK) 313 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1; 314 else 315 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1; 316 317 /* copy the message */ 318 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1; 319 ican3_set_page(mod, mbox_page); 320 memcpy_fromio(msg, mod->dpm, sizeof(*msg)); 321 322 /* 323 * notify the firmware that the read buffer is available 324 * for it to fill again 325 */ 326 locl ^= mbox; 327 328 ican3_set_page(mod, QUEUE_OLD_CONTROL); 329 iowrite8(locl, mod->dpm + MSYNC_LOCL); 330 return 0; 331 } 332 333 /* 334 * Send a message through the "old-style" firmware interface 335 * 336 * LOCKING: must hold mod->lock 337 * 338 * returns 0 on success, -ENOMEM when no free space exists 339 */ 340 static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 341 { 342 unsigned int mbox, mbox_page; 343 u8 locl, peer, xord; 344 345 /* get the MSYNC registers */ 346 ican3_set_page(mod, QUEUE_OLD_CONTROL); 347 peer = ioread8(mod->dpm + MSYNC_PEER); 348 locl = ioread8(mod->dpm + MSYNC_LOCL); 349 xord = locl ^ peer; 350 351 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) { 352 netdev_err(mod->ndev, "no mbox for writing\n"); 353 return -ENOMEM; 354 } 355 356 /* calculate a free mbox to use */ 357 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0; 358 359 /* copy the message to the DPM */ 360 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1; 361 ican3_set_page(mod, mbox_page); 362 memcpy_toio(mod->dpm, msg, sizeof(*msg)); 363 364 locl ^= mbox; 365 if (mbox == MSYNC_WB1) 366 locl |= MSYNC_WBLW; 367 368 ican3_set_page(mod, QUEUE_OLD_CONTROL); 369 iowrite8(locl, mod->dpm + MSYNC_LOCL); 370 return 0; 371 } 372 373 /* 374 * ICAN3 "new-style" Host Interface Setup 375 */ 376 377 static void ican3_init_new_host_interface(struct ican3_dev *mod) 378 { 379 struct ican3_new_desc desc; 380 unsigned long flags; 381 void __iomem *dst; 382 int i; 383 384 spin_lock_irqsave(&mod->lock, flags); 385 386 /* setup the internal datastructures for RX */ 387 mod->rx_num = 0; 388 mod->rx_int = 0; 389 390 /* tohost queue descriptors are in page 5 */ 391 ican3_set_page(mod, QUEUE_TOHOST); 392 dst = mod->dpm; 393 394 /* initialize the tohost (rx) queue descriptors: pages 9-24 */ 395 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) { 396 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */ 397 desc.pointer = mod->free_page; 398 399 /* set wrap flag on last buffer */ 400 if (i == ICAN3_NEW_BUFFERS - 1) 401 desc.control |= DESC_WRAP; 402 403 memcpy_toio(dst, &desc, sizeof(desc)); 404 dst += sizeof(desc); 405 mod->free_page++; 406 } 407 408 /* fromhost (tx) mid queue descriptors are in page 6 */ 409 ican3_set_page(mod, QUEUE_FROMHOST_MID); 410 dst = mod->dpm; 411 412 /* setup the internal datastructures for TX */ 413 mod->tx_num = 0; 414 415 /* initialize the fromhost mid queue descriptors: pages 25-40 */ 416 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) { 417 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */ 418 desc.pointer = mod->free_page; 419 420 /* set wrap flag on last buffer */ 421 if (i == ICAN3_NEW_BUFFERS - 1) 422 desc.control |= DESC_WRAP; 423 424 memcpy_toio(dst, &desc, sizeof(desc)); 425 dst += sizeof(desc); 426 mod->free_page++; 427 } 428 429 /* fromhost hi queue descriptors are in page 7 */ 430 ican3_set_page(mod, QUEUE_FROMHOST_HIGH); 431 dst = mod->dpm; 432 433 /* initialize only a single buffer in the fromhost hi queue (unused) */ 434 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */ 435 desc.pointer = mod->free_page; 436 memcpy_toio(dst, &desc, sizeof(desc)); 437 mod->free_page++; 438 439 /* fromhost low queue descriptors are in page 8 */ 440 ican3_set_page(mod, QUEUE_FROMHOST_LOW); 441 dst = mod->dpm; 442 443 /* initialize only a single buffer in the fromhost low queue (unused) */ 444 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */ 445 desc.pointer = mod->free_page; 446 memcpy_toio(dst, &desc, sizeof(desc)); 447 mod->free_page++; 448 449 spin_unlock_irqrestore(&mod->lock, flags); 450 } 451 452 /* 453 * ICAN3 Fast Host Interface Setup 454 */ 455 456 static void ican3_init_fast_host_interface(struct ican3_dev *mod) 457 { 458 struct ican3_fast_desc desc; 459 unsigned long flags; 460 unsigned int addr; 461 void __iomem *dst; 462 int i; 463 464 spin_lock_irqsave(&mod->lock, flags); 465 466 /* save the start recv page */ 467 mod->fastrx_start = mod->free_page; 468 mod->fastrx_num = 0; 469 470 /* build a single fast tohost queue descriptor */ 471 memset(&desc, 0, sizeof(desc)); 472 desc.control = 0x00; 473 desc.command = 1; 474 475 /* build the tohost queue descriptor ring in memory */ 476 addr = 0; 477 for (i = 0; i < ICAN3_RX_BUFFERS; i++) { 478 479 /* set the wrap bit on the last buffer */ 480 if (i == ICAN3_RX_BUFFERS - 1) 481 desc.control |= DESC_WRAP; 482 483 /* switch to the correct page */ 484 ican3_set_page(mod, mod->free_page); 485 486 /* copy the descriptor to the DPM */ 487 dst = mod->dpm + addr; 488 memcpy_toio(dst, &desc, sizeof(desc)); 489 addr += sizeof(desc); 490 491 /* move to the next page if necessary */ 492 if (addr >= DPM_PAGE_SIZE) { 493 addr = 0; 494 mod->free_page++; 495 } 496 } 497 498 /* make sure we page-align the next queue */ 499 if (addr != 0) 500 mod->free_page++; 501 502 /* save the start xmit page */ 503 mod->fasttx_start = mod->free_page; 504 mod->fasttx_num = 0; 505 506 /* build a single fast fromhost queue descriptor */ 507 memset(&desc, 0, sizeof(desc)); 508 desc.control = DESC_VALID; 509 desc.command = 1; 510 511 /* build the fromhost queue descriptor ring in memory */ 512 addr = 0; 513 for (i = 0; i < ICAN3_TX_BUFFERS; i++) { 514 515 /* set the wrap bit on the last buffer */ 516 if (i == ICAN3_TX_BUFFERS - 1) 517 desc.control |= DESC_WRAP; 518 519 /* switch to the correct page */ 520 ican3_set_page(mod, mod->free_page); 521 522 /* copy the descriptor to the DPM */ 523 dst = mod->dpm + addr; 524 memcpy_toio(dst, &desc, sizeof(desc)); 525 addr += sizeof(desc); 526 527 /* move to the next page if necessary */ 528 if (addr >= DPM_PAGE_SIZE) { 529 addr = 0; 530 mod->free_page++; 531 } 532 } 533 534 spin_unlock_irqrestore(&mod->lock, flags); 535 } 536 537 /* 538 * ICAN3 "new-style" Host Interface Message Helpers 539 */ 540 541 /* 542 * LOCKING: must hold mod->lock 543 */ 544 static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 545 { 546 struct ican3_new_desc desc; 547 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc)); 548 549 /* switch to the fromhost mid queue, and read the buffer descriptor */ 550 ican3_set_page(mod, QUEUE_FROMHOST_MID); 551 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 552 553 if (!(desc.control & DESC_VALID)) { 554 netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__); 555 return -ENOMEM; 556 } 557 558 /* switch to the data page, copy the data */ 559 ican3_set_page(mod, desc.pointer); 560 memcpy_toio(mod->dpm, msg, sizeof(*msg)); 561 562 /* switch back to the descriptor, set the valid bit, write it back */ 563 ican3_set_page(mod, QUEUE_FROMHOST_MID); 564 desc.control ^= DESC_VALID; 565 memcpy_toio(desc_addr, &desc, sizeof(desc)); 566 567 /* update the tx number */ 568 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1); 569 return 0; 570 } 571 572 /* 573 * LOCKING: must hold mod->lock 574 */ 575 static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 576 { 577 struct ican3_new_desc desc; 578 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc)); 579 580 /* switch to the tohost queue, and read the buffer descriptor */ 581 ican3_set_page(mod, QUEUE_TOHOST); 582 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 583 584 if (!(desc.control & DESC_VALID)) { 585 netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__); 586 return -ENOMEM; 587 } 588 589 /* switch to the data page, copy the data */ 590 ican3_set_page(mod, desc.pointer); 591 memcpy_fromio(msg, mod->dpm, sizeof(*msg)); 592 593 /* switch back to the descriptor, toggle the valid bit, write it back */ 594 ican3_set_page(mod, QUEUE_TOHOST); 595 desc.control ^= DESC_VALID; 596 memcpy_toio(desc_addr, &desc, sizeof(desc)); 597 598 /* update the rx number */ 599 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1); 600 return 0; 601 } 602 603 /* 604 * Message Send / Recv Helpers 605 */ 606 607 static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg) 608 { 609 unsigned long flags; 610 int ret; 611 612 spin_lock_irqsave(&mod->lock, flags); 613 614 if (mod->iftype == 0) 615 ret = ican3_old_send_msg(mod, msg); 616 else 617 ret = ican3_new_send_msg(mod, msg); 618 619 spin_unlock_irqrestore(&mod->lock, flags); 620 return ret; 621 } 622 623 static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg) 624 { 625 unsigned long flags; 626 int ret; 627 628 spin_lock_irqsave(&mod->lock, flags); 629 630 if (mod->iftype == 0) 631 ret = ican3_old_recv_msg(mod, msg); 632 else 633 ret = ican3_new_recv_msg(mod, msg); 634 635 spin_unlock_irqrestore(&mod->lock, flags); 636 return ret; 637 } 638 639 /* 640 * Quick Pre-constructed Messages 641 */ 642 643 static int ican3_msg_connect(struct ican3_dev *mod) 644 { 645 struct ican3_msg msg; 646 647 memset(&msg, 0, sizeof(msg)); 648 msg.spec = MSG_CONNECTI; 649 msg.len = cpu_to_le16(0); 650 651 return ican3_send_msg(mod, &msg); 652 } 653 654 static int ican3_msg_disconnect(struct ican3_dev *mod) 655 { 656 struct ican3_msg msg; 657 658 memset(&msg, 0, sizeof(msg)); 659 msg.spec = MSG_DISCONNECT; 660 msg.len = cpu_to_le16(0); 661 662 return ican3_send_msg(mod, &msg); 663 } 664 665 static int ican3_msg_newhostif(struct ican3_dev *mod) 666 { 667 struct ican3_msg msg; 668 int ret; 669 670 memset(&msg, 0, sizeof(msg)); 671 msg.spec = MSG_NEWHOSTIF; 672 msg.len = cpu_to_le16(0); 673 674 /* If we're not using the old interface, switching seems bogus */ 675 WARN_ON(mod->iftype != 0); 676 677 ret = ican3_send_msg(mod, &msg); 678 if (ret) 679 return ret; 680 681 /* mark the module as using the new host interface */ 682 mod->iftype = 1; 683 return 0; 684 } 685 686 static int ican3_msg_fasthostif(struct ican3_dev *mod) 687 { 688 struct ican3_msg msg; 689 unsigned int addr; 690 691 memset(&msg, 0, sizeof(msg)); 692 msg.spec = MSG_INITFDPMQUEUE; 693 msg.len = cpu_to_le16(8); 694 695 /* write the tohost queue start address */ 696 addr = DPM_PAGE_ADDR(mod->fastrx_start); 697 msg.data[0] = addr & 0xff; 698 msg.data[1] = (addr >> 8) & 0xff; 699 msg.data[2] = (addr >> 16) & 0xff; 700 msg.data[3] = (addr >> 24) & 0xff; 701 702 /* write the fromhost queue start address */ 703 addr = DPM_PAGE_ADDR(mod->fasttx_start); 704 msg.data[4] = addr & 0xff; 705 msg.data[5] = (addr >> 8) & 0xff; 706 msg.data[6] = (addr >> 16) & 0xff; 707 msg.data[7] = (addr >> 24) & 0xff; 708 709 /* If we're not using the new interface yet, we cannot do this */ 710 WARN_ON(mod->iftype != 1); 711 712 return ican3_send_msg(mod, &msg); 713 } 714 715 /* 716 * Setup the CAN filter to either accept or reject all 717 * messages from the CAN bus. 718 */ 719 static int ican3_set_id_filter(struct ican3_dev *mod, bool accept) 720 { 721 struct ican3_msg msg; 722 int ret; 723 724 /* Standard Frame Format */ 725 memset(&msg, 0, sizeof(msg)); 726 msg.spec = MSG_SETAFILMASK; 727 msg.len = cpu_to_le16(5); 728 msg.data[0] = 0x00; /* IDLo LSB */ 729 msg.data[1] = 0x00; /* IDLo MSB */ 730 msg.data[2] = 0xff; /* IDHi LSB */ 731 msg.data[3] = 0x07; /* IDHi MSB */ 732 733 /* accept all frames for fast host if, or reject all frames */ 734 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT; 735 736 ret = ican3_send_msg(mod, &msg); 737 if (ret) 738 return ret; 739 740 /* Extended Frame Format */ 741 memset(&msg, 0, sizeof(msg)); 742 msg.spec = MSG_SETAFILMASK; 743 msg.len = cpu_to_le16(13); 744 msg.data[0] = 0; /* MUX = 0 */ 745 msg.data[1] = 0x00; /* IDLo LSB */ 746 msg.data[2] = 0x00; 747 msg.data[3] = 0x00; 748 msg.data[4] = 0x20; /* IDLo MSB */ 749 msg.data[5] = 0xff; /* IDHi LSB */ 750 msg.data[6] = 0xff; 751 msg.data[7] = 0xff; 752 msg.data[8] = 0x3f; /* IDHi MSB */ 753 754 /* accept all frames for fast host if, or reject all frames */ 755 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT; 756 757 return ican3_send_msg(mod, &msg); 758 } 759 760 /* 761 * Bring the CAN bus online or offline 762 */ 763 static int ican3_set_bus_state(struct ican3_dev *mod, bool on) 764 { 765 struct can_bittiming *bt = &mod->can.bittiming; 766 struct ican3_msg msg; 767 u8 btr0, btr1; 768 int res; 769 770 /* This algorithm was stolen from drivers/net/can/sja1000/sja1000.c */ 771 /* The bittiming register command for the ICAN3 just sets the bit timing */ 772 /* registers on the SJA1000 chip directly */ 773 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6); 774 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) | 775 (((bt->phase_seg2 - 1) & 0x7) << 4); 776 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) 777 btr1 |= 0x80; 778 779 if (mod->fwtype == ICAN3_FWTYPE_ICANOS) { 780 if (on) { 781 /* set bittiming */ 782 memset(&msg, 0, sizeof(msg)); 783 msg.spec = MSG_CBTRREQ; 784 msg.len = cpu_to_le16(4); 785 msg.data[0] = 0x00; 786 msg.data[1] = 0x00; 787 msg.data[2] = btr0; 788 msg.data[3] = btr1; 789 790 res = ican3_send_msg(mod, &msg); 791 if (res) 792 return res; 793 } 794 795 /* can-on/off request */ 796 memset(&msg, 0, sizeof(msg)); 797 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ; 798 msg.len = cpu_to_le16(0); 799 800 return ican3_send_msg(mod, &msg); 801 802 } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) { 803 memset(&msg, 0, sizeof(msg)); 804 msg.spec = MSG_LMTS; 805 if (on) { 806 msg.len = cpu_to_le16(4); 807 msg.data[0] = 0; 808 msg.data[1] = 0; 809 msg.data[2] = btr0; 810 msg.data[3] = btr1; 811 } else { 812 msg.len = cpu_to_le16(2); 813 msg.data[0] = 1; 814 msg.data[1] = 0; 815 } 816 817 return ican3_send_msg(mod, &msg); 818 } 819 return -ENOTSUPP; 820 } 821 822 static int ican3_set_termination(struct ican3_dev *mod, bool on) 823 { 824 struct ican3_msg msg; 825 826 memset(&msg, 0, sizeof(msg)); 827 msg.spec = MSG_HWCONF; 828 msg.len = cpu_to_le16(2); 829 msg.data[0] = 0x00; 830 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF; 831 832 return ican3_send_msg(mod, &msg); 833 } 834 835 static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec) 836 { 837 struct ican3_msg msg; 838 839 memset(&msg, 0, sizeof(msg)); 840 msg.spec = MSG_INQUIRY; 841 msg.len = cpu_to_le16(2); 842 msg.data[0] = subspec; 843 msg.data[1] = 0x00; 844 845 return ican3_send_msg(mod, &msg); 846 } 847 848 static int ican3_set_buserror(struct ican3_dev *mod, u8 quota) 849 { 850 struct ican3_msg msg; 851 852 memset(&msg, 0, sizeof(msg)); 853 msg.spec = MSG_CCONFREQ; 854 msg.len = cpu_to_le16(2); 855 msg.data[0] = 0x00; 856 msg.data[1] = quota; 857 858 return ican3_send_msg(mod, &msg); 859 } 860 861 /* 862 * ICAN3 to Linux CAN Frame Conversion 863 */ 864 865 static void ican3_to_can_frame(struct ican3_dev *mod, 866 struct ican3_fast_desc *desc, 867 struct can_frame *cf) 868 { 869 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) { 870 if (desc->data[1] & ICAN3_SFF_RTR) 871 cf->can_id |= CAN_RTR_FLAG; 872 873 cf->can_id |= desc->data[0] << 3; 874 cf->can_id |= (desc->data[1] & 0xe0) >> 5; 875 cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK); 876 memcpy(cf->data, &desc->data[2], cf->can_dlc); 877 } else { 878 cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK); 879 if (desc->data[0] & ICAN3_EFF_RTR) 880 cf->can_id |= CAN_RTR_FLAG; 881 882 if (desc->data[0] & ICAN3_EFF) { 883 cf->can_id |= CAN_EFF_FLAG; 884 cf->can_id |= desc->data[2] << 21; /* 28-21 */ 885 cf->can_id |= desc->data[3] << 13; /* 20-13 */ 886 cf->can_id |= desc->data[4] << 5; /* 12-5 */ 887 cf->can_id |= (desc->data[5] & 0xf8) >> 3; 888 } else { 889 cf->can_id |= desc->data[2] << 3; /* 10-3 */ 890 cf->can_id |= desc->data[3] >> 5; /* 2-0 */ 891 } 892 893 memcpy(cf->data, &desc->data[6], cf->can_dlc); 894 } 895 } 896 897 static void can_frame_to_ican3(struct ican3_dev *mod, 898 struct can_frame *cf, 899 struct ican3_fast_desc *desc) 900 { 901 /* clear out any stale data in the descriptor */ 902 memset(desc->data, 0, sizeof(desc->data)); 903 904 /* we always use the extended format, with the ECHO flag set */ 905 desc->command = ICAN3_CAN_TYPE_EFF; 906 desc->data[0] |= cf->can_dlc; 907 desc->data[1] |= ICAN3_ECHO; 908 909 /* support single transmission (no retries) mode */ 910 if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT) 911 desc->data[1] |= ICAN3_SNGL; 912 913 if (cf->can_id & CAN_RTR_FLAG) 914 desc->data[0] |= ICAN3_EFF_RTR; 915 916 /* pack the id into the correct places */ 917 if (cf->can_id & CAN_EFF_FLAG) { 918 desc->data[0] |= ICAN3_EFF; 919 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */ 920 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */ 921 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */ 922 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */ 923 } else { 924 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */ 925 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */ 926 } 927 928 /* copy the data bits into the descriptor */ 929 memcpy(&desc->data[6], cf->data, cf->can_dlc); 930 } 931 932 /* 933 * Interrupt Handling 934 */ 935 936 /* 937 * Handle an ID + Version message response from the firmware. We never generate 938 * this message in production code, but it is very useful when debugging to be 939 * able to display this message. 940 */ 941 static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg) 942 { 943 netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data); 944 } 945 946 static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg) 947 { 948 struct net_device *dev = mod->ndev; 949 struct net_device_stats *stats = &dev->stats; 950 struct can_frame *cf; 951 struct sk_buff *skb; 952 953 /* 954 * Report that communication messages with the microcontroller firmware 955 * are being lost. These are never CAN frames, so we do not generate an 956 * error frame for userspace 957 */ 958 if (msg->spec == MSG_MSGLOST) { 959 netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]); 960 return; 961 } 962 963 /* 964 * Oops, this indicates that we have lost messages in the fast queue, 965 * which are exclusively CAN messages. Our driver isn't reading CAN 966 * frames fast enough. 967 * 968 * We'll pretend that the SJA1000 told us that it ran out of buffer 969 * space, because there is not a better message for this. 970 */ 971 skb = alloc_can_err_skb(dev, &cf); 972 if (skb) { 973 cf->can_id |= CAN_ERR_CRTL; 974 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 975 stats->rx_over_errors++; 976 stats->rx_errors++; 977 netif_rx(skb); 978 } 979 } 980 981 /* 982 * Handle CAN Event Indication Messages from the firmware 983 * 984 * The ICAN3 firmware provides the values of some SJA1000 registers when it 985 * generates this message. The code below is largely copied from the 986 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary 987 */ 988 static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg) 989 { 990 struct net_device *dev = mod->ndev; 991 struct net_device_stats *stats = &dev->stats; 992 enum can_state state = mod->can.state; 993 u8 isrc, ecc, status, rxerr, txerr; 994 struct can_frame *cf; 995 struct sk_buff *skb; 996 997 /* we can only handle the SJA1000 part */ 998 if (msg->data[1] != CEVTIND_CHIP_SJA1000) { 999 netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n"); 1000 return -ENODEV; 1001 } 1002 1003 /* check the message length for sanity */ 1004 if (le16_to_cpu(msg->len) < 6) { 1005 netdev_err(mod->ndev, "error message too short\n"); 1006 return -EINVAL; 1007 } 1008 1009 isrc = msg->data[0]; 1010 ecc = msg->data[2]; 1011 status = msg->data[3]; 1012 rxerr = msg->data[4]; 1013 txerr = msg->data[5]; 1014 1015 /* 1016 * This hardware lacks any support other than bus error messages to 1017 * determine if packet transmission has failed. 1018 * 1019 * When TX errors happen, one echo skb needs to be dropped from the 1020 * front of the queue. 1021 * 1022 * A small bit of code is duplicated here and below, to avoid error 1023 * skb allocation when it will just be freed immediately. 1024 */ 1025 if (isrc == CEVTIND_BEI) { 1026 int ret; 1027 netdev_dbg(mod->ndev, "bus error interrupt\n"); 1028 1029 /* TX error */ 1030 if (!(ecc & ECC_DIR)) { 1031 kfree_skb(skb_dequeue(&mod->echoq)); 1032 stats->tx_errors++; 1033 } else { 1034 stats->rx_errors++; 1035 } 1036 1037 /* 1038 * The controller automatically disables bus-error interrupts 1039 * and therefore we must re-enable them. 1040 */ 1041 ret = ican3_set_buserror(mod, 1); 1042 if (ret) { 1043 netdev_err(mod->ndev, "unable to re-enable bus-error\n"); 1044 return ret; 1045 } 1046 1047 /* bus error reporting is off, return immediately */ 1048 if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)) 1049 return 0; 1050 } 1051 1052 skb = alloc_can_err_skb(dev, &cf); 1053 if (skb == NULL) 1054 return -ENOMEM; 1055 1056 /* data overrun interrupt */ 1057 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) { 1058 netdev_dbg(mod->ndev, "data overrun interrupt\n"); 1059 cf->can_id |= CAN_ERR_CRTL; 1060 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 1061 stats->rx_over_errors++; 1062 stats->rx_errors++; 1063 } 1064 1065 /* error warning + passive interrupt */ 1066 if (isrc == CEVTIND_EI) { 1067 netdev_dbg(mod->ndev, "error warning + passive interrupt\n"); 1068 if (status & SR_BS) { 1069 state = CAN_STATE_BUS_OFF; 1070 cf->can_id |= CAN_ERR_BUSOFF; 1071 mod->can.can_stats.bus_off++; 1072 can_bus_off(dev); 1073 } else if (status & SR_ES) { 1074 if (rxerr >= 128 || txerr >= 128) 1075 state = CAN_STATE_ERROR_PASSIVE; 1076 else 1077 state = CAN_STATE_ERROR_WARNING; 1078 } else { 1079 state = CAN_STATE_ERROR_ACTIVE; 1080 } 1081 } 1082 1083 /* bus error interrupt */ 1084 if (isrc == CEVTIND_BEI) { 1085 mod->can.can_stats.bus_error++; 1086 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 1087 1088 switch (ecc & ECC_MASK) { 1089 case ECC_BIT: 1090 cf->data[2] |= CAN_ERR_PROT_BIT; 1091 break; 1092 case ECC_FORM: 1093 cf->data[2] |= CAN_ERR_PROT_FORM; 1094 break; 1095 case ECC_STUFF: 1096 cf->data[2] |= CAN_ERR_PROT_STUFF; 1097 break; 1098 default: 1099 cf->data[3] = ecc & ECC_SEG; 1100 break; 1101 } 1102 1103 if (!(ecc & ECC_DIR)) 1104 cf->data[2] |= CAN_ERR_PROT_TX; 1105 1106 cf->data[6] = txerr; 1107 cf->data[7] = rxerr; 1108 } 1109 1110 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING || 1111 state == CAN_STATE_ERROR_PASSIVE)) { 1112 cf->can_id |= CAN_ERR_CRTL; 1113 if (state == CAN_STATE_ERROR_WARNING) { 1114 mod->can.can_stats.error_warning++; 1115 cf->data[1] = (txerr > rxerr) ? 1116 CAN_ERR_CRTL_TX_WARNING : 1117 CAN_ERR_CRTL_RX_WARNING; 1118 } else { 1119 mod->can.can_stats.error_passive++; 1120 cf->data[1] = (txerr > rxerr) ? 1121 CAN_ERR_CRTL_TX_PASSIVE : 1122 CAN_ERR_CRTL_RX_PASSIVE; 1123 } 1124 1125 cf->data[6] = txerr; 1126 cf->data[7] = rxerr; 1127 } 1128 1129 mod->can.state = state; 1130 netif_rx(skb); 1131 return 0; 1132 } 1133 1134 static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg) 1135 { 1136 switch (msg->data[0]) { 1137 case INQUIRY_STATUS: 1138 case INQUIRY_EXTENDED: 1139 mod->bec.rxerr = msg->data[5]; 1140 mod->bec.txerr = msg->data[6]; 1141 complete(&mod->buserror_comp); 1142 break; 1143 case INQUIRY_TERMINATION: 1144 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON; 1145 complete(&mod->termination_comp); 1146 break; 1147 default: 1148 netdev_err(mod->ndev, "received an unknown inquiry response\n"); 1149 break; 1150 } 1151 } 1152 1153 static void ican3_handle_unknown_message(struct ican3_dev *mod, 1154 struct ican3_msg *msg) 1155 { 1156 netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n", 1157 msg->spec, le16_to_cpu(msg->len)); 1158 } 1159 1160 /* 1161 * Handle a control message from the firmware 1162 */ 1163 static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg) 1164 { 1165 netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__, 1166 mod->num, msg->spec, le16_to_cpu(msg->len)); 1167 1168 switch (msg->spec) { 1169 case MSG_IDVERS: 1170 ican3_handle_idvers(mod, msg); 1171 break; 1172 case MSG_MSGLOST: 1173 case MSG_FMSGLOST: 1174 ican3_handle_msglost(mod, msg); 1175 break; 1176 case MSG_CEVTIND: 1177 ican3_handle_cevtind(mod, msg); 1178 break; 1179 case MSG_INQUIRY: 1180 ican3_handle_inquiry(mod, msg); 1181 break; 1182 default: 1183 ican3_handle_unknown_message(mod, msg); 1184 break; 1185 } 1186 } 1187 1188 /* 1189 * The ican3 needs to store all echo skbs, and therefore cannot 1190 * use the generic infrastructure for this. 1191 */ 1192 static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb) 1193 { 1194 skb = can_create_echo_skb(skb); 1195 if (!skb) 1196 return; 1197 1198 /* save this skb for tx interrupt echo handling */ 1199 skb_queue_tail(&mod->echoq, skb); 1200 } 1201 1202 static unsigned int ican3_get_echo_skb(struct ican3_dev *mod) 1203 { 1204 struct sk_buff *skb = skb_dequeue(&mod->echoq); 1205 struct can_frame *cf; 1206 u8 dlc; 1207 1208 /* this should never trigger unless there is a driver bug */ 1209 if (!skb) { 1210 netdev_err(mod->ndev, "BUG: echo skb not occupied\n"); 1211 return 0; 1212 } 1213 1214 cf = (struct can_frame *)skb->data; 1215 dlc = cf->can_dlc; 1216 1217 /* check flag whether this packet has to be looped back */ 1218 if (skb->pkt_type != PACKET_LOOPBACK) { 1219 kfree_skb(skb); 1220 return dlc; 1221 } 1222 1223 skb->protocol = htons(ETH_P_CAN); 1224 skb->pkt_type = PACKET_BROADCAST; 1225 skb->ip_summed = CHECKSUM_UNNECESSARY; 1226 skb->dev = mod->ndev; 1227 netif_receive_skb(skb); 1228 return dlc; 1229 } 1230 1231 /* 1232 * Compare an skb with an existing echo skb 1233 * 1234 * This function will be used on devices which have a hardware loopback. 1235 * On these devices, this function can be used to compare a received skb 1236 * with the saved echo skbs so that the hardware echo skb can be dropped. 1237 * 1238 * Returns true if the skb's are identical, false otherwise. 1239 */ 1240 static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb) 1241 { 1242 struct can_frame *cf = (struct can_frame *)skb->data; 1243 struct sk_buff *echo_skb = skb_peek(&mod->echoq); 1244 struct can_frame *echo_cf; 1245 1246 if (!echo_skb) 1247 return false; 1248 1249 echo_cf = (struct can_frame *)echo_skb->data; 1250 if (cf->can_id != echo_cf->can_id) 1251 return false; 1252 1253 if (cf->can_dlc != echo_cf->can_dlc) 1254 return false; 1255 1256 return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0; 1257 } 1258 1259 /* 1260 * Check that there is room in the TX ring to transmit another skb 1261 * 1262 * LOCKING: must hold mod->lock 1263 */ 1264 static bool ican3_txok(struct ican3_dev *mod) 1265 { 1266 struct ican3_fast_desc __iomem *desc; 1267 u8 control; 1268 1269 /* check that we have echo queue space */ 1270 if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS) 1271 return false; 1272 1273 /* copy the control bits of the descriptor */ 1274 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16)); 1275 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc)); 1276 control = ioread8(&desc->control); 1277 1278 /* if the control bits are not valid, then we have no more space */ 1279 if (!(control & DESC_VALID)) 1280 return false; 1281 1282 return true; 1283 } 1284 1285 /* 1286 * Receive one CAN frame from the hardware 1287 * 1288 * CONTEXT: must be called from user context 1289 */ 1290 static int ican3_recv_skb(struct ican3_dev *mod) 1291 { 1292 struct net_device *ndev = mod->ndev; 1293 struct net_device_stats *stats = &ndev->stats; 1294 struct ican3_fast_desc desc; 1295 void __iomem *desc_addr; 1296 struct can_frame *cf; 1297 struct sk_buff *skb; 1298 unsigned long flags; 1299 1300 spin_lock_irqsave(&mod->lock, flags); 1301 1302 /* copy the whole descriptor */ 1303 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16)); 1304 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc)); 1305 memcpy_fromio(&desc, desc_addr, sizeof(desc)); 1306 1307 spin_unlock_irqrestore(&mod->lock, flags); 1308 1309 /* check that we actually have a CAN frame */ 1310 if (!(desc.control & DESC_VALID)) 1311 return -ENOBUFS; 1312 1313 /* allocate an skb */ 1314 skb = alloc_can_skb(ndev, &cf); 1315 if (unlikely(skb == NULL)) { 1316 stats->rx_dropped++; 1317 goto err_noalloc; 1318 } 1319 1320 /* convert the ICAN3 frame into Linux CAN format */ 1321 ican3_to_can_frame(mod, &desc, cf); 1322 1323 /* 1324 * If this is an ECHO frame received from the hardware loopback 1325 * feature, use the skb saved in the ECHO stack instead. This allows 1326 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly. 1327 * 1328 * Since this is a confirmation of a successfully transmitted packet 1329 * sent from this host, update the transmit statistics. 1330 * 1331 * Also, the netdevice queue needs to be allowed to send packets again. 1332 */ 1333 if (ican3_echo_skb_matches(mod, skb)) { 1334 stats->tx_packets++; 1335 stats->tx_bytes += ican3_get_echo_skb(mod); 1336 kfree_skb(skb); 1337 goto err_noalloc; 1338 } 1339 1340 /* update statistics, receive the skb */ 1341 stats->rx_packets++; 1342 stats->rx_bytes += cf->can_dlc; 1343 netif_receive_skb(skb); 1344 1345 err_noalloc: 1346 /* toggle the valid bit and return the descriptor to the ring */ 1347 desc.control ^= DESC_VALID; 1348 1349 spin_lock_irqsave(&mod->lock, flags); 1350 1351 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16)); 1352 memcpy_toio(desc_addr, &desc, 1); 1353 1354 /* update the next buffer pointer */ 1355 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0 1356 : (mod->fastrx_num + 1); 1357 1358 /* there are still more buffers to process */ 1359 spin_unlock_irqrestore(&mod->lock, flags); 1360 return 0; 1361 } 1362 1363 static int ican3_napi(struct napi_struct *napi, int budget) 1364 { 1365 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi); 1366 unsigned long flags; 1367 int received = 0; 1368 int ret; 1369 1370 /* process all communication messages */ 1371 while (true) { 1372 struct ican3_msg uninitialized_var(msg); 1373 ret = ican3_recv_msg(mod, &msg); 1374 if (ret) 1375 break; 1376 1377 ican3_handle_message(mod, &msg); 1378 } 1379 1380 /* process all CAN frames from the fast interface */ 1381 while (received < budget) { 1382 ret = ican3_recv_skb(mod); 1383 if (ret) 1384 break; 1385 1386 received++; 1387 } 1388 1389 /* We have processed all packets that the adapter had, but it 1390 * was less than our budget, stop polling */ 1391 if (received < budget) 1392 napi_complete(napi); 1393 1394 spin_lock_irqsave(&mod->lock, flags); 1395 1396 /* Wake up the transmit queue if necessary */ 1397 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod)) 1398 netif_wake_queue(mod->ndev); 1399 1400 spin_unlock_irqrestore(&mod->lock, flags); 1401 1402 /* re-enable interrupt generation */ 1403 iowrite8(1 << mod->num, &mod->ctrl->int_enable); 1404 return received; 1405 } 1406 1407 static irqreturn_t ican3_irq(int irq, void *dev_id) 1408 { 1409 struct ican3_dev *mod = dev_id; 1410 u8 stat; 1411 1412 /* 1413 * The interrupt status register on this device reports interrupts 1414 * as zeroes instead of using ones like most other devices 1415 */ 1416 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num); 1417 if (stat == (1 << mod->num)) 1418 return IRQ_NONE; 1419 1420 /* clear the MODULbus interrupt from the microcontroller */ 1421 ioread8(&mod->dpmctrl->interrupt); 1422 1423 /* disable interrupt generation, schedule the NAPI poller */ 1424 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1425 napi_schedule(&mod->napi); 1426 return IRQ_HANDLED; 1427 } 1428 1429 /* 1430 * Firmware reset, startup, and shutdown 1431 */ 1432 1433 /* 1434 * Reset an ICAN module to its power-on state 1435 * 1436 * CONTEXT: no network device registered 1437 */ 1438 static int ican3_reset_module(struct ican3_dev *mod) 1439 { 1440 unsigned long start; 1441 u8 runold, runnew; 1442 1443 /* disable interrupts so no more work is scheduled */ 1444 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1445 1446 /* the first unallocated page in the DPM is #9 */ 1447 mod->free_page = DPM_FREE_START; 1448 1449 ican3_set_page(mod, QUEUE_OLD_CONTROL); 1450 runold = ioread8(mod->dpm + TARGET_RUNNING); 1451 1452 /* reset the module */ 1453 iowrite8(0x00, &mod->dpmctrl->hwreset); 1454 1455 /* wait until the module has finished resetting and is running */ 1456 start = jiffies; 1457 do { 1458 ican3_set_page(mod, QUEUE_OLD_CONTROL); 1459 runnew = ioread8(mod->dpm + TARGET_RUNNING); 1460 if (runnew == (runold ^ 0xff)) 1461 return 0; 1462 1463 msleep(10); 1464 } while (time_before(jiffies, start + HZ / 2)); 1465 1466 netdev_err(mod->ndev, "failed to reset CAN module\n"); 1467 return -ETIMEDOUT; 1468 } 1469 1470 static void ican3_shutdown_module(struct ican3_dev *mod) 1471 { 1472 ican3_msg_disconnect(mod); 1473 ican3_reset_module(mod); 1474 } 1475 1476 /* 1477 * Startup an ICAN module, bringing it into fast mode 1478 */ 1479 static int ican3_startup_module(struct ican3_dev *mod) 1480 { 1481 int ret; 1482 1483 ret = ican3_reset_module(mod); 1484 if (ret) { 1485 netdev_err(mod->ndev, "unable to reset module\n"); 1486 return ret; 1487 } 1488 1489 /* detect firmware */ 1490 memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1); 1491 if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) { 1492 netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo); 1493 return -ENODEV; 1494 } 1495 if (strstr(mod->fwinfo, "CAL/CANopen")) 1496 mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN; 1497 else 1498 mod->fwtype = ICAN3_FWTYPE_ICANOS; 1499 1500 /* re-enable interrupts so we can send messages */ 1501 iowrite8(1 << mod->num, &mod->ctrl->int_enable); 1502 1503 ret = ican3_msg_connect(mod); 1504 if (ret) { 1505 netdev_err(mod->ndev, "unable to connect to module\n"); 1506 return ret; 1507 } 1508 1509 ican3_init_new_host_interface(mod); 1510 ret = ican3_msg_newhostif(mod); 1511 if (ret) { 1512 netdev_err(mod->ndev, "unable to switch to new-style interface\n"); 1513 return ret; 1514 } 1515 1516 /* default to "termination on" */ 1517 ret = ican3_set_termination(mod, true); 1518 if (ret) { 1519 netdev_err(mod->ndev, "unable to enable termination\n"); 1520 return ret; 1521 } 1522 1523 /* default to "bus errors enabled" */ 1524 ret = ican3_set_buserror(mod, 1); 1525 if (ret) { 1526 netdev_err(mod->ndev, "unable to set bus-error\n"); 1527 return ret; 1528 } 1529 1530 ican3_init_fast_host_interface(mod); 1531 ret = ican3_msg_fasthostif(mod); 1532 if (ret) { 1533 netdev_err(mod->ndev, "unable to switch to fast host interface\n"); 1534 return ret; 1535 } 1536 1537 ret = ican3_set_id_filter(mod, true); 1538 if (ret) { 1539 netdev_err(mod->ndev, "unable to set acceptance filter\n"); 1540 return ret; 1541 } 1542 1543 return 0; 1544 } 1545 1546 /* 1547 * CAN Network Device 1548 */ 1549 1550 static int ican3_open(struct net_device *ndev) 1551 { 1552 struct ican3_dev *mod = netdev_priv(ndev); 1553 int ret; 1554 1555 /* open the CAN layer */ 1556 ret = open_candev(ndev); 1557 if (ret) { 1558 netdev_err(mod->ndev, "unable to start CAN layer\n"); 1559 return ret; 1560 } 1561 1562 /* bring the bus online */ 1563 ret = ican3_set_bus_state(mod, true); 1564 if (ret) { 1565 netdev_err(mod->ndev, "unable to set bus-on\n"); 1566 close_candev(ndev); 1567 return ret; 1568 } 1569 1570 /* start up the network device */ 1571 mod->can.state = CAN_STATE_ERROR_ACTIVE; 1572 netif_start_queue(ndev); 1573 1574 return 0; 1575 } 1576 1577 static int ican3_stop(struct net_device *ndev) 1578 { 1579 struct ican3_dev *mod = netdev_priv(ndev); 1580 int ret; 1581 1582 /* stop the network device xmit routine */ 1583 netif_stop_queue(ndev); 1584 mod->can.state = CAN_STATE_STOPPED; 1585 1586 /* bring the bus offline, stop receiving packets */ 1587 ret = ican3_set_bus_state(mod, false); 1588 if (ret) { 1589 netdev_err(mod->ndev, "unable to set bus-off\n"); 1590 return ret; 1591 } 1592 1593 /* drop all outstanding echo skbs */ 1594 skb_queue_purge(&mod->echoq); 1595 1596 /* close the CAN layer */ 1597 close_candev(ndev); 1598 return 0; 1599 } 1600 1601 static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev) 1602 { 1603 struct ican3_dev *mod = netdev_priv(ndev); 1604 struct can_frame *cf = (struct can_frame *)skb->data; 1605 struct ican3_fast_desc desc; 1606 void __iomem *desc_addr; 1607 unsigned long flags; 1608 1609 if (can_dropped_invalid_skb(ndev, skb)) 1610 return NETDEV_TX_OK; 1611 1612 spin_lock_irqsave(&mod->lock, flags); 1613 1614 /* check that we can actually transmit */ 1615 if (!ican3_txok(mod)) { 1616 netdev_err(mod->ndev, "BUG: no free descriptors\n"); 1617 spin_unlock_irqrestore(&mod->lock, flags); 1618 return NETDEV_TX_BUSY; 1619 } 1620 1621 /* copy the control bits of the descriptor */ 1622 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16)); 1623 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc)); 1624 memset(&desc, 0, sizeof(desc)); 1625 memcpy_fromio(&desc, desc_addr, 1); 1626 1627 /* convert the Linux CAN frame into ICAN3 format */ 1628 can_frame_to_ican3(mod, cf, &desc); 1629 1630 /* 1631 * This hardware doesn't have TX-done notifications, so we'll try and 1632 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO 1633 * stack. Upon packet reception, check if the ECHO skb and received 1634 * skb match, and use that to wake the queue. 1635 */ 1636 ican3_put_echo_skb(mod, skb); 1637 1638 /* 1639 * the programming manual says that you must set the IVALID bit, then 1640 * interrupt, then set the valid bit. Quite weird, but it seems to be 1641 * required for this to work 1642 */ 1643 desc.control |= DESC_IVALID; 1644 memcpy_toio(desc_addr, &desc, sizeof(desc)); 1645 1646 /* generate a MODULbus interrupt to the microcontroller */ 1647 iowrite8(0x01, &mod->dpmctrl->interrupt); 1648 1649 desc.control ^= DESC_VALID; 1650 memcpy_toio(desc_addr, &desc, sizeof(desc)); 1651 1652 /* update the next buffer pointer */ 1653 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0 1654 : (mod->fasttx_num + 1); 1655 1656 /* if there is no free descriptor space, stop the transmit queue */ 1657 if (!ican3_txok(mod)) 1658 netif_stop_queue(ndev); 1659 1660 spin_unlock_irqrestore(&mod->lock, flags); 1661 return NETDEV_TX_OK; 1662 } 1663 1664 static const struct net_device_ops ican3_netdev_ops = { 1665 .ndo_open = ican3_open, 1666 .ndo_stop = ican3_stop, 1667 .ndo_start_xmit = ican3_xmit, 1668 .ndo_change_mtu = can_change_mtu, 1669 }; 1670 1671 /* 1672 * Low-level CAN Device 1673 */ 1674 1675 /* This structure was stolen from drivers/net/can/sja1000/sja1000.c */ 1676 static const struct can_bittiming_const ican3_bittiming_const = { 1677 .name = DRV_NAME, 1678 .tseg1_min = 1, 1679 .tseg1_max = 16, 1680 .tseg2_min = 1, 1681 .tseg2_max = 8, 1682 .sjw_max = 4, 1683 .brp_min = 1, 1684 .brp_max = 64, 1685 .brp_inc = 1, 1686 }; 1687 1688 static int ican3_set_mode(struct net_device *ndev, enum can_mode mode) 1689 { 1690 struct ican3_dev *mod = netdev_priv(ndev); 1691 int ret; 1692 1693 if (mode != CAN_MODE_START) 1694 return -ENOTSUPP; 1695 1696 /* bring the bus online */ 1697 ret = ican3_set_bus_state(mod, true); 1698 if (ret) { 1699 netdev_err(ndev, "unable to set bus-on\n"); 1700 return ret; 1701 } 1702 1703 /* start up the network device */ 1704 mod->can.state = CAN_STATE_ERROR_ACTIVE; 1705 1706 if (netif_queue_stopped(ndev)) 1707 netif_wake_queue(ndev); 1708 1709 return 0; 1710 } 1711 1712 static int ican3_get_berr_counter(const struct net_device *ndev, 1713 struct can_berr_counter *bec) 1714 { 1715 struct ican3_dev *mod = netdev_priv(ndev); 1716 int ret; 1717 1718 ret = ican3_send_inquiry(mod, INQUIRY_STATUS); 1719 if (ret) 1720 return ret; 1721 1722 if (!wait_for_completion_timeout(&mod->buserror_comp, HZ)) { 1723 netdev_info(mod->ndev, "%s timed out\n", __func__); 1724 return -ETIMEDOUT; 1725 } 1726 1727 bec->rxerr = mod->bec.rxerr; 1728 bec->txerr = mod->bec.txerr; 1729 return 0; 1730 } 1731 1732 /* 1733 * Sysfs Attributes 1734 */ 1735 1736 static ssize_t ican3_sysfs_show_term(struct device *dev, 1737 struct device_attribute *attr, 1738 char *buf) 1739 { 1740 struct ican3_dev *mod = netdev_priv(to_net_dev(dev)); 1741 int ret; 1742 1743 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION); 1744 if (ret) 1745 return ret; 1746 1747 if (!wait_for_completion_timeout(&mod->termination_comp, HZ)) { 1748 netdev_info(mod->ndev, "%s timed out\n", __func__); 1749 return -ETIMEDOUT; 1750 } 1751 1752 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled); 1753 } 1754 1755 static ssize_t ican3_sysfs_set_term(struct device *dev, 1756 struct device_attribute *attr, 1757 const char *buf, size_t count) 1758 { 1759 struct ican3_dev *mod = netdev_priv(to_net_dev(dev)); 1760 unsigned long enable; 1761 int ret; 1762 1763 if (kstrtoul(buf, 0, &enable)) 1764 return -EINVAL; 1765 1766 ret = ican3_set_termination(mod, enable); 1767 if (ret) 1768 return ret; 1769 1770 return count; 1771 } 1772 1773 static ssize_t ican3_sysfs_show_fwinfo(struct device *dev, 1774 struct device_attribute *attr, 1775 char *buf) 1776 { 1777 struct ican3_dev *mod = netdev_priv(to_net_dev(dev)); 1778 1779 return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo); 1780 } 1781 1782 static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term, 1783 ican3_sysfs_set_term); 1784 static DEVICE_ATTR(fwinfo, S_IRUSR | S_IRUGO, ican3_sysfs_show_fwinfo, NULL); 1785 1786 static struct attribute *ican3_sysfs_attrs[] = { 1787 &dev_attr_termination.attr, 1788 &dev_attr_fwinfo.attr, 1789 NULL, 1790 }; 1791 1792 static struct attribute_group ican3_sysfs_attr_group = { 1793 .attrs = ican3_sysfs_attrs, 1794 }; 1795 1796 /* 1797 * PCI Subsystem 1798 */ 1799 1800 static int ican3_probe(struct platform_device *pdev) 1801 { 1802 struct janz_platform_data *pdata; 1803 struct net_device *ndev; 1804 struct ican3_dev *mod; 1805 struct resource *res; 1806 struct device *dev; 1807 int ret; 1808 1809 pdata = dev_get_platdata(&pdev->dev); 1810 if (!pdata) 1811 return -ENXIO; 1812 1813 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno); 1814 1815 /* save the struct device for printing */ 1816 dev = &pdev->dev; 1817 1818 /* allocate the CAN device and private data */ 1819 ndev = alloc_candev(sizeof(*mod), 0); 1820 if (!ndev) { 1821 dev_err(dev, "unable to allocate CANdev\n"); 1822 ret = -ENOMEM; 1823 goto out_return; 1824 } 1825 1826 platform_set_drvdata(pdev, ndev); 1827 mod = netdev_priv(ndev); 1828 mod->ndev = ndev; 1829 mod->num = pdata->modno; 1830 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS); 1831 skb_queue_head_init(&mod->echoq); 1832 spin_lock_init(&mod->lock); 1833 init_completion(&mod->termination_comp); 1834 init_completion(&mod->buserror_comp); 1835 1836 /* setup device-specific sysfs attributes */ 1837 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group; 1838 1839 /* the first unallocated page in the DPM is 9 */ 1840 mod->free_page = DPM_FREE_START; 1841 1842 ndev->netdev_ops = &ican3_netdev_ops; 1843 ndev->flags |= IFF_ECHO; 1844 SET_NETDEV_DEV(ndev, &pdev->dev); 1845 1846 mod->can.clock.freq = ICAN3_CAN_CLOCK; 1847 mod->can.bittiming_const = &ican3_bittiming_const; 1848 mod->can.do_set_mode = ican3_set_mode; 1849 mod->can.do_get_berr_counter = ican3_get_berr_counter; 1850 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES 1851 | CAN_CTRLMODE_BERR_REPORTING 1852 | CAN_CTRLMODE_ONE_SHOT; 1853 1854 /* find our IRQ number */ 1855 mod->irq = platform_get_irq(pdev, 0); 1856 if (mod->irq < 0) { 1857 dev_err(dev, "IRQ line not found\n"); 1858 ret = -ENODEV; 1859 goto out_free_ndev; 1860 } 1861 1862 ndev->irq = mod->irq; 1863 1864 /* get access to the MODULbus registers for this module */ 1865 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1866 if (!res) { 1867 dev_err(dev, "MODULbus registers not found\n"); 1868 ret = -ENODEV; 1869 goto out_free_ndev; 1870 } 1871 1872 mod->dpm = ioremap(res->start, resource_size(res)); 1873 if (!mod->dpm) { 1874 dev_err(dev, "MODULbus registers not ioremap\n"); 1875 ret = -ENOMEM; 1876 goto out_free_ndev; 1877 } 1878 1879 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE; 1880 1881 /* get access to the control registers for this module */ 1882 res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1883 if (!res) { 1884 dev_err(dev, "CONTROL registers not found\n"); 1885 ret = -ENODEV; 1886 goto out_iounmap_dpm; 1887 } 1888 1889 mod->ctrl = ioremap(res->start, resource_size(res)); 1890 if (!mod->ctrl) { 1891 dev_err(dev, "CONTROL registers not ioremap\n"); 1892 ret = -ENOMEM; 1893 goto out_iounmap_dpm; 1894 } 1895 1896 /* disable our IRQ, then hookup the IRQ handler */ 1897 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1898 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod); 1899 if (ret) { 1900 dev_err(dev, "unable to request IRQ\n"); 1901 goto out_iounmap_ctrl; 1902 } 1903 1904 /* reset and initialize the CAN controller into fast mode */ 1905 napi_enable(&mod->napi); 1906 ret = ican3_startup_module(mod); 1907 if (ret) { 1908 dev_err(dev, "%s: unable to start CANdev\n", __func__); 1909 goto out_free_irq; 1910 } 1911 1912 /* register with the Linux CAN layer */ 1913 ret = register_candev(ndev); 1914 if (ret) { 1915 dev_err(dev, "%s: unable to register CANdev\n", __func__); 1916 goto out_free_irq; 1917 } 1918 1919 netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno); 1920 return 0; 1921 1922 out_free_irq: 1923 napi_disable(&mod->napi); 1924 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1925 free_irq(mod->irq, mod); 1926 out_iounmap_ctrl: 1927 iounmap(mod->ctrl); 1928 out_iounmap_dpm: 1929 iounmap(mod->dpm); 1930 out_free_ndev: 1931 free_candev(ndev); 1932 out_return: 1933 return ret; 1934 } 1935 1936 static int ican3_remove(struct platform_device *pdev) 1937 { 1938 struct net_device *ndev = platform_get_drvdata(pdev); 1939 struct ican3_dev *mod = netdev_priv(ndev); 1940 1941 /* unregister the netdevice, stop interrupts */ 1942 unregister_netdev(ndev); 1943 napi_disable(&mod->napi); 1944 iowrite8(1 << mod->num, &mod->ctrl->int_disable); 1945 free_irq(mod->irq, mod); 1946 1947 /* put the module into reset */ 1948 ican3_shutdown_module(mod); 1949 1950 /* unmap all registers */ 1951 iounmap(mod->ctrl); 1952 iounmap(mod->dpm); 1953 1954 free_candev(ndev); 1955 1956 return 0; 1957 } 1958 1959 static struct platform_driver ican3_driver = { 1960 .driver = { 1961 .name = DRV_NAME, 1962 }, 1963 .probe = ican3_probe, 1964 .remove = ican3_remove, 1965 }; 1966 1967 module_platform_driver(ican3_driver); 1968 1969 MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>"); 1970 MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver"); 1971 MODULE_LICENSE("GPL"); 1972 MODULE_ALIAS("platform:janz-ican3"); 1973