1# SPDX-License-Identifier: GPL-2.0-only 2# 3# Memory devices 4# 5 6menuconfig MEMORY 7 bool "Memory Controller drivers" 8 help 9 This option allows to enable specific memory controller drivers, 10 useful mostly on embedded systems. These could be controllers 11 for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features 12 vary from memory tuning and frequency scaling to enabling 13 access to attached peripherals through memory bus. 14 15if MEMORY 16 17config DDR 18 bool 19 help 20 Data from JEDEC specs for DDR SDRAM memories, 21 particularly the AC timing parameters and addressing 22 information. This data is useful for drivers handling 23 DDR SDRAM controllers. 24 25config ARM_PL172_MPMC 26 tristate "ARM PL172 MPMC driver" 27 depends on ARM_AMBA && OF 28 help 29 This selects the ARM PrimeCell PL172 MultiPort Memory Controller. 30 If you have an embedded system with an AMBA bus and a PL172 31 controller, say Y or M here. 32 33config ATMEL_SDRAMC 34 bool "Atmel (Multi-port DDR-)SDRAM Controller" 35 default y if ARCH_AT91 36 depends on ARCH_AT91 || COMPILE_TEST 37 depends on OF 38 help 39 This driver is for Atmel SDRAM Controller or Atmel Multi-port 40 DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs. 41 Starting with the at91sam9g45, this controller supports SDR, DDR and 42 LP-DDR memories. 43 44config ATMEL_EBI 45 bool "Atmel EBI driver" 46 default y if ARCH_AT91 47 depends on ARCH_AT91 || COMPILE_TEST 48 depends on OF 49 select MFD_SYSCON 50 select MFD_ATMEL_SMC 51 help 52 Driver for Atmel EBI controller. 53 Used to configure the EBI (external bus interface) when the device- 54 tree is used. This bus supports NANDs, external ethernet controller, 55 SRAMs, ATA devices, etc. 56 57config BRCMSTB_DPFE 58 bool "Broadcom STB DPFE driver" if COMPILE_TEST 59 default y if ARCH_BRCMSTB 60 depends on ARCH_BRCMSTB || COMPILE_TEST 61 help 62 This driver provides access to the DPFE interface of Broadcom 63 STB SoCs. The firmware running on the DCPU inside the DDR PHY can 64 provide current information about the system's RAM, for instance 65 the DRAM refresh rate. This can be used as an indirect indicator 66 for the DRAM's temperature. Slower refresh rate means cooler RAM, 67 higher refresh rate means hotter RAM. 68 69config BT1_L2_CTL 70 bool "Baikal-T1 CM2 L2-RAM Cache Control Block" 71 depends on MIPS_BAIKAL_T1 || COMPILE_TEST 72 select MFD_SYSCON 73 help 74 Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU 75 resides Coherency Manager v2 with embedded 1MB L2-cache. It's 76 possible to tune the L2 cache performance up by setting the data, 77 tags and way-select latencies of RAM access. This driver provides a 78 dt properties-based and sysfs interface for it. 79 80config TI_AEMIF 81 tristate "Texas Instruments AEMIF driver" 82 depends on ARCH_DAVINCI || ARCH_KEYSTONE || COMPILE_TEST 83 depends on OF 84 help 85 This driver is for the AEMIF module available in Texas Instruments 86 SoCs. AEMIF stands for Asynchronous External Memory Interface and 87 is intended to provide a glue-less interface to a variety of 88 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total 89 of 256M bytes of any of these memories can be accessed at a given 90 time via four chip selects with 64M byte access per chip select. 91 92config TI_EMIF 93 tristate "Texas Instruments EMIF driver" 94 depends on ARCH_OMAP2PLUS || COMPILE_TEST 95 select DDR 96 help 97 This driver is for the EMIF module available in Texas Instruments 98 SoCs. EMIF is an SDRAM controller that, based on its revision, 99 supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. 100 This driver takes care of only LPDDR2 memories presently. The 101 functions of the driver includes re-configuring AC timing 102 parameters and other settings during frequency, voltage and 103 temperature changes 104 105config OMAP_GPMC 106 bool "Texas Instruments OMAP SoC GPMC driver" if COMPILE_TEST 107 depends on OF_ADDRESS 108 select GPIOLIB 109 help 110 This driver is for the General Purpose Memory Controller (GPMC) 111 present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows 112 interfacing to a variety of asynchronous as well as synchronous 113 memory drives like NOR, NAND, OneNAND, SRAM. 114 115config OMAP_GPMC_DEBUG 116 bool "Enable GPMC debug output and skip reset of GPMC during init" 117 depends on OMAP_GPMC 118 help 119 Enables verbose debugging mostly to decode the bootloader provided 120 timings. To preserve the bootloader provided timings, the reset 121 of GPMC is skipped during init. Enable this during development to 122 configure devices connected to the GPMC bus. 123 124 NOTE: In addition to matching the register setup with the bootloader 125 you also need to match the GPMC FCLK frequency used by the 126 bootloader or else the GPMC timings won't be identical with the 127 bootloader timings. 128 129config TI_EMIF_SRAM 130 tristate "Texas Instruments EMIF SRAM driver" 131 depends on SOC_AM33XX || SOC_AM43XX || (ARM && CPU_V7 && COMPILE_TEST) 132 depends on SRAM 133 help 134 This driver is for the EMIF module available on Texas Instruments 135 AM33XX and AM43XX SoCs and is required for PM. Certain parts of 136 the EMIF PM code must run from on-chip SRAM late in the suspend 137 sequence so this driver provides several relocatable PM functions 138 for the SoC PM code to use. 139 140config MVEBU_DEVBUS 141 bool "Marvell EBU Device Bus Controller" 142 default y if PLAT_ORION 143 depends on PLAT_ORION || COMPILE_TEST 144 depends on OF 145 help 146 This driver is for the Device Bus controller available in some 147 Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and 148 Armada 370 and Armada XP. This controller allows to handle flash 149 devices such as NOR, NAND, SRAM, and FPGA. 150 151config FSL_CORENET_CF 152 tristate "Freescale CoreNet Error Reporting" 153 depends on FSL_SOC_BOOKE || COMPILE_TEST 154 help 155 Say Y for reporting of errors from the Freescale CoreNet 156 Coherency Fabric. Errors reported include accesses to 157 physical addresses that mapped by no local access window 158 (LAW) or an invalid LAW, as well as bad cache state that 159 represents a coherency violation. 160 161config FSL_IFC 162 bool "Freescale IFC driver" if COMPILE_TEST 163 depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST 164 depends on HAS_IOMEM 165 166config JZ4780_NEMC 167 bool "Ingenic JZ4780 SoC NEMC driver" 168 depends on MIPS || COMPILE_TEST 169 depends on HAS_IOMEM && OF 170 help 171 This driver is for the NAND/External Memory Controller (NEMC) in 172 the Ingenic JZ4780. This controller is used to handle external 173 memory devices such as NAND and SRAM. 174 175config MTK_SMI 176 bool "Mediatek SoC Memory Controller driver" if COMPILE_TEST 177 depends on ARCH_MEDIATEK || COMPILE_TEST 178 help 179 This driver is for the Memory Controller module in MediaTek SoCs, 180 mainly help enable/disable iommu and control the power domain and 181 clocks for each local arbiter. 182 183config DA8XX_DDRCTL 184 bool "Texas Instruments da8xx DDR2/mDDR driver" 185 depends on ARCH_DAVINCI_DA8XX || COMPILE_TEST 186 help 187 This driver is for the DDR2/mDDR Memory Controller present on 188 Texas Instruments da8xx SoCs. It's used to tweak various memory 189 controller configuration options. 190 191config PL353_SMC 192 tristate "ARM PL35X Static Memory Controller(SMC) driver" 193 default y if ARM 194 depends on ARM || COMPILE_TEST 195 depends on ARM_AMBA 196 help 197 This driver is for the ARM PL351/PL353 Static Memory 198 Controller(SMC) module. 199 200config RENESAS_RPCIF 201 tristate "Renesas RPC-IF driver" 202 depends on ARCH_RENESAS || COMPILE_TEST 203 select REGMAP_MMIO 204 help 205 This supports Renesas R-Car Gen3 RPC-IF which provides either SPI 206 host or HyperFlash. You'll have to select individual components 207 under the corresponding menu. 208 209config STM32_FMC2_EBI 210 tristate "Support for FMC2 External Bus Interface on STM32MP SoCs" 211 depends on MACH_STM32MP157 || COMPILE_TEST 212 select MFD_SYSCON 213 help 214 Select this option to enable the STM32 FMC2 External Bus Interface 215 controller. This driver configures the transactions with external 216 devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on 217 SOCs containing the FMC2 External Bus Interface. 218 219source "drivers/memory/samsung/Kconfig" 220source "drivers/memory/tegra/Kconfig" 221 222endif 223