1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 27ec94453SAneesh V# 37ec94453SAneesh V# Memory devices 47ec94453SAneesh V# 57ec94453SAneesh V 67ec94453SAneesh Vmenuconfig MEMORY 77ec94453SAneesh V bool "Memory Controller drivers" 8*2664a075SKrzysztof Kozlowski help 9*2664a075SKrzysztof Kozlowski This option allows to enable specific memory controller drivers, 10*2664a075SKrzysztof Kozlowski useful mostly on embedded systems. These could be controllers 11*2664a075SKrzysztof Kozlowski for DRAM (SDR, DDR), ROM, SRAM and others. The drivers features 12*2664a075SKrzysztof Kozlowski vary from memory tuning and frequency scaling to enabling 13*2664a075SKrzysztof Kozlowski access to attached peripherals through memory bus. 147ec94453SAneesh V 157ec94453SAneesh Vif MEMORY 167ec94453SAneesh V 177b43b8fdSMasahiro Yamadaconfig DDR 187b43b8fdSMasahiro Yamada bool 197b43b8fdSMasahiro Yamada help 207b43b8fdSMasahiro Yamada Data from JEDEC specs for DDR SDRAM memories, 217b43b8fdSMasahiro Yamada particularly the AC timing parameters and addressing 227b43b8fdSMasahiro Yamada information. This data is useful for drivers handling 237b43b8fdSMasahiro Yamada DDR SDRAM controllers. 247b43b8fdSMasahiro Yamada 2517c50b70SJoachim Eastwoodconfig ARM_PL172_MPMC 2617c50b70SJoachim Eastwood tristate "ARM PL172 MPMC driver" 2717c50b70SJoachim Eastwood depends on ARM_AMBA && OF 2817c50b70SJoachim Eastwood help 2917c50b70SJoachim Eastwood This selects the ARM PrimeCell PL172 MultiPort Memory Controller. 3017c50b70SJoachim Eastwood If you have an embedded system with an AMBA bus and a PL172 3117c50b70SJoachim Eastwood controller, say Y or M here. 3217c50b70SJoachim Eastwood 33e81b6abeSAlexandre Belloniconfig ATMEL_SDRAMC 34e81b6abeSAlexandre Belloni bool "Atmel (Multi-port DDR-)SDRAM Controller" 35e81b6abeSAlexandre Belloni default y 36e81b6abeSAlexandre Belloni depends on ARCH_AT91 && OF 37e81b6abeSAlexandre Belloni help 38e81b6abeSAlexandre Belloni This driver is for Atmel SDRAM Controller or Atmel Multi-port 39e81b6abeSAlexandre Belloni DDR-SDRAM Controller available on Atmel AT91SAM9 and SAMA5 SoCs. 40e81b6abeSAlexandre Belloni Starting with the at91sam9g45, this controller supports SDR, DDR and 41e81b6abeSAlexandre Belloni LP-DDR memories. 42e81b6abeSAlexandre Belloni 436a4ec4cdSBoris Brezillonconfig ATMEL_EBI 446a4ec4cdSBoris Brezillon bool "Atmel EBI driver" 456a4ec4cdSBoris Brezillon default y 466a4ec4cdSBoris Brezillon depends on ARCH_AT91 && OF 476a4ec4cdSBoris Brezillon select MFD_SYSCON 488eb8c7d8SBoris Brezillon select MFD_ATMEL_SMC 496a4ec4cdSBoris Brezillon help 506a4ec4cdSBoris Brezillon Driver for Atmel EBI controller. 516a4ec4cdSBoris Brezillon Used to configure the EBI (external bus interface) when the device- 526a4ec4cdSBoris Brezillon tree is used. This bus supports NANDs, external ethernet controller, 536a4ec4cdSBoris Brezillon SRAMs, ATA devices, etc. 546a4ec4cdSBoris Brezillon 5583ca8b3eSSerge Seminconfig BT1_L2_CTL 5683ca8b3eSSerge Semin bool "Baikal-T1 CM2 L2-RAM Cache Control Block" 5783ca8b3eSSerge Semin depends on MIPS_BAIKAL_T1 || COMPILE_TEST 5883ca8b3eSSerge Semin select MFD_SYSCON 5983ca8b3eSSerge Semin help 6083ca8b3eSSerge Semin Baikal-T1 CPU is based on the MIPS P5600 Warrior IP-core. The CPU 6183ca8b3eSSerge Semin resides Coherency Manager v2 with embedded 1MB L2-cache. It's 6283ca8b3eSSerge Semin possible to tune the L2 cache performance up by setting the data, 6383ca8b3eSSerge Semin tags and way-select latencies of RAM access. This driver provides a 6483ca8b3eSSerge Semin dt properties-based and sysfs interface for it. 6583ca8b3eSSerge Semin 665a7c8154SIvan Khoronzhukconfig TI_AEMIF 675a7c8154SIvan Khoronzhuk tristate "Texas Instruments AEMIF driver" 685a7c8154SIvan Khoronzhuk depends on (ARCH_DAVINCI || ARCH_KEYSTONE) && OF 695a7c8154SIvan Khoronzhuk help 705a7c8154SIvan Khoronzhuk This driver is for the AEMIF module available in Texas Instruments 715a7c8154SIvan Khoronzhuk SoCs. AEMIF stands for Asynchronous External Memory Interface and 725a7c8154SIvan Khoronzhuk is intended to provide a glue-less interface to a variety of 735a7c8154SIvan Khoronzhuk asynchronuous memory devices like ASRAM, NOR and NAND memory. A total 745a7c8154SIvan Khoronzhuk of 256M bytes of any of these memories can be accessed at a given 755a7c8154SIvan Khoronzhuk time via four chip selects with 64M byte access per chip select. 765a7c8154SIvan Khoronzhuk 777ec94453SAneesh Vconfig TI_EMIF 787ec94453SAneesh V tristate "Texas Instruments EMIF driver" 7918e9a971SSantosh Shilimkar depends on ARCH_OMAP2PLUS 807ec94453SAneesh V select DDR 817ec94453SAneesh V help 827ec94453SAneesh V This driver is for the EMIF module available in Texas Instruments 837ec94453SAneesh V SoCs. EMIF is an SDRAM controller that, based on its revision, 847ec94453SAneesh V supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols. 857ec94453SAneesh V This driver takes care of only LPDDR2 memories presently. The 867ec94453SAneesh V functions of the driver includes re-configuring AC timing 877ec94453SAneesh V parameters and other settings during frequency, voltage and 887ec94453SAneesh V temperature changes 897ec94453SAneesh V 9018640193STony Lindgrenconfig OMAP_GPMC 9118640193STony Lindgren bool 92d2d00862SRoger Quadros select GPIOLIB 9318640193STony Lindgren help 9418640193STony Lindgren This driver is for the General Purpose Memory Controller (GPMC) 9518640193STony Lindgren present on Texas Instruments SoCs (e.g. OMAP2+). GPMC allows 9618640193STony Lindgren interfacing to a variety of asynchronous as well as synchronous 9718640193STony Lindgren memory drives like NOR, NAND, OneNAND, SRAM. 9818640193STony Lindgren 9963aa945bSTony Lindgrenconfig OMAP_GPMC_DEBUG 100be59b619STony Lindgren bool "Enable GPMC debug output and skip reset of GPMC during init" 10163aa945bSTony Lindgren depends on OMAP_GPMC 10263aa945bSTony Lindgren help 10363aa945bSTony Lindgren Enables verbose debugging mostly to decode the bootloader provided 104be59b619STony Lindgren timings. To preserve the bootloader provided timings, the reset 105be59b619STony Lindgren of GPMC is skipped during init. Enable this during development to 106be59b619STony Lindgren configure devices connected to the GPMC bus. 107be59b619STony Lindgren 108be59b619STony Lindgren NOTE: In addition to matching the register setup with the bootloader 109be59b619STony Lindgren you also need to match the GPMC FCLK frequency used by the 110be59b619STony Lindgren bootloader or else the GPMC timings won't be identical with the 111be59b619STony Lindgren bootloader timings. 11263aa945bSTony Lindgren 1138428e5adSDave Gerlachconfig TI_EMIF_SRAM 1148428e5adSDave Gerlach tristate "Texas Instruments EMIF SRAM driver" 1158428e5adSDave Gerlach depends on (SOC_AM33XX || SOC_AM43XX) && SRAM 1168428e5adSDave Gerlach help 1178428e5adSDave Gerlach This driver is for the EMIF module available on Texas Instruments 1188428e5adSDave Gerlach AM33XX and AM43XX SoCs and is required for PM. Certain parts of 1198428e5adSDave Gerlach the EMIF PM code must run from on-chip SRAM late in the suspend 1208428e5adSDave Gerlach sequence so this driver provides several relocatable PM functions 1218428e5adSDave Gerlach for the SoC PM code to use. 1228428e5adSDave Gerlach 1233edad321SEzequiel Garciaconfig MVEBU_DEVBUS 1243edad321SEzequiel Garcia bool "Marvell EBU Device Bus Controller" 1253edad321SEzequiel Garcia default y 1263edad321SEzequiel Garcia depends on PLAT_ORION && OF 1273edad321SEzequiel Garcia help 1283edad321SEzequiel Garcia This driver is for the Device Bus controller available in some 1293edad321SEzequiel Garcia Marvell EBU SoCs such as Discovery (mv78xx0), Orion (88f5xxx) and 1303edad321SEzequiel Garcia Armada 370 and Armada XP. This controller allows to handle flash 1313edad321SEzequiel Garcia devices such as NOR, NAND, SRAM, and FPGA. 1323edad321SEzequiel Garcia 13354afbec0SScott Woodconfig FSL_CORENET_CF 13454afbec0SScott Wood tristate "Freescale CoreNet Error Reporting" 13554afbec0SScott Wood depends on FSL_SOC_BOOKE 13654afbec0SScott Wood help 13754afbec0SScott Wood Say Y for reporting of errors from the Freescale CoreNet 13854afbec0SScott Wood Coherency Fabric. Errors reported include accesses to 13954afbec0SScott Wood physical addresses that mapped by no local access window 14054afbec0SScott Wood (LAW) or an invalid LAW, as well as bad cache state that 14154afbec0SScott Wood represents a coherency violation. 14254afbec0SScott Wood 14342d87b18SPaul Gortmakerconfig FSL_IFC 14442d87b18SPaul Gortmaker bool 145b30a2bd4SBoris Brezillon depends on FSL_SOC || ARCH_LAYERSCAPE || SOC_LS1021A || COMPILE_TEST 146b30a2bd4SBoris Brezillon depends on HAS_IOMEM 14742d87b18SPaul Gortmaker 148911a8882SAlex Smithconfig JZ4780_NEMC 149911a8882SAlex Smith bool "Ingenic JZ4780 SoC NEMC driver" 150911a8882SAlex Smith default y 15194b3a02cSPaul Cercueil depends on MIPS || COMPILE_TEST 15216909c81SAnders Roxell depends on HAS_IOMEM && OF 153911a8882SAlex Smith help 154911a8882SAlex Smith This driver is for the NAND/External Memory Controller (NEMC) in 155911a8882SAlex Smith the Ingenic JZ4780. This controller is used to handle external 156911a8882SAlex Smith memory devices such as NAND and SRAM. 157911a8882SAlex Smith 158cc8bbe1aSYong Wuconfig MTK_SMI 159cc8bbe1aSYong Wu bool 160cc8bbe1aSYong Wu depends on ARCH_MEDIATEK || COMPILE_TEST 161cc8bbe1aSYong Wu help 162cc8bbe1aSYong Wu This driver is for the Memory Controller module in MediaTek SoCs, 163cc8bbe1aSYong Wu mainly help enable/disable iommu and control the power domain and 164cc8bbe1aSYong Wu clocks for each local arbiter. 165cc8bbe1aSYong Wu 16662a8a739SBartosz Golaszewskiconfig DA8XX_DDRCTL 16762a8a739SBartosz Golaszewski bool "Texas Instruments da8xx DDR2/mDDR driver" 16862a8a739SBartosz Golaszewski depends on ARCH_DAVINCI_DA8XX 16962a8a739SBartosz Golaszewski help 17062a8a739SBartosz Golaszewski This driver is for the DDR2/mDDR Memory Controller present on 17162a8a739SBartosz Golaszewski Texas Instruments da8xx SoCs. It's used to tweak various memory 17262a8a739SBartosz Golaszewski controller configuration options. 17362a8a739SBartosz Golaszewski 174fee10bd2SNaga Sureshkumar Relliconfig PL353_SMC 175fee10bd2SNaga Sureshkumar Relli tristate "ARM PL35X Static Memory Controller(SMC) driver" 176fee10bd2SNaga Sureshkumar Relli default y 177fee10bd2SNaga Sureshkumar Relli depends on ARM 178fee10bd2SNaga Sureshkumar Relli depends on ARM_AMBA 179fee10bd2SNaga Sureshkumar Relli help 180fee10bd2SNaga Sureshkumar Relli This driver is for the ARM PL351/PL353 Static Memory 181fee10bd2SNaga Sureshkumar Relli Controller(SMC) module. 182fee10bd2SNaga Sureshkumar Relli 183a8aabb91SPankaj Dubeysource "drivers/memory/samsung/Kconfig" 18489184651SThierry Redingsource "drivers/memory/tegra/Kconfig" 18589184651SThierry Reding 1867ec94453SAneesh Vendif 187