xref: /linux/drivers/media/platform/qcom/iris/iris_hfi_gen1.c (revision 9cebfe6504488198b012e746bc6b313f88b95439)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
4  */
5 
6 #include "iris_ctrls.h"
7 #include "iris_platform_common.h"
8 #include "iris_hfi_gen1.h"
9 #include "iris_hfi_gen1_defines.h"
10 #include "iris_vpu_buffer.h"
11 
12 #define BITRATE_MIN		32000
13 #define BITRATE_MAX		160000000
14 #define BITRATE_STEP		100
15 
16 static struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] = {
17 	{
18 		.cap_id = PIPE,
19 		/* .max, .min and .value are set via platform data */
20 		.step_or_mask = 1,
21 		.hfi_id = HFI_PROPERTY_PARAM_WORK_ROUTE,
22 		.set = iris_set_pipe,
23 	},
24 	{
25 		.cap_id = STAGE,
26 		.min = STAGE_1,
27 		.max = STAGE_2,
28 		.step_or_mask = 1,
29 		.value = STAGE_2,
30 		.hfi_id = HFI_PROPERTY_PARAM_WORK_MODE,
31 		.set = iris_set_stage,
32 	},
33 };
34 
35 static const struct platform_inst_fw_cap inst_fw_cap_sm8250_enc[] = {
36 	{
37 		.cap_id = STAGE,
38 		.min = STAGE_1,
39 		.max = STAGE_2,
40 		.step_or_mask = 1,
41 		.value = STAGE_2,
42 		.hfi_id = HFI_PROPERTY_PARAM_WORK_MODE,
43 		.set = iris_set_stage,
44 	},
45 	{
46 		.cap_id = PROFILE_H264,
47 		.min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
48 		.max = V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
49 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
50 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) |
51 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
52 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) |
53 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH) |
54 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH),
55 		.value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
56 		.hfi_id = HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT,
57 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
58 		.set = iris_set_profile_level_gen1,
59 	},
60 	{
61 		.cap_id = PROFILE_HEVC,
62 		.min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
63 		.max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10,
64 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) |
65 				BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) |
66 				BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10),
67 		.value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
68 		.hfi_id = HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT,
69 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
70 		.set = iris_set_profile_level_gen1,
71 	},
72 	{
73 		.cap_id = LEVEL_H264,
74 		.min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
75 		.max = V4L2_MPEG_VIDEO_H264_LEVEL_5_1,
76 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) |
77 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) |
78 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) |
79 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) |
80 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) |
81 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) |
82 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) |
83 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) |
84 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) |
85 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) |
86 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) |
87 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) |
88 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) |
89 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) |
90 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) |
91 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1),
92 		.value = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
93 		.hfi_id = HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT,
94 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
95 		.set = iris_set_profile_level_gen1,
96 	},
97 	{
98 		.cap_id = LEVEL_HEVC,
99 		.min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
100 		.max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
101 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) |
102 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) |
103 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) |
104 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) |
105 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) |
106 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) |
107 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) |
108 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) |
109 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
110 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
111 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
112 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) |
113 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
114 		.value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
115 		.hfi_id = HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT,
116 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
117 		.set = iris_set_profile_level_gen1,
118 	},
119 	{
120 		.cap_id = HEADER_MODE,
121 		.min = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
122 		.max = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
123 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) |
124 				BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME),
125 		.value = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
126 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER,
127 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
128 		.set = iris_set_header_mode_gen1,
129 	},
130 	{
131 		.cap_id = BITRATE,
132 		.min = BITRATE_MIN,
133 		.max = BITRATE_MAX,
134 		.step_or_mask = BITRATE_STEP,
135 		.value = BITRATE_DEFAULT,
136 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
137 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
138 			CAP_FLAG_DYNAMIC_ALLOWED,
139 		.set = iris_set_bitrate_gen1,
140 	},
141 	{
142 		.cap_id = BITRATE_MODE,
143 		.min = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
144 		.max = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR,
145 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) |
146 				BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR),
147 		.value = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
148 		.hfi_id = HFI_PROPERTY_PARAM_VENC_RATE_CONTROL,
149 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
150 		.set = iris_set_bitrate_mode_gen1,
151 	},
152 	{
153 		.cap_id = FRAME_SKIP_MODE,
154 		.min = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,
155 		.max = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT,
156 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) |
157 				BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT),
158 		.value = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,
159 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
160 	},
161 	{
162 		.cap_id = FRAME_RC_ENABLE,
163 		.min = 0,
164 		.max = 1,
165 		.step_or_mask = 1,
166 		.value = 1,
167 	},
168 	{
169 		.cap_id = GOP_SIZE,
170 		.min = 0,
171 		.max = (1 << 16) - 1,
172 		.step_or_mask = 1,
173 		.value = 30,
174 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD,
175 		.flags = CAP_FLAG_OUTPUT_PORT,
176 		.set = iris_set_intra_period,
177 	},
178 	{
179 		.cap_id = ENTROPY_MODE,
180 		.min = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
181 		.max = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
182 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) |
183 				BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC),
184 		.value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
185 		.hfi_id = HFI_PROPERTY_PARAM_VENC_H264_ENTROPY_CONTROL,
186 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
187 		.set = iris_set_entropy_mode_gen1,
188 	},
189 	{
190 		.cap_id = MIN_FRAME_QP_H264,
191 		.min = MIN_QP_8BIT,
192 		.max = MAX_QP,
193 		.step_or_mask = 1,
194 		.value = MIN_QP_8BIT,
195 		.hfi_id = HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2,
196 		.flags = CAP_FLAG_OUTPUT_PORT,
197 		.set = iris_set_qp_range,
198 	},
199 	{
200 		.cap_id = MIN_FRAME_QP_HEVC,
201 		.min = MIN_QP_8BIT,
202 		.max = MAX_QP_HEVC,
203 		.step_or_mask = 1,
204 		.value = MIN_QP_8BIT,
205 		.hfi_id = HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2,
206 		.flags = CAP_FLAG_OUTPUT_PORT,
207 		.set = iris_set_qp_range,
208 	},
209 	{
210 		.cap_id = MAX_FRAME_QP_H264,
211 		.min = MIN_QP_8BIT,
212 		.max = MAX_QP,
213 		.step_or_mask = 1,
214 		.value = MAX_QP,
215 		.hfi_id = HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2,
216 		.flags = CAP_FLAG_OUTPUT_PORT,
217 		.set = iris_set_qp_range,
218 	},
219 	{
220 		.cap_id = MAX_FRAME_QP_HEVC,
221 		.min = MIN_QP_8BIT,
222 		.max = MAX_QP_HEVC,
223 		.step_or_mask = 1,
224 		.value = MAX_QP_HEVC,
225 		.hfi_id = HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2,
226 		.flags = CAP_FLAG_OUTPUT_PORT,
227 		.set = iris_set_qp_range,
228 	},
229 	{
230 		.cap_id = IR_TYPE,
231 		.min = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM,
232 		.max = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC,
233 		.step_or_mask = BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) |
234 			BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC),
235 		.value = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM,
236 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
237 	},
238 	{
239 		.cap_id = IR_PERIOD,
240 		.min = 0,
241 		.max = ((4096 * 2304) >> 8),
242 		.step_or_mask = 1,
243 		.value = 0,
244 		.hfi_id = HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH,
245 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED,
246 		.set = iris_set_ir_period_gen1,
247 	},
248 	{
249 		.cap_id = LTR_COUNT,
250 		.min = 0,
251 		.max = MAX_LTR_FRAME_COUNT_GEN1,
252 		.step_or_mask = 1,
253 		.value = 0,
254 		.hfi_id = HFI_PROPERTY_PARAM_VENC_LTRMODE,
255 		.flags = CAP_FLAG_OUTPUT_PORT,
256 		.set = iris_set_ltr_count_gen1,
257 	},
258 	{
259 		.cap_id = USE_LTR,
260 		.min = 0,
261 		.max = ((1 << MAX_LTR_FRAME_COUNT_GEN1) - 1),
262 		.step_or_mask = 0,
263 		.value = 0,
264 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_USELTRFRAME,
265 		.flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED,
266 		.set = iris_set_use_ltr,
267 	},
268 	{
269 		.cap_id = MARK_LTR,
270 		.min = 0,
271 		.max = (MAX_LTR_FRAME_COUNT_GEN1 - 1),
272 		.step_or_mask = 1,
273 		.value = 0,
274 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME,
275 		.flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED,
276 		.set = iris_set_mark_ltr,
277 	},
278 	{
279 		.cap_id = B_FRAME,
280 		.min = 0,
281 		.max = 3,
282 		.step_or_mask = 1,
283 		.value = 0,
284 		.flags = CAP_FLAG_OUTPUT_PORT,
285 	},
286 	{
287 		.cap_id = LAYER_ENABLE,
288 		.min = 0,
289 		.max = 1,
290 		.step_or_mask = 1,
291 		.value = 0,
292 		.flags = CAP_FLAG_OUTPUT_PORT,
293 	},
294 	{
295 		.cap_id = LAYER_TYPE_H264,
296 		.min = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P,
297 		.max = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P,
298 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P),
299 		.value = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P,
300 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
301 	},
302 	{
303 		.cap_id = LAYER_COUNT_H264,
304 		.min = 0,
305 		.max = MAX_HIER_CODING_LAYER_GEN1,
306 		.step_or_mask = 1,
307 		.value = 0,
308 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER,
309 		.flags = CAP_FLAG_OUTPUT_PORT,
310 		.set = iris_set_layer_count_gen1,
311 	},
312 	{
313 		.cap_id = LAYER0_BITRATE_H264,
314 		.min = 1,
315 		.max = BITRATE_MAX,
316 		.step_or_mask = 1,
317 		.value = BITRATE_DEFAULT,
318 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
319 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
320 			CAP_FLAG_DYNAMIC_ALLOWED,
321 		.set = iris_set_bitrate_gen1,
322 	},
323 	{
324 		.cap_id = LAYER1_BITRATE_H264,
325 		.min = 1,
326 		.max = BITRATE_MAX,
327 		.step_or_mask = 1,
328 		.value = BITRATE_DEFAULT,
329 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
330 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
331 			CAP_FLAG_DYNAMIC_ALLOWED,
332 		.set = iris_set_bitrate_gen1,
333 	},
334 	{
335 		.cap_id = LAYER2_BITRATE_H264,
336 		.min = 1,
337 		.max = BITRATE_MAX,
338 		.step_or_mask = 1,
339 		.value = BITRATE_DEFAULT,
340 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
341 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
342 			CAP_FLAG_DYNAMIC_ALLOWED,
343 		.set = iris_set_bitrate_gen1,
344 	},
345 	{
346 		.cap_id = LAYER3_BITRATE_H264,
347 		.min = 1,
348 		.max = BITRATE_MAX,
349 		.step_or_mask = 1,
350 		.value = BITRATE_DEFAULT,
351 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
352 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
353 			CAP_FLAG_DYNAMIC_ALLOWED,
354 		.set = iris_set_bitrate_gen1,
355 	},
356 	{
357 		.cap_id = LAYER4_BITRATE_H264,
358 		.min = 1,
359 		.max = BITRATE_MAX,
360 		.step_or_mask = 1,
361 		.value = BITRATE_DEFAULT,
362 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
363 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
364 			CAP_FLAG_DYNAMIC_ALLOWED,
365 		.set = iris_set_bitrate_gen1,
366 	},
367 	{
368 		.cap_id = LAYER5_BITRATE_H264,
369 		.min = 1,
370 		.max = BITRATE_MAX,
371 		.step_or_mask = 1,
372 		.value = BITRATE_DEFAULT,
373 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
374 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
375 			CAP_FLAG_DYNAMIC_ALLOWED,
376 		.set = iris_set_bitrate_gen1,
377 	},
378 	{
379 		.cap_id = REQUEST_SYNC_FRAME,
380 		.min = 0,
381 		.max = 1,
382 		.step_or_mask = 1,
383 		.value = 0,
384 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_REQUEST_SYNC_FRAME,
385 		.flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED,
386 		.set = iris_set_req_sync_frame,
387 	},
388 };
389 
390 static const u32 sm8250_vdec_input_config_param_default[] = {
391 	HFI_PROPERTY_CONFIG_VIDEOCORES_USAGE,
392 	HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SELECT,
393 	HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO,
394 	HFI_PROPERTY_PARAM_BUFFER_COUNT_ACTUAL,
395 	HFI_PROPERTY_PARAM_VDEC_MULTI_STREAM,
396 	HFI_PROPERTY_PARAM_FRAME_SIZE,
397 	HFI_PROPERTY_PARAM_BUFFER_SIZE_ACTUAL,
398 	HFI_PROPERTY_PARAM_BUFFER_ALLOC_MODE,
399 };
400 
401 static const u32 sm8250_venc_input_config_param[] = {
402 	HFI_PROPERTY_CONFIG_FRAME_RATE,
403 	HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_INFO,
404 	HFI_PROPERTY_PARAM_FRAME_SIZE,
405 	HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SELECT,
406 	HFI_PROPERTY_PARAM_BUFFER_COUNT_ACTUAL,
407 };
408 
409 static const u32 sm8250_dec_ip_int_buf_tbl[] = {
410 	BUF_BIN,
411 	BUF_SCRATCH_1,
412 };
413 
414 static const u32 sm8250_dec_op_int_buf_tbl[] = {
415 	BUF_DPB,
416 };
417 
418 static const u32 sm8250_enc_ip_int_buf_tbl[] = {
419 	BUF_BIN,
420 	BUF_SCRATCH_1,
421 	BUF_SCRATCH_2,
422 };
423 
424 const struct iris_firmware_data iris_hfi_gen1_data = {
425 	.init_hfi_ops = &iris_hfi_gen1_sys_ops_init,
426 
427 	.inst_fw_caps_dec = inst_fw_cap_sm8250_dec,
428 	.inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8250_dec),
429 	.inst_fw_caps_enc = inst_fw_cap_sm8250_enc,
430 	.inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8250_enc),
431 
432 	.dec_input_config_params_default =
433 		sm8250_vdec_input_config_param_default,
434 	.dec_input_config_params_default_size =
435 		ARRAY_SIZE(sm8250_vdec_input_config_param_default),
436 	.enc_input_config_params = sm8250_venc_input_config_param,
437 	.enc_input_config_params_size =
438 		ARRAY_SIZE(sm8250_venc_input_config_param),
439 
440 	.dec_ip_int_buf_tbl = sm8250_dec_ip_int_buf_tbl,
441 	.dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_ip_int_buf_tbl),
442 	.dec_op_int_buf_tbl = sm8250_dec_op_int_buf_tbl,
443 	.dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_op_int_buf_tbl),
444 
445 	.enc_ip_int_buf_tbl = sm8250_enc_ip_int_buf_tbl,
446 	.enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl),
447 };
448