xref: /linux/drivers/media/platform/qcom/iris/iris_hfi_gen1.c (revision e0507d45b3c171296248b4382271a003c6c2e058)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
4  */
5 
6 #include "iris_ctrls.h"
7 #include "iris_platform_common.h"
8 #include "iris_hfi_gen1.h"
9 #include "iris_hfi_gen1_defines.h"
10 #include "iris_vpu_buffer.h"
11 
12 #define BITRATE_MIN		32000
13 #define BITRATE_MAX		160000000
14 #define BITRATE_STEP		100
15 
16 static struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] = {
17 	{
18 		.cap_id = PIPE,
19 		/* .max, .min and .value are set via platform data */
20 		.step_or_mask = 1,
21 		.hfi_id = HFI_PROPERTY_PARAM_WORK_ROUTE,
22 		.set = iris_set_pipe,
23 	},
24 	{
25 		.cap_id = STAGE,
26 		.min = STAGE_1,
27 		.max = STAGE_2,
28 		.step_or_mask = 1,
29 		.value = STAGE_2,
30 		.hfi_id = HFI_PROPERTY_PARAM_WORK_MODE,
31 		.set = iris_set_stage,
32 	},
33 };
34 
35 static const struct platform_inst_fw_cap inst_fw_cap_sm8250_enc[] = {
36 	{
37 		.cap_id = STAGE,
38 		.min = STAGE_1,
39 		.max = STAGE_2,
40 		.step_or_mask = 1,
41 		.value = STAGE_2,
42 		.hfi_id = HFI_PROPERTY_PARAM_WORK_MODE,
43 		.set = iris_set_stage,
44 	},
45 	{
46 		.cap_id = PROFILE_H264,
47 		.min = V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE,
48 		.max = V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
49 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
50 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) |
51 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
52 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) |
53 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_STEREO_HIGH) |
54 				BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH),
55 		.value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
56 		.hfi_id = HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT,
57 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
58 		.set = iris_set_profile_level_gen1,
59 	},
60 	{
61 		.cap_id = PROFILE_HEVC,
62 		.min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
63 		.max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10,
64 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) |
65 				BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) |
66 				BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10),
67 		.value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
68 		.hfi_id = HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT,
69 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
70 		.set = iris_set_profile_level_gen1,
71 	},
72 	{
73 		.cap_id = LEVEL_H264,
74 		.min = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
75 		.max = V4L2_MPEG_VIDEO_H264_LEVEL_5_1,
76 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) |
77 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) |
78 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) |
79 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) |
80 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) |
81 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) |
82 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) |
83 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) |
84 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) |
85 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) |
86 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) |
87 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) |
88 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) |
89 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) |
90 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) |
91 				BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1),
92 		.value = V4L2_MPEG_VIDEO_H264_LEVEL_1_0,
93 		.hfi_id = HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT,
94 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
95 		.set = iris_set_profile_level_gen1,
96 	},
97 	{
98 		.cap_id = LEVEL_HEVC,
99 		.min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
100 		.max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
101 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) |
102 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) |
103 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) |
104 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) |
105 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) |
106 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) |
107 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) |
108 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) |
109 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) |
110 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) |
111 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) |
112 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) |
113 				BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2),
114 		.value = V4L2_MPEG_VIDEO_HEVC_LEVEL_1,
115 		.hfi_id = HFI_PROPERTY_PARAM_PROFILE_LEVEL_CURRENT,
116 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
117 		.set = iris_set_profile_level_gen1,
118 	},
119 	{
120 		.cap_id = HEADER_MODE,
121 		.min = V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE,
122 		.max = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
123 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) |
124 				BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME),
125 		.value = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
126 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_SYNC_FRAME_SEQUENCE_HEADER,
127 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
128 		.set = iris_set_header_mode_gen1,
129 	},
130 	{
131 		.cap_id = BITRATE,
132 		.min = BITRATE_MIN,
133 		.max = BITRATE_MAX,
134 		.step_or_mask = BITRATE_STEP,
135 		.value = BITRATE_DEFAULT,
136 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
137 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
138 			CAP_FLAG_DYNAMIC_ALLOWED,
139 		.set = iris_set_bitrate_gen1,
140 	},
141 	{
142 		.cap_id = BITRATE_MODE,
143 		.min = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
144 		.max = V4L2_MPEG_VIDEO_BITRATE_MODE_CBR,
145 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) |
146 				BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR),
147 		.value = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
148 		.hfi_id = HFI_PROPERTY_PARAM_VENC_RATE_CONTROL,
149 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
150 		.set = iris_set_bitrate_mode_gen1,
151 	},
152 	{
153 		.cap_id = FRAME_SKIP_MODE,
154 		.min = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,
155 		.max = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT,
156 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) |
157 				BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT),
158 		.value = V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED,
159 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
160 	},
161 	{
162 		.cap_id = FRAME_RC_ENABLE,
163 		.min = 0,
164 		.max = 1,
165 		.step_or_mask = 1,
166 		.value = 1,
167 	},
168 	{
169 		.cap_id = GOP_SIZE,
170 		.min = 0,
171 		.max = (1 << 16) - 1,
172 		.step_or_mask = 1,
173 		.value = 30,
174 		.set = iris_set_u32
175 	},
176 	{
177 		.cap_id = ENTROPY_MODE,
178 		.min = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
179 		.max = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
180 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) |
181 				BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC),
182 		.value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC,
183 		.hfi_id = HFI_PROPERTY_PARAM_VENC_H264_ENTROPY_CONTROL,
184 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
185 		.set = iris_set_entropy_mode_gen1,
186 	},
187 	{
188 		.cap_id = MIN_FRAME_QP_H264,
189 		.min = MIN_QP_8BIT,
190 		.max = MAX_QP,
191 		.step_or_mask = 1,
192 		.value = MIN_QP_8BIT,
193 		.hfi_id = HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2,
194 		.flags = CAP_FLAG_OUTPUT_PORT,
195 		.set = iris_set_qp_range,
196 	},
197 	{
198 		.cap_id = MIN_FRAME_QP_HEVC,
199 		.min = MIN_QP_8BIT,
200 		.max = MAX_QP_HEVC,
201 		.step_or_mask = 1,
202 		.value = MIN_QP_8BIT,
203 		.hfi_id = HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2,
204 		.flags = CAP_FLAG_OUTPUT_PORT,
205 		.set = iris_set_qp_range,
206 	},
207 	{
208 		.cap_id = MAX_FRAME_QP_H264,
209 		.min = MIN_QP_8BIT,
210 		.max = MAX_QP,
211 		.step_or_mask = 1,
212 		.value = MAX_QP,
213 		.hfi_id = HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2,
214 		.flags = CAP_FLAG_OUTPUT_PORT,
215 		.set = iris_set_qp_range,
216 	},
217 	{
218 		.cap_id = MAX_FRAME_QP_HEVC,
219 		.min = MIN_QP_8BIT,
220 		.max = MAX_QP_HEVC,
221 		.step_or_mask = 1,
222 		.value = MAX_QP_HEVC,
223 		.hfi_id = HFI_PROPERTY_PARAM_VENC_SESSION_QP_RANGE_V2,
224 		.flags = CAP_FLAG_OUTPUT_PORT,
225 		.set = iris_set_qp_range,
226 	},
227 	{
228 		.cap_id = IR_TYPE,
229 		.min = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM,
230 		.max = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC,
231 		.step_or_mask = BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM) |
232 			BIT(V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_CYCLIC),
233 		.value = V4L2_CID_MPEG_VIDEO_INTRA_REFRESH_PERIOD_TYPE_RANDOM,
234 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
235 	},
236 	{
237 		.cap_id = IR_PERIOD,
238 		.min = 0,
239 		.max = ((4096 * 2304) >> 8),
240 		.step_or_mask = 1,
241 		.value = 0,
242 		.hfi_id = HFI_PROPERTY_PARAM_VENC_INTRA_REFRESH,
243 		.flags = CAP_FLAG_OUTPUT_PORT,
244 		.set = iris_set_ir_period_gen1,
245 	},
246 	{
247 		.cap_id = LTR_COUNT,
248 		.min = 0,
249 		.max = MAX_LTR_FRAME_COUNT_GEN1,
250 		.step_or_mask = 1,
251 		.value = 0,
252 		.hfi_id = HFI_PROPERTY_PARAM_VENC_LTRMODE,
253 		.flags = CAP_FLAG_OUTPUT_PORT,
254 		.set = iris_set_ltr_count_gen1,
255 	},
256 	{
257 		.cap_id = USE_LTR,
258 		.min = 0,
259 		.max = ((1 << MAX_LTR_FRAME_COUNT_GEN1) - 1),
260 		.step_or_mask = 0,
261 		.value = 0,
262 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_USELTRFRAME,
263 		.flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED,
264 		.set = iris_set_use_ltr,
265 	},
266 	{
267 		.cap_id = MARK_LTR,
268 		.min = 0,
269 		.max = (MAX_LTR_FRAME_COUNT_GEN1 - 1),
270 		.step_or_mask = 1,
271 		.value = 0,
272 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_MARKLTRFRAME,
273 		.flags = CAP_FLAG_INPUT_PORT | CAP_FLAG_DYNAMIC_ALLOWED,
274 		.set = iris_set_mark_ltr,
275 	},
276 	{
277 		.cap_id = B_FRAME,
278 		.min = 0,
279 		.max = 3,
280 		.step_or_mask = 1,
281 		.value = 0,
282 		.flags = CAP_FLAG_OUTPUT_PORT,
283 	},
284 	{
285 		.cap_id = INTRA_PERIOD,
286 		.min = 0,
287 		.max = 1,
288 		.step_or_mask = 1,
289 		.value = 0,
290 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_INTRA_PERIOD,
291 		.flags = CAP_FLAG_OUTPUT_PORT,
292 		.set = iris_set_intra_period,
293 	},
294 	{
295 		.cap_id = LAYER_ENABLE,
296 		.min = 0,
297 		.max = 1,
298 		.step_or_mask = 1,
299 		.value = 0,
300 		.flags = CAP_FLAG_OUTPUT_PORT,
301 	},
302 	{
303 		.cap_id = LAYER_TYPE_H264,
304 		.min = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P,
305 		.max = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P,
306 		.step_or_mask = BIT(V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P),
307 		.value = V4L2_MPEG_VIDEO_H264_HIERARCHICAL_CODING_P,
308 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
309 	},
310 	{
311 		.cap_id = LAYER_COUNT_H264,
312 		.min = 0,
313 		.max = MAX_HIER_CODING_LAYER_GEN1,
314 		.step_or_mask = 1,
315 		.value = 0,
316 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_HIER_P_ENH_LAYER,
317 		.flags = CAP_FLAG_OUTPUT_PORT,
318 		.set = iris_set_layer_count_gen1,
319 	},
320 	{
321 		.cap_id = LAYER0_BITRATE_H264,
322 		.min = 1,
323 		.max = BITRATE_MAX,
324 		.step_or_mask = 1,
325 		.value = BITRATE_DEFAULT,
326 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
327 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
328 			CAP_FLAG_DYNAMIC_ALLOWED,
329 		.set = iris_set_bitrate_gen1,
330 	},
331 	{
332 		.cap_id = LAYER1_BITRATE_H264,
333 		.min = 1,
334 		.max = BITRATE_MAX,
335 		.step_or_mask = 1,
336 		.value = BITRATE_DEFAULT,
337 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
338 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
339 			CAP_FLAG_DYNAMIC_ALLOWED,
340 		.set = iris_set_bitrate_gen1,
341 	},
342 	{
343 		.cap_id = LAYER2_BITRATE_H264,
344 		.min = 1,
345 		.max = BITRATE_MAX,
346 		.step_or_mask = 1,
347 		.value = BITRATE_DEFAULT,
348 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
349 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
350 			CAP_FLAG_DYNAMIC_ALLOWED,
351 		.set = iris_set_bitrate_gen1,
352 	},
353 	{
354 		.cap_id = LAYER3_BITRATE_H264,
355 		.min = 1,
356 		.max = BITRATE_MAX,
357 		.step_or_mask = 1,
358 		.value = BITRATE_DEFAULT,
359 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
360 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
361 			CAP_FLAG_DYNAMIC_ALLOWED,
362 		.set = iris_set_bitrate_gen1,
363 	},
364 	{
365 		.cap_id = LAYER4_BITRATE_H264,
366 		.min = 1,
367 		.max = BITRATE_MAX,
368 		.step_or_mask = 1,
369 		.value = BITRATE_DEFAULT,
370 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
371 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
372 			CAP_FLAG_DYNAMIC_ALLOWED,
373 		.set = iris_set_bitrate_gen1,
374 	},
375 	{
376 		.cap_id = LAYER5_BITRATE_H264,
377 		.min = 1,
378 		.max = BITRATE_MAX,
379 		.step_or_mask = 1,
380 		.value = BITRATE_DEFAULT,
381 		.hfi_id = HFI_PROPERTY_CONFIG_VENC_TARGET_BITRATE,
382 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
383 			CAP_FLAG_DYNAMIC_ALLOWED,
384 		.set = iris_set_bitrate_gen1,
385 	},
386 };
387 
388 static const u32 sm8250_vdec_input_config_param_default[] = {
389 	HFI_PROPERTY_CONFIG_VIDEOCORES_USAGE,
390 	HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SELECT,
391 	HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_CONSTRAINTS_INFO,
392 	HFI_PROPERTY_PARAM_BUFFER_COUNT_ACTUAL,
393 	HFI_PROPERTY_PARAM_VDEC_MULTI_STREAM,
394 	HFI_PROPERTY_PARAM_FRAME_SIZE,
395 	HFI_PROPERTY_PARAM_BUFFER_SIZE_ACTUAL,
396 	HFI_PROPERTY_PARAM_BUFFER_ALLOC_MODE,
397 };
398 
399 static const u32 sm8250_venc_input_config_param[] = {
400 	HFI_PROPERTY_CONFIG_FRAME_RATE,
401 	HFI_PROPERTY_PARAM_UNCOMPRESSED_PLANE_ACTUAL_INFO,
402 	HFI_PROPERTY_PARAM_FRAME_SIZE,
403 	HFI_PROPERTY_PARAM_UNCOMPRESSED_FORMAT_SELECT,
404 	HFI_PROPERTY_PARAM_BUFFER_COUNT_ACTUAL,
405 };
406 
407 static const u32 sm8250_dec_ip_int_buf_tbl[] = {
408 	BUF_BIN,
409 	BUF_SCRATCH_1,
410 };
411 
412 static const u32 sm8250_dec_op_int_buf_tbl[] = {
413 	BUF_DPB,
414 };
415 
416 static const u32 sm8250_enc_ip_int_buf_tbl[] = {
417 	BUF_BIN,
418 	BUF_SCRATCH_1,
419 	BUF_SCRATCH_2,
420 };
421 
422 const struct iris_firmware_data iris_hfi_gen1_data = {
423 	.init_hfi_ops = &iris_hfi_gen1_sys_ops_init,
424 
425 	.inst_fw_caps_dec = inst_fw_cap_sm8250_dec,
426 	.inst_fw_caps_dec_size = ARRAY_SIZE(inst_fw_cap_sm8250_dec),
427 	.inst_fw_caps_enc = inst_fw_cap_sm8250_enc,
428 	.inst_fw_caps_enc_size = ARRAY_SIZE(inst_fw_cap_sm8250_enc),
429 
430 	.dec_input_config_params_default =
431 		sm8250_vdec_input_config_param_default,
432 	.dec_input_config_params_default_size =
433 		ARRAY_SIZE(sm8250_vdec_input_config_param_default),
434 	.enc_input_config_params = sm8250_venc_input_config_param,
435 	.enc_input_config_params_size =
436 		ARRAY_SIZE(sm8250_venc_input_config_param),
437 
438 	.dec_ip_int_buf_tbl = sm8250_dec_ip_int_buf_tbl,
439 	.dec_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_ip_int_buf_tbl),
440 	.dec_op_int_buf_tbl = sm8250_dec_op_int_buf_tbl,
441 	.dec_op_int_buf_tbl_size = ARRAY_SIZE(sm8250_dec_op_int_buf_tbl),
442 
443 	.enc_ip_int_buf_tbl = sm8250_enc_ip_int_buf_tbl,
444 	.enc_ip_int_buf_tbl_size = ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl),
445 };
446