1*70b19398SWenmeng Liu /* SPDX-License-Identifier: GPL-2.0 */ 2*70b19398SWenmeng Liu /* 3*70b19398SWenmeng Liu * camss-tpg.h 4*70b19398SWenmeng Liu * 5*70b19398SWenmeng Liu * Qualcomm MSM Camera Subsystem - TPG Module 6*70b19398SWenmeng Liu * 7*70b19398SWenmeng Liu * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. 8*70b19398SWenmeng Liu */ 9*70b19398SWenmeng Liu #ifndef QC_MSM_CAMSS_TPG_H 10*70b19398SWenmeng Liu #define QC_MSM_CAMSS_TPG_H 11*70b19398SWenmeng Liu 12*70b19398SWenmeng Liu #include <linux/clk.h> 13*70b19398SWenmeng Liu #include <linux/bitfield.h> 14*70b19398SWenmeng Liu #include <media/media-entity.h> 15*70b19398SWenmeng Liu #include <media/v4l2-ctrls.h> 16*70b19398SWenmeng Liu #include <media/v4l2-device.h> 17*70b19398SWenmeng Liu #include <media/v4l2-mediabus.h> 18*70b19398SWenmeng Liu #include <media/v4l2-subdev.h> 19*70b19398SWenmeng Liu 20*70b19398SWenmeng Liu #define ENCODE_FORMAT_UNCOMPRESSED_8_BIT 0x1 21*70b19398SWenmeng Liu #define ENCODE_FORMAT_UNCOMPRESSED_10_BIT 0x2 22*70b19398SWenmeng Liu #define ENCODE_FORMAT_UNCOMPRESSED_12_BIT 0x3 23*70b19398SWenmeng Liu #define ENCODE_FORMAT_UNCOMPRESSED_14_BIT 0x4 24*70b19398SWenmeng Liu #define ENCODE_FORMAT_UNCOMPRESSED_16_BIT 0x5 25*70b19398SWenmeng Liu #define ENCODE_FORMAT_UNCOMPRESSED_20_BIT 0x6 26*70b19398SWenmeng Liu #define ENCODE_FORMAT_UNCOMPRESSED_24_BIT 0x7 27*70b19398SWenmeng Liu 28*70b19398SWenmeng Liu #define MSM_TPG_PAD_SRC 0 29*70b19398SWenmeng Liu #define MSM_TPG_ACTIVE_VC 0 30*70b19398SWenmeng Liu #define MSM_TPG_ACTIVE_DT 0 31*70b19398SWenmeng Liu 32*70b19398SWenmeng Liu #define TPG_MIN_WIDTH 1 33*70b19398SWenmeng Liu #define TPG_MIN_HEIGHT 1 34*70b19398SWenmeng Liu #define TPG_MAX_WIDTH 8191 35*70b19398SWenmeng Liu #define TPG_MAX_HEIGHT 8191 36*70b19398SWenmeng Liu 37*70b19398SWenmeng Liu #define TPG_GRP_ID 0 38*70b19398SWenmeng Liu 39*70b19398SWenmeng Liu enum tpg_testgen_mode { 40*70b19398SWenmeng Liu TPG_PAYLOAD_MODE_DISABLED = 0, 41*70b19398SWenmeng Liu TPG_PAYLOAD_MODE_INCREMENTING = 1, 42*70b19398SWenmeng Liu TPG_PAYLOAD_MODE_ALTERNATING_55_AA = 2, 43*70b19398SWenmeng Liu TPG_PAYLOAD_MODE_RANDOM = 5, 44*70b19398SWenmeng Liu TPG_PAYLOAD_MODE_USER_SPECIFIED = 6, 45*70b19398SWenmeng Liu TPG_PAYLOAD_MODE_COLOR_BARS = 9, 46*70b19398SWenmeng Liu TPG_PAYLOAD_MODE_NUM_SUPPORTED_GEN1 = 9, 47*70b19398SWenmeng Liu }; 48*70b19398SWenmeng Liu 49*70b19398SWenmeng Liu struct tpg_testgen_config { 50*70b19398SWenmeng Liu enum tpg_testgen_mode mode; 51*70b19398SWenmeng Liu const char * const*modes; 52*70b19398SWenmeng Liu u8 nmodes; 53*70b19398SWenmeng Liu }; 54*70b19398SWenmeng Liu 55*70b19398SWenmeng Liu struct tpg_format_info { 56*70b19398SWenmeng Liu u32 code; 57*70b19398SWenmeng Liu u8 data_type; 58*70b19398SWenmeng Liu u8 encode_format; 59*70b19398SWenmeng Liu u8 bpp; 60*70b19398SWenmeng Liu }; 61*70b19398SWenmeng Liu 62*70b19398SWenmeng Liu struct tpg_formats { 63*70b19398SWenmeng Liu unsigned int nformats; 64*70b19398SWenmeng Liu const struct tpg_format_info *formats; 65*70b19398SWenmeng Liu }; 66*70b19398SWenmeng Liu 67*70b19398SWenmeng Liu struct tpg_device; 68*70b19398SWenmeng Liu 69*70b19398SWenmeng Liu struct tpg_hw_ops { 70*70b19398SWenmeng Liu int (*configure_stream)(struct tpg_device *tpg, u8 enable); 71*70b19398SWenmeng Liu int (*configure_testgen_pattern)(struct tpg_device *tpg, s32 val); 72*70b19398SWenmeng Liu u32 (*hw_version)(struct tpg_device *tpg); 73*70b19398SWenmeng Liu int (*reset)(struct tpg_device *tpg); 74*70b19398SWenmeng Liu void (*subdev_init)(struct tpg_device *tpg); 75*70b19398SWenmeng Liu }; 76*70b19398SWenmeng Liu 77*70b19398SWenmeng Liu struct tpg_subdev_resources { 78*70b19398SWenmeng Liu u8 lane_cnt; 79*70b19398SWenmeng Liu const struct tpg_formats *formats; 80*70b19398SWenmeng Liu const struct tpg_hw_ops *hw_ops; 81*70b19398SWenmeng Liu }; 82*70b19398SWenmeng Liu 83*70b19398SWenmeng Liu struct tpg_device { 84*70b19398SWenmeng Liu struct camss *camss; 85*70b19398SWenmeng Liu u8 id; 86*70b19398SWenmeng Liu struct v4l2_subdev subdev; 87*70b19398SWenmeng Liu struct media_pad pad; 88*70b19398SWenmeng Liu void __iomem *base; 89*70b19398SWenmeng Liu struct camss_clock *clock; 90*70b19398SWenmeng Liu int nclocks; 91*70b19398SWenmeng Liu struct tpg_testgen_config testgen; 92*70b19398SWenmeng Liu struct v4l2_mbus_framefmt fmt; 93*70b19398SWenmeng Liu struct v4l2_ctrl_handler ctrls; 94*70b19398SWenmeng Liu struct v4l2_ctrl *testgen_mode; 95*70b19398SWenmeng Liu const struct tpg_subdev_resources *res; 96*70b19398SWenmeng Liu u32 hw_version; 97*70b19398SWenmeng Liu }; 98*70b19398SWenmeng Liu 99*70b19398SWenmeng Liu struct camss_subdev_resources; 100*70b19398SWenmeng Liu 101*70b19398SWenmeng Liu const struct tpg_format_info *tpg_get_fmt_entry(const struct tpg_format_info *formats, 102*70b19398SWenmeng Liu unsigned int nformats, 103*70b19398SWenmeng Liu u32 code); 104*70b19398SWenmeng Liu 105*70b19398SWenmeng Liu int msm_tpg_subdev_init(struct camss *camss, 106*70b19398SWenmeng Liu struct tpg_device *tpg, 107*70b19398SWenmeng Liu const struct camss_subdev_resources *res, u8 id); 108*70b19398SWenmeng Liu 109*70b19398SWenmeng Liu int msm_tpg_register_entity(struct tpg_device *tpg, 110*70b19398SWenmeng Liu struct v4l2_device *v4l2_dev); 111*70b19398SWenmeng Liu 112*70b19398SWenmeng Liu void msm_tpg_unregister_entity(struct tpg_device *tpg); 113*70b19398SWenmeng Liu 114*70b19398SWenmeng Liu extern const struct tpg_formats tpg_formats_gen1; 115*70b19398SWenmeng Liu 116*70b19398SWenmeng Liu extern const struct tpg_hw_ops tpg_ops_gen1; 117*70b19398SWenmeng Liu 118*70b19398SWenmeng Liu #endif /* QC_MSM_CAMSS_TPG_H */ 119