xref: /linux/drivers/media/platform/dreamchip/rppx1/rppx1_shrp.c (revision f4cdf7ca9a1fdcca413157df19753f388a5a224e)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2026 Renesas Electronics Corp.
4  * Copyright (C) 2026 Ideas on Board Oy
5  * Copyright (C) 2026 Ragnatech AB
6  */
7 
8 #include "rpp_module.h"
9 
10 #define SHRPCNR_VERSION_REG				0x0000
11 
12 #define SHRPCNR_CTRL_REG				0x0004
13 #define SHRPCNR_CTRL_CAD_EN				BIT(3)
14 #define SHRPCNR_CTRL_DESAT_EN				BIT(2)
15 #define SHRPCNR_CTRL_CNR_EN				BIT(1)
16 #define SHRPCNR_CTRL_SHARPEN_EN				BIT(0)
17 
18 #define SHRPCNR_PARAM_REG				0x0008
19 #define SHRPCNR_PARAM_SHARP_FACTOR_MASK			GENMASK(19, 12)
20 #define SHRPCNR_PARAM_CORING_THR_MASK			GENMASK(11, 0)
21 
22 #define SHRPCNR_MAT_1_REG				0x000c
23 #define SHRPCNR_MAT_2_REG				0x0010
24 #define SHRPCNR_CLB_LINESIZE_REG			0x0014
25 #define SHRPCNR_YUV2RGB_CCOR_COEFF_0_REG		0x0018
26 #define SHRPCNR_YUV2RGB_CCOR_COEFF_1_REG		0x001c
27 #define SHRPCNR_YUV2RGB_CCOR_COEFF_2_REG		0x0020
28 #define SHRPCNR_YUV2RGB_CCOR_COEFF_3_REG		0x0024
29 #define SHRPCNR_YUV2RGB_CCOR_COEFF_4_REG		0x0028
30 #define SHRPCNR_YUV2RGB_CCOR_COEFF_5_REG		0x002c
31 #define SHRPCNR_YUV2RGB_CCOR_COEFF_6_REG		0x0030
32 #define SHRPCNR_YUV2RGB_CCOR_COEFF_7_REG		0x0034
33 #define SHRPCNR_YUV2RGB_CCOR_COEFF_8_REG		0x0038
34 #define SHRPCNR_YUV2RGB_CCOR_OFFSET_R_REG		0x003c
35 #define SHRPCNR_YUV2RGB_CCOR_OFFSET_G_REG		0x0040
36 #define SHRPCNR_YUV2RGB_CCOR_OFFSET_B_REG		0x0044
37 
38 #define SHRPCNR_CNR_THRES_REG				0x0048
39 #define SHRPCNR_CNR_THRES_CNR_THRES_CR_MASK		GENMASK(27, 16)
40 #define SHRPCNR_CNR_THRES_CNR_THRES_CB_MASK		GENMASK(11, 0)
41 
42 #define SHRPCNR_CRED_THRES_REG				0x004c
43 #define SHRPCNR_CRED_SLOPE_REG				0x0050
44 #define SHRPCNR_CAD_RESTORE_LVL_REG			0x0054
45 #define SHRPCNR_CAD_THRESH_V_UNEG_REG			0x0058
46 #define SHRPCNR_CAD_THRESH_V_UPOS_REG			0x005c
47 #define SHRPCNR_CAD_THRESH_U_REG			0x0060
48 
49 static int rppx1_shrp_probe(struct rpp_module *mod)
50 {
51 	/* Version check. */
52 	switch (rpp_module_read(mod, SHRPCNR_VERSION_REG)) {
53 	case 2:
54 		/* 12-bit. */
55 		break;
56 	default:
57 		return -EINVAL;
58 	}
59 
60 	return 0;
61 }
62 
63 const struct rpp_module_ops rppx1_shrp_ops = {
64 	.probe = rppx1_shrp_probe,
65 };
66