xref: /linux/drivers/media/platform/dreamchip/rppx1/rppx1_outregs.c (revision f4cdf7ca9a1fdcca413157df19753f388a5a224e)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2026 Renesas Electronics Corp.
4  * Copyright (C) 2026 Ideas on Board Oy
5  * Copyright (C) 2026 Ragnatech AB
6  */
7 
8 #include "rpp_module.h"
9 
10 #define OUTREGS_VERSION_REG					0x0000
11 
12 #define OUT_MODE_REG						0x0004
13 #define OUT_MODE_UNSELECTED_MODE_MASK				GENMASK(11, 8)
14 #define OUT_MODE_UNSELECTED_MODE_MAIN				(0x1 << 8)
15 #define OUT_MODE_UNSELECTED_MODE_PRE1				(0x2 << 8)
16 #define OUT_MODE_UNSELECTED_MODE_PRE2				(0x4 << 8)
17 #define OUT_MODE_IN_SEL_MASK					GENMASK(3, 0)
18 #define OUT_MODE_IN_SEL_MAIN					1
19 #define OUT_MODE_IN_SEL_PRE1					2
20 #define OUT_MODE_IN_SEL_PRE2					4
21 
22 #define OUT_CONV_422_METHOD_REG					0x0008
23 #define OUT_CONV_422_METHOD_CONV_422_METHOD_MASK		GENMASK(1, 0)
24 #define OUT_CONV_422_METHOD_CONV_422_METHOD_CO_SITED1		0
25 #define OUT_CONV_422_METHOD_CONV_422_METHOD_CO_SITED2		1
26 #define OUT_CONV_422_METHOD_CONV_422_METHOD_NON_CO_SITED	2
27 
28 #define OUTREGS_FORMAT_REG					0x000c
29 #define OUTREGS_FORMAT_OUTPUT_FORMAT_MASK			GENMASK(1, 0)
30 #define OUTREGS_FORMAT_OUTPUT_FORMAT_RGB			0
31 #define OUTREGS_FORMAT_OUTPUT_FORMAT_YUV422			1
32 #define OUTREGS_FORMAT_OUTPUT_FORMAT_YUV420			2
33 
34 static int rppx1_outregs_probe(struct rpp_module *mod)
35 {
36 	/* Version check. */
37 	if (rpp_module_read(mod, OUTREGS_VERSION_REG) != 2)
38 		return -EINVAL;
39 
40 	return 0;
41 }
42 
43 static int rppx1_outregs_start(struct rpp_module *mod,
44 			       const struct v4l2_mbus_framefmt *fmt)
45 {
46 	u32 format;
47 
48 	switch (fmt->code) {
49 	case MEDIA_BUS_FMT_YUYV12_1X24:
50 		format = OUTREGS_FORMAT_OUTPUT_FORMAT_YUV422;
51 		break;
52 	case MEDIA_BUS_FMT_RGB888_1X24:
53 		format = OUTREGS_FORMAT_OUTPUT_FORMAT_RGB;
54 		break;
55 	default:
56 		return -EINVAL;
57 	}
58 
59 	rpp_module_clrset(mod, OUT_MODE_REG,
60 			  OUT_MODE_UNSELECTED_MODE_MASK | OUT_MODE_IN_SEL_MASK,
61 			  OUT_MODE_UNSELECTED_MODE_MASK | OUT_MODE_IN_SEL_MAIN);
62 
63 	rpp_module_clrset(mod, OUT_CONV_422_METHOD_REG,
64 			  OUT_CONV_422_METHOD_CONV_422_METHOD_MASK,
65 			  OUT_CONV_422_METHOD_CONV_422_METHOD_CO_SITED1);
66 
67 	rpp_module_clrset(mod, OUTREGS_FORMAT_REG,
68 			  OUTREGS_FORMAT_OUTPUT_FORMAT_MASK, format);
69 
70 	return 0;
71 }
72 
73 const struct rpp_module_ops rppx1_outregs_ops = {
74 	.probe = rppx1_outregs_probe,
75 	.start = rppx1_outregs_start,
76 };
77