1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Support for T4KA3 8M camera sensor. 4 * 5 * Copyright (C) 2015 Intel Corporation. All Rights Reserved. 6 * Copyright (C) 2016 XiaoMi, Inc. 7 * Copyright (C) 2024 Hans de Goede <hansg@kernel.org> 8 * Copyright (C) 2026 Kate Hsuan <hpa@redhat.com> 9 */ 10 11 #include <linux/acpi.h> 12 #include <linux/bits.h> 13 #include <linux/delay.h> 14 #include <linux/dev_printk.h> 15 #include <linux/device.h> 16 #include <linux/err.h> 17 #include <linux/errno.h> 18 #include <linux/gpio/consumer.h> 19 #include <linux/i2c.h> 20 #include <linux/mod_devicetable.h> 21 #include <linux/mutex.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/regmap.h> 24 #include <linux/types.h> 25 26 #include <media/media-entity.h> 27 #include <media/v4l2-async.h> 28 #include <media/v4l2-cci.h> 29 #include <media/v4l2-common.h> 30 #include <media/v4l2-ctrls.h> 31 #include <media/v4l2-fwnode.h> 32 #include <media/v4l2-subdev.h> 33 34 #define T4KA3_NATIVE_WIDTH 3280 35 #define T4KA3_NATIVE_HEIGHT 2464 36 #define T4KA3_NATIVE_START_LEFT 0 37 #define T4KA3_NATIVE_START_TOP 0 38 #define T4KA3_ACTIVE_WIDTH 3280 39 #define T4KA3_ACTIVE_HEIGHT 2460 40 #define T4KA3_ACTIVE_START_LEFT 0 41 #define T4KA3_ACTIVE_START_TOP 2 42 #define T4KA3_MIN_CROP_WIDTH 2 43 #define T4KA3_MIN_CROP_HEIGHT 2 44 45 #define T4KA3_PIXELS_PER_LINE 3440 46 #define T4KA3_LINES_PER_FRAME_30FPS 2492 47 #define T4KA3_FPS 30 48 #define T4KA3_PIXEL_RATE \ 49 (T4KA3_PIXELS_PER_LINE * T4KA3_LINES_PER_FRAME_30FPS * T4KA3_FPS) 50 51 /* 52 * TODO this really should be derived from the 19.2 MHz xvclk combined 53 * with the PLL settings. But without a datasheet this is the closest 54 * approximation possible. 55 * 56 * link-freq = pixel_rate * bpp / (lanes * 2) 57 * (lanes * 2) because CSI lanes use double-data-rate (DDR) signalling. 58 * bpp = 10 and lanes = 4 59 */ 60 #define T4KA3_LINK_FREQ ((u64)T4KA3_PIXEL_RATE * 10 / 8) 61 62 /* For enum_frame_size() full-size + binned-/quarter-size */ 63 #define T4KA3_FRAME_SIZES 2 64 65 #define T4KA3_REG_PRODUCT_ID_HIGH CCI_REG8(0x0000) 66 #define T4KA3_REG_PRODUCT_ID_LOW CCI_REG8(0x0001) 67 #define T4KA3_PRODUCT_ID 0x1490 68 69 #define T4KA3_REG_STREAM CCI_REG8(0x0100) 70 #define T4KA3_REG_IMG_ORIENTATION CCI_REG8(0x0101) 71 #define T4KA3_HFLIP_BIT BIT(0) 72 #define T4KA3_VFLIP_BIT BIT(1) 73 #define T4KA3_REG_PARAM_HOLD CCI_REG8(0x0104) 74 #define T4KA3_REG_COARSE_INTEGRATION_TIME CCI_REG16(0x0202) 75 #define T4KA3_COARSE_INTEGRATION_TIME_MARGIN 6 76 #define T4KA3_REG_DIGGAIN_GREEN_R CCI_REG16(0x020e) 77 #define T4KA3_REG_DIGGAIN_RED CCI_REG16(0x0210) 78 #define T4KA3_REG_DIGGAIN_BLUE CCI_REG16(0x0212) 79 #define T4KA3_REG_DIGGAIN_GREEN_B CCI_REG16(0x0214) 80 #define T4KA3_REG_GLOBAL_GAIN CCI_REG16(0x0234) 81 #define T4KA3_MIN_GLOBAL_GAIN_SUPPORTED 0x0080 82 #define T4KA3_MAX_GLOBAL_GAIN_SUPPORTED 0x07ff 83 #define T4KA3_REG_FRAME_LENGTH_LINES CCI_REG16(0x0340) /* aka VTS */ 84 /* FIXME: need a datasheet to verify the min + max vblank values */ 85 #define T4KA3_MIN_VBLANK 4 86 #define T4KA3_MAX_VBLANK 0xffff 87 #define T4KA3_REG_PIXELS_PER_LINE CCI_REG16(0x0342) /* aka HTS */ 88 /* These 2 being horz/vert start is a guess (no datasheet), always 0 */ 89 #define T4KA3_REG_HORZ_START CCI_REG16(0x0344) 90 #define T4KA3_REG_VERT_START CCI_REG16(0x0346) 91 /* Always 3279 (T4KA3_NATIVE_WIDTH - 1, window is used to crop */ 92 #define T4KA3_REG_HORZ_END CCI_REG16(0x0348) 93 /* Always 2463 (T4KA3_NATIVE_HEIGHT - 1, window is used to crop */ 94 #define T4KA3_REG_VERT_END CCI_REG16(0x034a) 95 /* Output size (after cropping/window) */ 96 #define T4KA3_REG_HORZ_OUTPUT_SIZE CCI_REG16(0x034c) 97 #define T4KA3_REG_VERT_OUTPUT_SIZE CCI_REG16(0x034e) 98 /* Window/crop start + size *after* binning */ 99 #define T4KA3_REG_WIN_START_X CCI_REG16(0x0408) 100 #define T4KA3_REG_WIN_START_Y CCI_REG16(0x040a) 101 #define T4KA3_REG_WIN_WIDTH CCI_REG16(0x040c) 102 #define T4KA3_REG_WIN_HEIGHT CCI_REG16(0x040e) 103 #define T4KA3_REG_TEST_PATTERN_MODE CCI_REG8(0x0601) 104 /* Unknown register at address 0x0900 */ 105 #define T4KA3_REG_0900 CCI_REG8(0x0900) 106 #define T4KA3_REG_BINNING CCI_REG8(0x0901) 107 #define T4KA3_BINNING_VAL(_bin) \ 108 ({ \ 109 typeof(_bin) (b) = (_bin); \ 110 ((b) << 4) | (b); \ 111 }) 112 113 #define to_t4ka3_sensor(_sd) container_of_const(_sd, \ 114 struct t4ka3_data, sd) 115 #define ctrl_to_t4ka3(_ctrl) container_of_const((_ctrl)->handler, \ 116 struct t4ka3_data, \ 117 ctrls.handler) 118 119 struct t4ka3_ctrls { 120 struct v4l2_ctrl_handler handler; 121 struct v4l2_ctrl *hflip; 122 struct v4l2_ctrl *vflip; 123 struct v4l2_ctrl *vblank; 124 struct v4l2_ctrl *hblank; 125 struct v4l2_ctrl *exposure; 126 struct v4l2_ctrl *gain; 127 struct v4l2_ctrl *test_pattern; 128 struct v4l2_ctrl *link_freq; 129 struct v4l2_ctrl *pixel_rate; 130 }; 131 132 struct t4ka3_mode { 133 int binning; 134 u16 win_x; 135 u16 win_y; 136 }; 137 138 struct t4ka3_data { 139 struct v4l2_subdev sd; 140 struct media_pad pad; 141 struct mutex lock; /* serialize sensor's ioctl */ 142 struct t4ka3_ctrls ctrls; 143 struct t4ka3_mode mode; 144 struct device *dev; 145 struct regmap *regmap; 146 struct gpio_desc *powerdown_gpio; 147 struct gpio_desc *reset_gpio; 148 int streaming; 149 150 /* MIPI lane info */ 151 u32 link_freq_index; 152 u8 mipi_lanes; 153 }; 154 155 /* init settings */ 156 static const struct cci_reg_sequence t4ka3_init_config[] = { 157 { CCI_REG8(0x4136), 0x13 }, 158 { CCI_REG8(0x4137), 0x33 }, 159 { CCI_REG8(0x3094), 0x01 }, 160 { CCI_REG8(0x0233), 0x01 }, 161 { CCI_REG8(0x4B06), 0x01 }, 162 { CCI_REG8(0x4B07), 0x01 }, 163 { CCI_REG8(0x3028), 0x01 }, 164 { CCI_REG8(0x3032), 0x14 }, 165 { CCI_REG8(0x305C), 0x0C }, 166 { CCI_REG8(0x306D), 0x0A }, 167 { CCI_REG8(0x3071), 0xFA }, 168 { CCI_REG8(0x307E), 0x0A }, 169 { CCI_REG8(0x307F), 0xFC }, 170 { CCI_REG8(0x3091), 0x04 }, 171 { CCI_REG8(0x3092), 0x60 }, 172 { CCI_REG8(0x3096), 0xC0 }, 173 { CCI_REG8(0x3100), 0x07 }, 174 { CCI_REG8(0x3101), 0x4C }, 175 { CCI_REG8(0x3118), 0xCC }, 176 { CCI_REG8(0x3139), 0x06 }, 177 { CCI_REG8(0x313A), 0x06 }, 178 { CCI_REG8(0x313B), 0x04 }, 179 { CCI_REG8(0x3143), 0x02 }, 180 { CCI_REG8(0x314F), 0x0E }, 181 { CCI_REG8(0x3169), 0x99 }, 182 { CCI_REG8(0x316A), 0x99 }, 183 { CCI_REG8(0x3171), 0x05 }, 184 { CCI_REG8(0x31A1), 0xA7 }, 185 { CCI_REG8(0x31A2), 0x9C }, 186 { CCI_REG8(0x31A3), 0x8F }, 187 { CCI_REG8(0x31A4), 0x75 }, 188 { CCI_REG8(0x31A5), 0xEE }, 189 { CCI_REG8(0x31A6), 0xEA }, 190 { CCI_REG8(0x31A7), 0xE4 }, 191 { CCI_REG8(0x31A8), 0xE4 }, 192 { CCI_REG8(0x31DF), 0x05 }, 193 { CCI_REG8(0x31EC), 0x1B }, 194 { CCI_REG8(0x31ED), 0x1B }, 195 { CCI_REG8(0x31EE), 0x1B }, 196 { CCI_REG8(0x31F0), 0x1B }, 197 { CCI_REG8(0x31F1), 0x1B }, 198 { CCI_REG8(0x31F2), 0x1B }, 199 { CCI_REG8(0x3204), 0x3F }, 200 { CCI_REG8(0x3205), 0x03 }, 201 { CCI_REG8(0x3210), 0x01 }, 202 { CCI_REG8(0x3216), 0x68 }, 203 { CCI_REG8(0x3217), 0x58 }, 204 { CCI_REG8(0x3218), 0x58 }, 205 { CCI_REG8(0x321A), 0x68 }, 206 { CCI_REG8(0x321B), 0x60 }, 207 { CCI_REG8(0x3238), 0x03 }, 208 { CCI_REG8(0x3239), 0x03 }, 209 { CCI_REG8(0x323A), 0x05 }, 210 { CCI_REG8(0x323B), 0x06 }, 211 { CCI_REG8(0x3243), 0x03 }, 212 { CCI_REG8(0x3244), 0x08 }, 213 { CCI_REG8(0x3245), 0x01 }, 214 { CCI_REG8(0x3307), 0x19 }, 215 { CCI_REG8(0x3308), 0x19 }, 216 { CCI_REG8(0x3320), 0x01 }, 217 { CCI_REG8(0x3326), 0x15 }, 218 { CCI_REG8(0x3327), 0x0D }, 219 { CCI_REG8(0x3328), 0x01 }, 220 { CCI_REG8(0x3380), 0x01 }, 221 { CCI_REG8(0x339E), 0x07 }, 222 { CCI_REG8(0x3424), 0x00 }, 223 { CCI_REG8(0x343C), 0x01 }, 224 { CCI_REG8(0x3398), 0x04 }, 225 { CCI_REG8(0x343A), 0x10 }, 226 { CCI_REG8(0x339A), 0x22 }, 227 { CCI_REG8(0x33B4), 0x00 }, 228 { CCI_REG8(0x3393), 0x01 }, 229 { CCI_REG8(0x33B3), 0x6E }, 230 { CCI_REG8(0x3433), 0x06 }, 231 { CCI_REG8(0x3433), 0x00 }, 232 { CCI_REG8(0x33B3), 0x00 }, 233 { CCI_REG8(0x3393), 0x03 }, 234 { CCI_REG8(0x33B4), 0x03 }, 235 { CCI_REG8(0x343A), 0x00 }, 236 { CCI_REG8(0x339A), 0x00 }, 237 { CCI_REG8(0x3398), 0x00 } 238 }; 239 240 static const struct cci_reg_sequence t4ka3_pre_mode_set_regs[] = { 241 { CCI_REG8(0x0112), 0x0A }, 242 { CCI_REG8(0x0113), 0x0A }, 243 { CCI_REG8(0x0114), 0x03 }, 244 { CCI_REG8(0x4136), 0x13 }, 245 { CCI_REG8(0x4137), 0x33 }, 246 { CCI_REG8(0x0820), 0x0A }, 247 { CCI_REG8(0x0821), 0x0D }, 248 { CCI_REG8(0x0822), 0x00 }, 249 { CCI_REG8(0x0823), 0x00 }, 250 { CCI_REG8(0x0301), 0x0A }, 251 { CCI_REG8(0x0303), 0x01 }, 252 { CCI_REG8(0x0305), 0x04 }, 253 { CCI_REG8(0x0306), 0x02 }, 254 { CCI_REG8(0x0307), 0x18 }, 255 { CCI_REG8(0x030B), 0x01 }, 256 }; 257 258 static const struct cci_reg_sequence t4ka3_post_mode_set_regs[] = { 259 { CCI_REG8(0x0902), 0x00 }, 260 { CCI_REG8(0x4220), 0x00 }, 261 { CCI_REG8(0x4222), 0x01 }, 262 { CCI_REG8(0x3380), 0x01 }, 263 { CCI_REG8(0x3090), 0x88 }, 264 { CCI_REG8(0x3394), 0x20 }, 265 { CCI_REG8(0x3090), 0x08 }, 266 { CCI_REG8(0x3394), 0x10 } 267 }; 268 269 static const s64 link_freq_menu_items[] = { 270 T4KA3_LINK_FREQ, 271 }; 272 273 /* T4KA3 default GRBG */ 274 static const int t4ka3_hv_flip_bayer_order[] = { 275 MEDIA_BUS_FMT_SGRBG10_1X10, 276 MEDIA_BUS_FMT_SBGGR10_1X10, 277 MEDIA_BUS_FMT_SRGGB10_1X10, 278 MEDIA_BUS_FMT_SGBRG10_1X10, 279 }; 280 281 static const struct v4l2_rect t4ka3_default_crop = { 282 .left = T4KA3_ACTIVE_START_LEFT, 283 .top = T4KA3_ACTIVE_START_TOP, 284 .width = T4KA3_ACTIVE_WIDTH, 285 .height = T4KA3_ACTIVE_HEIGHT, 286 }; 287 288 static void t4ka3_set_bayer_order(struct t4ka3_data *sensor, 289 struct v4l2_mbus_framefmt *fmt) 290 { 291 unsigned int hv_flip = 0; 292 293 if (sensor->ctrls.vflip && sensor->ctrls.vflip->val) 294 hv_flip += 1; 295 296 if (sensor->ctrls.hflip && sensor->ctrls.hflip->val) 297 hv_flip += 2; 298 299 fmt->code = t4ka3_hv_flip_bayer_order[hv_flip]; 300 } 301 302 static int t4ka3_update_exposure_range(struct t4ka3_data *sensor, 303 struct v4l2_mbus_framefmt *fmt) 304 { 305 int exp_max = fmt->height + sensor->ctrls.vblank->val - 306 T4KA3_COARSE_INTEGRATION_TIME_MARGIN; 307 308 return __v4l2_ctrl_modify_range(sensor->ctrls.exposure, 0, exp_max, 309 1, exp_max); 310 } 311 312 static void t4ka3_fill_format(struct t4ka3_data *sensor, 313 struct v4l2_mbus_framefmt *fmt, 314 unsigned int width, unsigned int height) 315 { 316 memset(fmt, 0, sizeof(*fmt)); 317 fmt->width = width; 318 fmt->height = height; 319 fmt->field = V4L2_FIELD_NONE; 320 fmt->colorspace = V4L2_COLORSPACE_RAW; 321 t4ka3_set_bayer_order(sensor, fmt); 322 } 323 324 static void t4ka3_calc_mode(struct t4ka3_data *sensor, 325 struct v4l2_mbus_framefmt *fmt, 326 struct v4l2_rect *crop) 327 { 328 int width; 329 int height; 330 int binning; 331 332 width = fmt->width; 333 height = fmt->height; 334 335 if (width <= (crop->width / 2) && height <= (crop->height / 2)) 336 binning = 2; 337 else 338 binning = 1; 339 340 width *= binning; 341 height *= binning; 342 343 sensor->mode.binning = binning; 344 sensor->mode.win_x = (crop->left + (crop->width - width) / 2) & ~1; 345 sensor->mode.win_y = (crop->top + (crop->height - height) / 2) & ~1; 346 /* 347 * t4ka3's window is done after binning, but must still be a 348 * multiple of 2 ? 349 * Round up to avoid top 2 black lines in 1640x1230 (quarter res) case. 350 */ 351 sensor->mode.win_x = DIV_ROUND_UP(sensor->mode.win_x, binning); 352 sensor->mode.win_y = DIV_ROUND_UP(sensor->mode.win_y, binning); 353 } 354 355 static void t4ka3_get_vblank_limits(struct t4ka3_data *sensor, 356 struct v4l2_subdev_state *state, 357 int *min, int *max, int *def) 358 { 359 struct v4l2_mbus_framefmt *fmt = v4l2_subdev_state_get_format(state, 0); 360 361 *min = T4KA3_MIN_VBLANK + (sensor->mode.binning - 1) * fmt->height; 362 *max = T4KA3_MAX_VBLANK - fmt->height; 363 *def = T4KA3_LINES_PER_FRAME_30FPS - fmt->height; 364 } 365 366 static int t4ka3_set_pad_format(struct v4l2_subdev *sd, 367 struct v4l2_subdev_state *sd_state, 368 struct v4l2_subdev_format *format) 369 { 370 struct t4ka3_data *sensor = to_t4ka3_sensor(sd); 371 struct v4l2_mbus_framefmt *fmt = &format->format; 372 struct v4l2_rect *crop = 373 v4l2_subdev_state_get_crop(sd_state, format->pad); 374 unsigned int width, height; 375 int min, max, def, ret = 0; 376 377 /* Limit set_fmt max size to crop width / height */ 378 width = clamp_val(ALIGN(format->format.width, 2), 379 T4KA3_MIN_CROP_WIDTH, crop->width); 380 height = clamp_val(ALIGN(format->format.height, 2), 381 T4KA3_MIN_CROP_HEIGHT, crop->height); 382 t4ka3_fill_format(sensor, &format->format, width, height); 383 384 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE && sensor->streaming) 385 return -EBUSY; 386 387 *v4l2_subdev_state_get_format(sd_state, 0) = format->format; 388 389 if (format->which == V4L2_SUBDEV_FORMAT_TRY) 390 return 0; 391 392 t4ka3_calc_mode(sensor, fmt, crop); 393 394 /* vblank range is height dependent adjust and reset to default */ 395 t4ka3_get_vblank_limits(sensor, sd_state, &min, &max, &def); 396 ret = __v4l2_ctrl_modify_range(sensor->ctrls.vblank, min, max, 1, def); 397 if (ret) 398 return ret; 399 400 ret = __v4l2_ctrl_s_ctrl(sensor->ctrls.vblank, def); 401 if (ret) 402 return ret; 403 404 def = T4KA3_PIXELS_PER_LINE - fmt->width; 405 ret = __v4l2_ctrl_modify_range(sensor->ctrls.hblank, def, def, 1, def); 406 if (ret) 407 return ret; 408 409 return __v4l2_ctrl_s_ctrl(sensor->ctrls.hblank, def); 410 } 411 412 /* Horizontal or vertically flip the image */ 413 static int t4ka3_update_flip(struct v4l2_subdev *sd, 414 struct v4l2_mbus_framefmt *fmt, 415 int value, u8 flip_bit) 416 { 417 struct t4ka3_data *sensor = to_t4ka3_sensor(sd); 418 int ret; 419 u64 val; 420 421 if (sensor->streaming) 422 return -EBUSY; 423 424 val = value ? flip_bit : 0; 425 426 ret = cci_update_bits(sensor->regmap, T4KA3_REG_IMG_ORIENTATION, 427 flip_bit, val, NULL); 428 if (ret) 429 return ret; 430 431 t4ka3_set_bayer_order(sensor, fmt); 432 433 return 0; 434 } 435 436 static int t4ka3_test_pattern(struct t4ka3_data *sensor, s32 value) 437 { 438 return cci_write(sensor->regmap, T4KA3_REG_TEST_PATTERN_MODE, 439 value, NULL); 440 } 441 442 static int t4ka3_detect(struct t4ka3_data *sensor, u16 *id) 443 { 444 struct i2c_client *client = v4l2_get_subdevdata(&sensor->sd); 445 struct i2c_adapter *adapter = client->adapter; 446 u64 high, low; 447 int ret = 0; 448 449 /* i2c check */ 450 if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) 451 return -ENODEV; 452 453 /* check sensor chip ID */ 454 cci_read(sensor->regmap, T4KA3_REG_PRODUCT_ID_HIGH, &high, &ret); 455 cci_read(sensor->regmap, T4KA3_REG_PRODUCT_ID_LOW, &low, &ret); 456 if (ret) 457 return ret; 458 459 *id = (((u8)high) << 8) | (u8)low; 460 if (*id != T4KA3_PRODUCT_ID) { 461 dev_err(sensor->dev, "main sensor t4ka3 ID error\n"); 462 return -ENODEV; 463 } 464 465 return 0; 466 } 467 468 static int t4ka3_s_ctrl(struct v4l2_ctrl *ctrl) 469 { 470 struct t4ka3_data *sensor = ctrl_to_t4ka3(ctrl); 471 struct v4l2_subdev_state *state = 472 v4l2_subdev_get_locked_active_state(&sensor->sd); 473 struct v4l2_mbus_framefmt *fmt = 474 v4l2_subdev_state_get_format(state, 0); 475 int ret; 476 477 /* Update exposure range on vblank changes */ 478 if (ctrl->id == V4L2_CID_VBLANK) { 479 ret = t4ka3_update_exposure_range(sensor, fmt); 480 if (ret) 481 return ret; 482 } 483 484 /* Only apply changes to the controls if the device is powered up */ 485 if (!pm_runtime_get_if_in_use(sensor->sd.dev)) 486 return 0; 487 488 switch (ctrl->id) { 489 case V4L2_CID_TEST_PATTERN: 490 ret = t4ka3_test_pattern(sensor, ctrl->val); 491 break; 492 case V4L2_CID_VFLIP: 493 ret = t4ka3_update_flip(&sensor->sd, fmt, 494 ctrl->val, T4KA3_VFLIP_BIT); 495 break; 496 case V4L2_CID_HFLIP: 497 ret = t4ka3_update_flip(&sensor->sd, fmt, 498 ctrl->val, T4KA3_HFLIP_BIT); 499 break; 500 case V4L2_CID_VBLANK: 501 ret = cci_write(sensor->regmap, T4KA3_REG_FRAME_LENGTH_LINES, 502 fmt->height + ctrl->val, NULL); 503 break; 504 case V4L2_CID_EXPOSURE: 505 ret = cci_write(sensor->regmap, 506 T4KA3_REG_COARSE_INTEGRATION_TIME, 507 ctrl->val, NULL); 508 break; 509 case V4L2_CID_ANALOGUE_GAIN: 510 ret = cci_write(sensor->regmap, T4KA3_REG_GLOBAL_GAIN, 511 ctrl->val, NULL); 512 break; 513 default: 514 ret = -EINVAL; 515 break; 516 } 517 518 pm_runtime_put(sensor->sd.dev); 519 520 return ret; 521 } 522 523 static int t4ka3_set_mode(struct t4ka3_data *sensor, 524 struct v4l2_subdev_state *state) 525 { 526 struct v4l2_mbus_framefmt *fmt = v4l2_subdev_state_get_format(state, 0); 527 int ret = 0; 528 529 cci_write(sensor->regmap, T4KA3_REG_HORZ_OUTPUT_SIZE, fmt->width, &ret); 530 /* Write mode-height - 2 otherwise things don't work, hw-bug ? */ 531 cci_write(sensor->regmap, T4KA3_REG_VERT_OUTPUT_SIZE, 532 fmt->height - 2, &ret); 533 534 cci_write(sensor->regmap, T4KA3_REG_PIXELS_PER_LINE, 535 T4KA3_PIXELS_PER_LINE, &ret); 536 /* Always use the full sensor, using window to crop */ 537 cci_write(sensor->regmap, T4KA3_REG_HORZ_START, 0, &ret); 538 cci_write(sensor->regmap, T4KA3_REG_VERT_START, 0, &ret); 539 cci_write(sensor->regmap, T4KA3_REG_HORZ_END, 540 T4KA3_NATIVE_WIDTH - 1, &ret); 541 cci_write(sensor->regmap, T4KA3_REG_VERT_END, 542 T4KA3_NATIVE_HEIGHT - 1, &ret); 543 /* Set window */ 544 cci_write(sensor->regmap, T4KA3_REG_WIN_START_X, 545 sensor->mode.win_x, &ret); 546 cci_write(sensor->regmap, T4KA3_REG_WIN_START_Y, 547 sensor->mode.win_y, &ret); 548 cci_write(sensor->regmap, T4KA3_REG_WIN_WIDTH, fmt->width, &ret); 549 cci_write(sensor->regmap, T4KA3_REG_WIN_HEIGHT, fmt->height, &ret); 550 /* Write 1 to unknown register 0x0900 */ 551 cci_write(sensor->regmap, T4KA3_REG_0900, 1, &ret); 552 cci_write(sensor->regmap, T4KA3_REG_BINNING, 553 T4KA3_BINNING_VAL(sensor->mode.binning), &ret); 554 555 return ret; 556 } 557 558 static int t4ka3_enable_stream(struct v4l2_subdev *sd, 559 struct v4l2_subdev_state *state, 560 u32 pad, u64 streams_mask) 561 { 562 struct t4ka3_data *sensor = to_t4ka3_sensor(sd); 563 int ret; 564 565 ret = pm_runtime_get_sync(sensor->sd.dev); 566 if (ret < 0) { 567 dev_err(sensor->dev, "power-up err.\n"); 568 goto error_powerdown; 569 } 570 571 cci_multi_reg_write(sensor->regmap, t4ka3_init_config, 572 ARRAY_SIZE(t4ka3_init_config), &ret); 573 /* enable group hold */ 574 cci_write(sensor->regmap, T4KA3_REG_PARAM_HOLD, 1, &ret); 575 cci_multi_reg_write(sensor->regmap, t4ka3_pre_mode_set_regs, 576 ARRAY_SIZE(t4ka3_pre_mode_set_regs), &ret); 577 if (ret) 578 goto error_powerdown; 579 580 ret = t4ka3_set_mode(sensor, state); 581 if (ret) 582 goto error_powerdown; 583 584 ret = cci_multi_reg_write(sensor->regmap, t4ka3_post_mode_set_regs, 585 ARRAY_SIZE(t4ka3_post_mode_set_regs), NULL); 586 if (ret) 587 goto error_powerdown; 588 589 /* Restore value of all ctrls */ 590 ret = __v4l2_ctrl_handler_setup(&sensor->ctrls.handler); 591 if (ret) 592 goto error_powerdown; 593 594 /* disable group hold */ 595 cci_write(sensor->regmap, T4KA3_REG_PARAM_HOLD, 0, &ret); 596 cci_write(sensor->regmap, T4KA3_REG_STREAM, 1, &ret); 597 if (ret) 598 goto error_powerdown; 599 600 sensor->streaming = 1; 601 602 return ret; 603 604 error_powerdown: 605 pm_runtime_put(sensor->sd.dev); 606 607 return ret; 608 } 609 610 static int t4ka3_disable_stream(struct v4l2_subdev *sd, 611 struct v4l2_subdev_state *state, 612 u32 pad, u64 streams_mask) 613 { 614 struct t4ka3_data *sensor = to_t4ka3_sensor(sd); 615 int ret; 616 617 ret = cci_write(sensor->regmap, T4KA3_REG_STREAM, 0, NULL); 618 pm_runtime_put(sensor->sd.dev); 619 sensor->streaming = 0; 620 621 if (ret) 622 dev_err(sensor->dev, 623 "failed to disable stream with return value: %d\n", 624 ret); 625 626 return 0; 627 } 628 629 static int t4ka3_get_selection(struct v4l2_subdev *sd, 630 struct v4l2_subdev_state *state, 631 struct v4l2_subdev_selection *sel) 632 { 633 switch (sel->target) { 634 case V4L2_SEL_TGT_CROP: 635 sel->r = *v4l2_subdev_state_get_crop(state, sel->pad); 636 break; 637 case V4L2_SEL_TGT_NATIVE_SIZE: 638 case V4L2_SEL_TGT_CROP_BOUNDS: 639 sel->r.top = 0; 640 sel->r.left = 0; 641 sel->r.width = T4KA3_NATIVE_WIDTH; 642 sel->r.height = T4KA3_NATIVE_HEIGHT; 643 break; 644 case V4L2_SEL_TGT_CROP_DEFAULT: 645 sel->r = t4ka3_default_crop; 646 break; 647 default: 648 return -EINVAL; 649 } 650 651 return 0; 652 } 653 654 static int t4ka3_set_selection(struct v4l2_subdev *sd, 655 struct v4l2_subdev_state *state, 656 struct v4l2_subdev_selection *sel) 657 { 658 struct t4ka3_data *sensor = to_t4ka3_sensor(sd); 659 struct v4l2_mbus_framefmt *format; 660 struct v4l2_rect *crop; 661 struct v4l2_rect rect; 662 663 if (sel->target != V4L2_SEL_TGT_CROP) 664 return -EINVAL; 665 666 /* 667 * Clamp the boundaries of the crop rectangle to the size of the sensor 668 * pixel array. Align to multiples of 2 to ensure Bayer pattern isn't 669 * disrupted. 670 */ 671 rect.left = clamp_val(ALIGN(sel->r.left, 2), 672 T4KA3_NATIVE_START_LEFT, T4KA3_NATIVE_WIDTH); 673 rect.top = clamp_val(ALIGN(sel->r.top, 2), 674 T4KA3_NATIVE_START_TOP, T4KA3_NATIVE_HEIGHT); 675 rect.width = clamp_val(ALIGN(sel->r.width, 2), T4KA3_MIN_CROP_WIDTH, 676 T4KA3_NATIVE_WIDTH - rect.left); 677 rect.height = clamp_val(ALIGN(sel->r.height, 2), T4KA3_MIN_CROP_HEIGHT, 678 T4KA3_NATIVE_HEIGHT - rect.top); 679 680 crop = v4l2_subdev_state_get_crop(state, sel->pad); 681 682 if (rect.width != crop->width || rect.height != crop->height) { 683 /* 684 * Reset the output image size if the crop rectangle size has 685 * been modified. 686 */ 687 format = v4l2_subdev_state_get_format(state, sel->pad); 688 format->width = rect.width; 689 format->height = rect.height; 690 if (sel->which == V4L2_SUBDEV_FORMAT_ACTIVE) 691 t4ka3_calc_mode(sensor, format, crop); 692 } 693 694 sel->r = *crop = rect; 695 696 return 0; 697 } 698 699 static int 700 t4ka3_enum_mbus_code(struct v4l2_subdev *sd, 701 struct v4l2_subdev_state *sd_state, 702 struct v4l2_subdev_mbus_code_enum *code) 703 { 704 if (code->index) 705 return -EINVAL; 706 707 code->code = MEDIA_BUS_FMT_SGRBG10_1X10; 708 709 return 0; 710 } 711 712 static int t4ka3_enum_frame_size(struct v4l2_subdev *sd, 713 struct v4l2_subdev_state *sd_state, 714 struct v4l2_subdev_frame_size_enum *fse) 715 { 716 struct v4l2_rect *crop; 717 718 if (fse->index >= T4KA3_FRAME_SIZES) 719 return -EINVAL; 720 721 crop = v4l2_subdev_state_get_crop(sd_state, fse->pad); 722 723 fse->min_width = crop->width / (fse->index + 1); 724 fse->min_height = crop->height / (fse->index + 1); 725 fse->max_width = fse->min_width; 726 fse->max_height = fse->min_height; 727 728 return 0; 729 } 730 731 static int t4ka3_check_hwcfg(struct t4ka3_data *sensor) 732 { 733 struct fwnode_handle *fwnode = dev_fwnode(sensor->dev); 734 struct v4l2_fwnode_endpoint bus_cfg = { 735 .bus_type = V4L2_MBUS_CSI2_DPHY, 736 }; 737 struct fwnode_handle *endpoint; 738 unsigned long link_freq_bitmap; 739 int ret; 740 741 endpoint = fwnode_graph_get_next_endpoint(fwnode, NULL); 742 743 ret = v4l2_fwnode_endpoint_alloc_parse(endpoint, &bus_cfg); 744 fwnode_handle_put(endpoint); 745 if (ret) 746 return ret; 747 748 ret = v4l2_link_freq_to_bitmap(sensor->dev, bus_cfg.link_frequencies, 749 bus_cfg.nr_of_link_frequencies, 750 link_freq_menu_items, 751 ARRAY_SIZE(link_freq_menu_items), 752 &link_freq_bitmap); 753 754 if (ret < 0) 755 goto out_free_bus_cfg; 756 757 sensor->link_freq_index = ffs(link_freq_bitmap) - 1; 758 759 /* 4 MIPI lanes */ 760 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 4) { 761 ret = dev_err_probe(sensor->dev, -EINVAL, 762 "number of CSI2 data lanes %u is not supported\n", 763 bus_cfg.bus.mipi_csi2.num_data_lanes); 764 goto out_free_bus_cfg; 765 } 766 767 sensor->mipi_lanes = bus_cfg.bus.mipi_csi2.num_data_lanes; 768 769 out_free_bus_cfg: 770 v4l2_fwnode_endpoint_free(&bus_cfg); 771 772 return ret; 773 } 774 775 static int t4ka3_init_state(struct v4l2_subdev *sd, 776 struct v4l2_subdev_state *sd_state) 777 { 778 struct t4ka3_data *sensor = to_t4ka3_sensor(sd); 779 780 *v4l2_subdev_state_get_crop(sd_state, 0) = t4ka3_default_crop; 781 782 t4ka3_fill_format(sensor, v4l2_subdev_state_get_format(sd_state, 0), 783 T4KA3_ACTIVE_WIDTH, T4KA3_ACTIVE_HEIGHT); 784 return 0; 785 } 786 787 static const struct v4l2_ctrl_ops t4ka3_ctrl_ops = { 788 .s_ctrl = t4ka3_s_ctrl, 789 }; 790 791 static const struct v4l2_subdev_video_ops t4ka3_video_ops = { 792 .s_stream = v4l2_subdev_s_stream_helper, 793 }; 794 795 static const struct v4l2_subdev_pad_ops t4ka3_pad_ops = { 796 .enum_mbus_code = t4ka3_enum_mbus_code, 797 .enum_frame_size = t4ka3_enum_frame_size, 798 .get_fmt = v4l2_subdev_get_fmt, 799 .set_fmt = t4ka3_set_pad_format, 800 .get_selection = t4ka3_get_selection, 801 .set_selection = t4ka3_set_selection, 802 .enable_streams = t4ka3_enable_stream, 803 .disable_streams = t4ka3_disable_stream, 804 }; 805 806 static const struct v4l2_subdev_ops t4ka3_ops = { 807 .video = &t4ka3_video_ops, 808 .pad = &t4ka3_pad_ops, 809 }; 810 811 static const struct v4l2_subdev_internal_ops t4ka3_internal_ops = { 812 .init_state = t4ka3_init_state, 813 }; 814 815 static int t4ka3_init_controls(struct t4ka3_data *sensor) 816 { 817 const struct v4l2_ctrl_ops *ops = &t4ka3_ctrl_ops; 818 struct t4ka3_ctrls *ctrls = &sensor->ctrls; 819 struct v4l2_subdev_state *state; 820 struct v4l2_mbus_framefmt *fmt; 821 struct v4l2_rect *crop; 822 struct v4l2_ctrl_handler *hdl = &ctrls->handler; 823 struct v4l2_fwnode_device_properties props; 824 int ret, min, max, def; 825 static const char * const test_pattern_menu[] = { 826 "Disabled", 827 "Solid White", 828 "Color Bars", 829 "Gradient", 830 "Random Data", 831 }; 832 833 v4l2_ctrl_handler_init(hdl, 11); 834 835 hdl->lock = &sensor->lock; 836 837 ctrls->vflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VFLIP, 0, 1, 1, 0); 838 ctrls->hflip = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HFLIP, 0, 1, 1, 0); 839 840 ctrls->test_pattern = 841 v4l2_ctrl_new_std_menu_items(hdl, ops, 842 V4L2_CID_TEST_PATTERN, 843 ARRAY_SIZE(test_pattern_menu) - 1, 844 0, 0, test_pattern_menu); 845 ctrls->link_freq = v4l2_ctrl_new_int_menu(hdl, NULL, 846 V4L2_CID_LINK_FREQ, 847 0, 0, link_freq_menu_items); 848 ctrls->pixel_rate = v4l2_ctrl_new_std(hdl, NULL, V4L2_CID_PIXEL_RATE, 849 0, T4KA3_PIXEL_RATE, 850 1, T4KA3_PIXEL_RATE); 851 852 state = v4l2_subdev_lock_and_get_active_state(&sensor->sd); 853 fmt = v4l2_subdev_state_get_format(state, 0); 854 crop = v4l2_subdev_state_get_crop(state, 0); 855 856 t4ka3_calc_mode(sensor, fmt, crop); 857 t4ka3_get_vblank_limits(sensor, state, &min, &max, &def); 858 859 v4l2_subdev_unlock_state(state); 860 861 ctrls->vblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_VBLANK, 862 min, max, 1, def); 863 864 def = T4KA3_PIXELS_PER_LINE - T4KA3_ACTIVE_WIDTH; 865 ctrls->hblank = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_HBLANK, 866 def, def, 1, def); 867 868 max = T4KA3_LINES_PER_FRAME_30FPS - 869 T4KA3_COARSE_INTEGRATION_TIME_MARGIN; 870 ctrls->exposure = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_EXPOSURE, 871 0, max, 1, max); 872 873 ctrls->gain = v4l2_ctrl_new_std(hdl, ops, V4L2_CID_ANALOGUE_GAIN, 874 T4KA3_MIN_GLOBAL_GAIN_SUPPORTED, 875 T4KA3_MAX_GLOBAL_GAIN_SUPPORTED, 876 1, T4KA3_MIN_GLOBAL_GAIN_SUPPORTED); 877 878 ret = v4l2_fwnode_device_parse(sensor->dev, &props); 879 if (ret) 880 return ret; 881 882 v4l2_ctrl_new_fwnode_properties(hdl, ops, &props); 883 884 if (hdl->error) 885 return hdl->error; 886 887 ctrls->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 888 ctrls->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT; 889 ctrls->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY; 890 ctrls->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY; 891 892 sensor->sd.ctrl_handler = hdl; 893 894 return 0; 895 } 896 897 static int t4ka3_pm_suspend(struct device *dev) 898 { 899 struct t4ka3_data *sensor = dev_get_drvdata(dev); 900 901 gpiod_set_value_cansleep(sensor->powerdown_gpio, 1); 902 gpiod_set_value_cansleep(sensor->reset_gpio, 1); 903 904 return 0; 905 } 906 907 static int t4ka3_pm_resume(struct device *dev) 908 { 909 struct t4ka3_data *sensor = dev_get_drvdata(dev); 910 u16 sensor_id; 911 int ret; 912 913 usleep_range(5000, 6000); 914 915 gpiod_set_value_cansleep(sensor->powerdown_gpio, 0); 916 gpiod_set_value_cansleep(sensor->reset_gpio, 0); 917 918 /* waiting for the sensor after powering up */ 919 fsleep(20000); 920 921 ret = t4ka3_detect(sensor, &sensor_id); 922 if (ret) { 923 dev_err(sensor->dev, "sensor detect failed\n"); 924 gpiod_set_value_cansleep(sensor->powerdown_gpio, 1); 925 gpiod_set_value_cansleep(sensor->reset_gpio, 1); 926 927 return ret; 928 } 929 930 return 0; 931 } 932 933 static DEFINE_RUNTIME_DEV_PM_OPS(t4ka3_pm_ops, t4ka3_pm_suspend, 934 t4ka3_pm_resume, NULL); 935 936 static void t4ka3_remove(struct i2c_client *client) 937 { 938 struct v4l2_subdev *sd = i2c_get_clientdata(client); 939 struct t4ka3_data *sensor = to_t4ka3_sensor(sd); 940 941 v4l2_async_unregister_subdev(&sensor->sd); 942 v4l2_ctrl_handler_free(&sensor->ctrls.handler); 943 v4l2_subdev_cleanup(sd); 944 media_entity_cleanup(&sensor->sd.entity); 945 946 /* 947 * Disable runtime PM. In case runtime PM is disabled in the kernel, 948 * make sure to turn power off manually. 949 */ 950 pm_runtime_disable(&client->dev); 951 if (!pm_runtime_status_suspended(&client->dev)) 952 t4ka3_pm_suspend(&client->dev); 953 pm_runtime_set_suspended(&client->dev); 954 } 955 956 static int t4ka3_probe(struct i2c_client *client) 957 { 958 struct t4ka3_data *sensor; 959 int ret; 960 961 /* allocate sensor device & init sub device */ 962 sensor = devm_kzalloc(&client->dev, sizeof(*sensor), GFP_KERNEL); 963 if (!sensor) 964 return -ENOMEM; 965 966 sensor->dev = &client->dev; 967 968 ret = t4ka3_check_hwcfg(sensor); 969 if (ret) 970 return ret; 971 972 mutex_init(&sensor->lock); 973 974 v4l2_i2c_subdev_init(&sensor->sd, client, &t4ka3_ops); 975 sensor->sd.internal_ops = &t4ka3_internal_ops; 976 977 sensor->powerdown_gpio = devm_gpiod_get(&client->dev, "powerdown", 978 GPIOD_OUT_HIGH); 979 if (IS_ERR(sensor->powerdown_gpio)) 980 return dev_err_probe(&client->dev, 981 PTR_ERR(sensor->powerdown_gpio), 982 "getting powerdown GPIO\n"); 983 984 sensor->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset", 985 GPIOD_OUT_HIGH); 986 if (IS_ERR(sensor->reset_gpio)) 987 return dev_err_probe(&client->dev, PTR_ERR(sensor->reset_gpio), 988 "getting reset GPIO\n"); 989 990 sensor->regmap = devm_cci_regmap_init_i2c(client, 16); 991 if (IS_ERR(sensor->regmap)) 992 return PTR_ERR(sensor->regmap); 993 994 ret = t4ka3_pm_resume(sensor->dev); 995 if (ret) 996 return ret; 997 998 pm_runtime_set_active(&client->dev); 999 pm_runtime_enable(&client->dev); 1000 1001 sensor->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE; 1002 sensor->pad.flags = MEDIA_PAD_FL_SOURCE; 1003 sensor->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR; 1004 1005 ret = media_entity_pads_init(&sensor->sd.entity, 1, &sensor->pad); 1006 if (ret) 1007 goto err_pm_disable; 1008 1009 sensor->sd.state_lock = sensor->ctrls.handler.lock; 1010 ret = v4l2_subdev_init_finalize(&sensor->sd); 1011 if (ret < 0) { 1012 dev_err(&client->dev, "failed to init subdev: %d", ret); 1013 goto err_media_entity; 1014 } 1015 1016 ret = t4ka3_init_controls(sensor); 1017 if (ret) 1018 goto err_controls; 1019 1020 ret = v4l2_async_register_subdev_sensor(&sensor->sd); 1021 if (ret) 1022 goto err_controls; 1023 1024 pm_runtime_set_autosuspend_delay(&client->dev, 1000); 1025 pm_runtime_idle(&client->dev); 1026 1027 return 0; 1028 1029 err_controls: 1030 v4l2_ctrl_handler_free(&sensor->ctrls.handler); 1031 v4l2_subdev_cleanup(&sensor->sd); 1032 1033 err_media_entity: 1034 media_entity_cleanup(&sensor->sd.entity); 1035 1036 err_pm_disable: 1037 pm_runtime_disable(&client->dev); 1038 pm_runtime_put_noidle(&client->dev); 1039 t4ka3_pm_suspend(&client->dev); 1040 1041 return ret; 1042 } 1043 1044 static const struct acpi_device_id t4ka3_acpi_match[] = { 1045 { "XMCC0003" }, 1046 {} 1047 }; 1048 MODULE_DEVICE_TABLE(acpi, t4ka3_acpi_match); 1049 1050 static struct i2c_driver t4ka3_driver = { 1051 .driver = { 1052 .name = "t4ka3", 1053 .acpi_match_table = ACPI_PTR(t4ka3_acpi_match), 1054 .pm = pm_sleep_ptr(&t4ka3_pm_ops), 1055 }, 1056 .probe = t4ka3_probe, 1057 .remove = t4ka3_remove, 1058 }; 1059 module_i2c_driver(t4ka3_driver) 1060 1061 MODULE_DESCRIPTION("A low-level driver for T4KA3 sensor"); 1062 MODULE_AUTHOR("HARVEY LV <harvey.lv@intel.com>"); 1063 MODULE_AUTHOR("Kate Hsuan <hpa@redhat.com>"); 1064 MODULE_LICENSE("GPL"); 1065