xref: /linux/drivers/mailbox/Kconfig (revision fe2aa2361ddba8f4ccf05123e0e14e9fb70ea701)
1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only
230058677SRob Herringmenuconfig MAILBOX
330058677SRob Herring	bool "Mailbox Hardware Support"
430058677SRob Herring	help
530058677SRob Herring	  Mailbox is a framework to control hardware communication between
630058677SRob Herring	  on-chip processors through queued messages and interrupt driven
730058677SRob Herring	  signals. Say Y if your platform supports hardware mailboxes.
830058677SRob Herring
930058677SRob Herringif MAILBOX
10ee23d66aSJassi Brar
11ee23d66aSJassi Brarconfig ARM_MHU
12ee23d66aSJassi Brar	tristate "ARM MHU Mailbox"
13ee23d66aSJassi Brar	depends on ARM_AMBA
14ee23d66aSJassi Brar	help
15ee23d66aSJassi Brar	  Say Y here if you want to build the ARM MHU controller driver.
16ee23d66aSJassi Brar	  The controller has 3 mailbox channels, the last of which can be
17ee23d66aSJassi Brar	  used in Secure mode only.
18ee23d66aSJassi Brar
195a6338ccSViresh Kumarconfig ARM_MHU_V2
205a6338ccSViresh Kumar	tristate "ARM MHUv2 Mailbox"
215a6338ccSViresh Kumar	depends on ARM_AMBA
225a6338ccSViresh Kumar	help
235a6338ccSViresh Kumar	  Say Y here if you want to build the ARM MHUv2 controller driver,
245a6338ccSViresh Kumar	  which provides unidirectional mailboxes between processing elements.
255a6338ccSViresh Kumar
26ca1a8680SCristian Marussiconfig ARM_MHU_V3
27ca1a8680SCristian Marussi	tristate "ARM MHUv3 Mailbox"
280e4ed482SGeert Uytterhoeven	depends on ARM64 || COMPILE_TEST
29ca1a8680SCristian Marussi	depends on HAS_IOMEM || COMPILE_TEST
30ca1a8680SCristian Marussi	depends on OF
31ca1a8680SCristian Marussi	help
32ca1a8680SCristian Marussi	  Say Y here if you want to build the ARM MHUv3 controller driver,
33ca1a8680SCristian Marussi	  which provides unidirectional mailboxes between processing elements.
34ca1a8680SCristian Marussi
35ca1a8680SCristian Marussi	  ARM MHUv3 controllers can implement a varying number of extensions
36ca1a8680SCristian Marussi	  that provides different means of transports: supported extensions
37ca1a8680SCristian Marussi	  will be discovered and possibly managed at probe-time.
38ca1a8680SCristian Marussi
39fbf7e5ceSTudor Ambarusconfig EXYNOS_MBOX
40fbf7e5ceSTudor Ambarus	tristate "Exynos Mailbox"
41fbf7e5ceSTudor Ambarus	depends on ARCH_EXYNOS || COMPILE_TEST
42fbf7e5ceSTudor Ambarus	help
43fbf7e5ceSTudor Ambarus	  Say Y here if you want to build the Samsung Exynos Mailbox controller
44fbf7e5ceSTudor Ambarus	  driver. The controller has 16 flag bits for hardware interrupt
45fbf7e5ceSTudor Ambarus	  generation and a shared register for passing mailbox messages.
46fbf7e5ceSTudor Ambarus	  When the controller is used by the ACPM interface the shared register
47fbf7e5ceSTudor Ambarus	  is ignored and the mailbox controller acts as a doorbell that raises
48fbf7e5ceSTudor Ambarus	  the interrupt to the ACPM firmware.
49fbf7e5ceSTudor Ambarus
502bb70056SOleksij Rempelconfig IMX_MBOX
512bb70056SOleksij Rempel	tristate "i.MX Mailbox"
522bb70056SOleksij Rempel	depends on ARCH_MXC || COMPILE_TEST
532bb70056SOleksij Rempel	help
542bb70056SOleksij Rempel	  Mailbox implementation for i.MX Messaging Unit (MU).
552bb70056SOleksij Rempel
56ad3a212cSNeil Armstrongconfig PLATFORM_MHU
57ad3a212cSNeil Armstrong	tristate "Platform MHU Mailbox"
58ad3a212cSNeil Armstrong	depends on OF
59ad3a212cSNeil Armstrong	depends on HAS_IOMEM
60ad3a212cSNeil Armstrong	help
61ad3a212cSNeil Armstrong	  Say Y here if you want to build a platform specific variant MHU
62ad3a212cSNeil Armstrong	  controller driver.
63ad3a212cSNeil Armstrong	  The controller has a maximum of 3 mailbox channels, the last of
64ad3a212cSNeil Armstrong	  which can be used in Secure mode only.
65ad3a212cSNeil Armstrong
6630058677SRob Herringconfig PL320_MBOX
6730058677SRob Herring	bool "ARM PL320 Mailbox"
6830058677SRob Herring	depends on ARM_AMBA
6930058677SRob Herring	help
7030058677SRob Herring	  An implementation of the ARM PL320 Interprocessor Communication
7130058677SRob Herring	  Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to
7230058677SRob Herring	  send short messages between Highbank's A9 cores and the EnergyCore
7330058677SRob Herring	  Management Engine, primarily for cpufreq. Say Y here if you want
7430058677SRob Herring	  to use the PL320 IPCM support.
7530058677SRob Herring
768fbbfd96SMarek Behunconfig ARMADA_37XX_RWTM_MBOX
778fbbfd96SMarek Behun	tristate "Armada 37xx rWTM BIU Mailbox"
788fbbfd96SMarek Behun	depends on ARCH_MVEBU || COMPILE_TEST
798fbbfd96SMarek Behun	depends on OF
808fbbfd96SMarek Behun	help
818fbbfd96SMarek Behun	  Mailbox implementation for communication with the the firmware
828fbbfd96SMarek Behun	  running on the Cortex-M3 rWTM secure processor of the Armada 37xx
838fbbfd96SMarek Behun	  SOC. Say Y here if you are building for such a device (for example
848fbbfd96SMarek Behun	  the Turris Mox router).
858fbbfd96SMarek Behun
86c869c75cSSuman Annaconfig OMAP2PLUS_MBOX
87c869c75cSSuman Anna	tristate "OMAP2+ Mailbox framework support"
8854595f28SArnd Bergmann	depends on ARCH_OMAP2PLUS || ARCH_K3 || COMPILE_TEST
89c869c75cSSuman Anna	help
90c869c75cSSuman Anna	  Mailbox implementation for OMAP family chips with hardware for
91c869c75cSSuman Anna	  interprocessor communication involving DSP, IVA1.0 and IVA2 in
92c869c75cSSuman Anna	  OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you
93c869c75cSSuman Anna	  want to use OMAP2+ Mailbox framework support.
94c869c75cSSuman Anna
95f70ed3b5SCaesar Wangconfig ROCKCHIP_MBOX
969d2e8b93STom Saeger	bool "Rockchip Soc Integrated Mailbox Support"
97f70ed3b5SCaesar Wang	depends on ARCH_ROCKCHIP || COMPILE_TEST
98f70ed3b5SCaesar Wang	help
99f70ed3b5SCaesar Wang	  This driver provides support for inter-processor communication
100f70ed3b5SCaesar Wang	  between CPU cores and MCU processor on Some Rockchip SOCs.
101f70ed3b5SCaesar Wang	  Please check it that the Soc you use have Mailbox hardware.
102f70ed3b5SCaesar Wang	  Say Y here if you want to use the Rockchip Mailbox support.
103f70ed3b5SCaesar Wang
10486c22f8cSAshwin Chauguleconfig PCC
10586c22f8cSAshwin Chaugule	bool "Platform Communication Channel Driver"
10686c22f8cSAshwin Chaugule	depends on ACPI
107b6fc6072SAshwin Chaugule	default n
10886c22f8cSAshwin Chaugule	help
10986c22f8cSAshwin Chaugule	  ACPI 5.0+ spec defines a generic mode of communication
11086c22f8cSAshwin Chaugule	  between the OS and a platform such as the BMC. This medium
11186c22f8cSAshwin Chaugule	  (PCC) is typically used by CPPC (ACPI CPU Performance management),
11286c22f8cSAshwin Chaugule	  RAS (ACPI reliability protocol) and MPST (ACPI Memory power
11386c22f8cSAshwin Chaugule	  states). Select this driver if your platform implements the
11486c22f8cSAshwin Chaugule	  PCC clients mentioned above.
11586c22f8cSAshwin Chaugule
116f62092f6SLey Foon Tanconfig ALTERA_MBOX
117f62092f6SLey Foon Tan	tristate "Altera Mailbox"
11859dd3f02SRichard Weinberger	depends on HAS_IOMEM
119f62092f6SLey Foon Tan	help
120f62092f6SLey Foon Tan	  An implementation of the Altera Mailbox soft core. It is used
121f62092f6SLey Foon Tan	  to send message between processors. Say Y here if you want to use the
122f62092f6SLey Foon Tan	  Altera mailbox support.
1230bae6af6SLubomir Rintel
1240bae6af6SLubomir Rintelconfig BCM2835_MBOX
1250bae6af6SLubomir Rintel	tristate "BCM2835 Mailbox"
1260bae6af6SLubomir Rintel	depends on ARCH_BCM2835
1270bae6af6SLubomir Rintel	help
1280bae6af6SLubomir Rintel	  An implementation of the BCM2385 Mailbox.  It is used to invoke
1290bae6af6SLubomir Rintel	  the services of the Videocore. Say Y here if you want to use the
1300bae6af6SLubomir Rintel	  BCM2835 Mailbox.
1310bae6af6SLubomir Rintel
1329ef4546cSLee Jonesconfig STI_MBOX
1339ef4546cSLee Jones	tristate "STI Mailbox framework support"
1349ef4546cSLee Jones	depends on ARCH_STI && OF
1359ef4546cSLee Jones	help
1369ef4546cSLee Jones	  Mailbox implementation for STMicroelectonics family chips with
1379ef4546cSLee Jones	  hardware for interprocessor communication.
1389ef4546cSLee Jones
139aace66b1SNishanth Menonconfig TI_MESSAGE_MANAGER
140aace66b1SNishanth Menon	tristate "Texas Instruments Message Manager Driver"
141ff391d45SAndrew Davis	depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
14231c8d06eSNicolas Frayer	default ARCH_K3
143aace66b1SNishanth Menon	help
144aace66b1SNishanth Menon	  An implementation of Message Manager slave driver for Keystone
145cfc0f7a8SNishanth Menon	  and K3 architecture SoCs from Texas Instruments. Message Manager
146cfc0f7a8SNishanth Menon	  is a communication entity found on few of Texas Instrument's keystone
147cfc0f7a8SNishanth Menon	  and K3 architecture SoCs. These may be used for communication between
148aace66b1SNishanth Menon	  multiple processors within the SoC. Select this driver if your
149aace66b1SNishanth Menon	  platform has support for the hardware block.
150aace66b1SNishanth Menon
15141c0e939SKaihua Zhongconfig HI3660_MBOX
152f83d1cfcSDaniel Lezcano	tristate "Hi3660 Mailbox" if EXPERT
153f83d1cfcSDaniel Lezcano	depends on (ARCH_HISI || COMPILE_TEST)
154f83d1cfcSDaniel Lezcano	depends on OF
155f83d1cfcSDaniel Lezcano	default ARCH_HISI
15641c0e939SKaihua Zhong	help
15741c0e939SKaihua Zhong	  An implementation of the hi3660 mailbox. It is used to send message
15841c0e939SKaihua Zhong	  between application processors and other processors/MCU/DSP. Select
15941c0e939SKaihua Zhong	  Y here if you want to use Hi3660 mailbox controller.
16041c0e939SKaihua Zhong
1619c384189SLeo Yanconfig HI6220_MBOX
162f83d1cfcSDaniel Lezcano	tristate "Hi6220 Mailbox" if EXPERT
163f83d1cfcSDaniel Lezcano	depends on (ARCH_HISI || COMPILE_TEST)
164f83d1cfcSDaniel Lezcano	depends on OF
165f83d1cfcSDaniel Lezcano	default ARCH_HISI
1669c384189SLeo Yan	help
1679c384189SLeo Yan	  An implementation of the hi6220 mailbox. It is used to send message
1689c384189SLeo Yan	  between application processors and MCU. Say Y here if you want to
1699c384189SLeo Yan	  build Hi6220 mailbox controller driver.
1709c384189SLeo Yan
1718ea4484dSLee Jonesconfig MAILBOX_TEST
1728ea4484dSLee Jones	tristate "Mailbox Test Client"
1738ea4484dSLee Jones	depends on OF
17465d3b04aSRichard Weinberger	depends on HAS_IOMEM
1758ea4484dSLee Jones	help
1768ea4484dSLee Jones	  Test client to help with testing new Controller driver
1778ea4484dSLee Jones	  implementations.
1788ea4484dSLee Jones
17983d7b156SConor Dooleyconfig POLARFIRE_SOC_MAILBOX
18083d7b156SConor Dooley	tristate "PolarFire SoC (MPFS) Mailbox"
18183d7b156SConor Dooley	depends on HAS_IOMEM
182a4123ffaSConor Dooley	depends on MFD_SYSCON
1835f84a056SConor Dooley	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST
18483d7b156SConor Dooley	help
18583d7b156SConor Dooley	  This driver adds support for the PolarFire SoC (MPFS) mailbox controller.
18683d7b156SConor Dooley
18783d7b156SConor Dooley	  To compile this driver as a module, choose M here. the
18883d7b156SConor Dooley	  module will be called mailbox-mpfs.
18983d7b156SConor Dooley
19083d7b156SConor Dooley	  If unsure, say N.
19183d7b156SConor Dooley
192e4b1d67eSValentina Fernandezconfig MCHP_SBI_IPC_MBOX
193e4b1d67eSValentina Fernandez	tristate "Microchip Inter-processor Communication (IPC) SBI driver"
194e4b1d67eSValentina Fernandez	depends on RISCV_SBI || COMPILE_TEST
195e4b1d67eSValentina Fernandez	depends on ARCH_MICROCHIP
196e4b1d67eSValentina Fernandez	help
197e4b1d67eSValentina Fernandez	  Mailbox implementation for Microchip devices with an
198e4b1d67eSValentina Fernandez	  Inter-process communication (IPC) controller.
199e4b1d67eSValentina Fernandez
200e4b1d67eSValentina Fernandez	  To compile this driver as a module, choose M here. the
201e4b1d67eSValentina Fernandez	  module will be called mailbox-mchp-ipc-sbi.
202e4b1d67eSValentina Fernandez
203e4b1d67eSValentina Fernandez	  If unsure, say N.
204e4b1d67eSValentina Fernandez
20525bfee16SBjorn Anderssonconfig QCOM_APCS_IPC
20625bfee16SBjorn Andersson	tristate "Qualcomm APCS IPC driver"
20725bfee16SBjorn Andersson	depends on ARCH_QCOM || COMPILE_TEST
20825bfee16SBjorn Andersson	help
20925bfee16SBjorn Andersson	  Say y here to enable support for the APCS IPC mailbox driver,
21025bfee16SBjorn Andersson	  providing an interface for invoking the inter-process communication
21125bfee16SBjorn Andersson	  signals from the application processor to other masters.
21225bfee16SBjorn Andersson
2130fe88461SThierry Redingconfig TEGRA_HSP_MBOX
2140fe88461SThierry Reding	bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
21585bd2de4SArnd Bergmann	depends on ARCH_TEGRA
2160fe88461SThierry Reding	help
2170fe88461SThierry Reding	  The Tegra HSP driver is used for the interprocessor communication
2180fe88461SThierry Reding	  between different remote processors and host processors on Tegra186
2190fe88461SThierry Reding	  and later SoCs. Say Y here if you want to have this support.
2200fe88461SThierry Reding	  If unsure say N.
2210fe88461SThierry Reding
222f700e84fSDuc Dangconfig XGENE_SLIMPRO_MBOX
223f700e84fSDuc Dang	tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
224f700e84fSDuc Dang	depends on ARCH_XGENE
225f700e84fSDuc Dang	help
226f700e84fSDuc Dang	  An implementation of the APM X-Gene Interprocessor Communication
227f700e84fSDuc Dang	  Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
228f700e84fSDuc Dang	  It is used to send short messages between ARM64-bit cores and
229f700e84fSDuc Dang	  the SLIMpro Management Engine, primarily for PM. Say Y here if you
230f700e84fSDuc Dang	  want to use the APM X-Gene SLIMpro IPCM support.
231a24532f8SRob Rice
232a24532f8SRob Riceconfig BCM_PDC_MBOX
233fc2041c5SSteve Lin	tristate "Broadcom FlexSparx DMA Mailbox"
234fc2041c5SSteve Lin	depends on ARCH_BCM_IPROC || COMPILE_TEST
235a24532f8SRob Rice	help
236fc2041c5SSteve Lin	  Mailbox implementation for the Broadcom FlexSparx DMA ring manager,
237a24532f8SRob Rice	  which provides access to various offload engines on Broadcom
238fc2041c5SSteve Lin	  SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2.
239dbc049eeSAnup Patel
240dbc049eeSAnup Patelconfig BCM_FLEXRM_MBOX
241dbc049eeSAnup Patel	tristate "Broadcom FlexRM Mailbox"
24273874913SAnup Patel	depends on ARM64
2438f82121dSScott Branden	depends on ARCH_BCM_IPROC || COMPILE_TEST
24413e7accbSThomas Gleixner	select GENERIC_MSI_IRQ
24522d28b0fSAnup Patel	default m if ARCH_BCM_IPROC
246dbc049eeSAnup Patel	help
247dbc049eeSAnup Patel	  Mailbox implementation of the Broadcom FlexRM ring manager,
248dbc049eeSAnup Patel	  which provides access to various offload engines on Broadcom
249dbc049eeSAnup Patel	  SoCs. Say Y here if you want to use the Broadcom FlexRM.
250ffbded7dSFabien Dessenne
251ffbded7dSFabien Dessenneconfig STM32_IPCC
252ffbded7dSFabien Dessenne	tristate "STM32 IPCC Mailbox"
253d68f1729SMartin Kaiser	depends on MACH_STM32MP157 || COMPILE_TEST
254ffbded7dSFabien Dessenne	help
255ffbded7dSFabien Dessenne	  Mailbox implementation for STMicroelectonics STM32 family chips
256ffbded7dSFabien Dessenne	  with hardware for Inter-Processor Communication Controller (IPCC)
257ffbded7dSFabien Dessenne	  between processors. Say Y here if you want to have this support.
258623a6143SHoulong Wei
259af2dfa96SAllen-KH Chengconfig MTK_ADSP_MBOX
260af2dfa96SAllen-KH Cheng	tristate "MediaTek ADSP Mailbox Controller"
261af2dfa96SAllen-KH Cheng	depends on ARCH_MEDIATEK || COMPILE_TEST
262af2dfa96SAllen-KH Cheng	help
263af2dfa96SAllen-KH Cheng          Say yes here to add support for "MediaTek ADSP Mailbox Controller.
264af2dfa96SAllen-KH Cheng          This mailbox driver is used to send notification or short message
265af2dfa96SAllen-KH Cheng          between processors with ADSP. It will place the message to share
266af2dfa96SAllen-KH Cheng	  buffer and will access the ipc control.
267af2dfa96SAllen-KH Cheng
268623a6143SHoulong Weiconfig MTK_CMDQ_MBOX
269623a6143SHoulong Wei	tristate "MediaTek CMDQ Mailbox Support"
270623a6143SHoulong Wei	depends on ARCH_MEDIATEK || COMPILE_TEST
271623a6143SHoulong Wei	select MTK_INFRACFG
272623a6143SHoulong Wei	help
273623a6143SHoulong Wei	  Say yes here to add support for the MediaTek Command Queue (CMDQ)
274623a6143SHoulong Wei	  mailbox driver. The CMDQ is used to help read/write registers with
275623a6143SHoulong Wei	  critical time limitation, such as updating display configuration
276623a6143SHoulong Wei	  during the vblank.
2774981b82bSWendy Liang
2784981b82bSWendy Liangconfig ZYNQMP_IPI_MBOX
2794f2fe396SNick Alcock	tristate "Xilinx ZynqMP IPI Mailbox"
2804981b82bSWendy Liang	depends on ARCH_ZYNQMP && OF
2814981b82bSWendy Liang	help
2824981b82bSWendy Liang	  Say yes here to add support for Xilinx IPI mailbox driver.
2834981b82bSWendy Liang	  This mailbox driver is used to send notification or short message
2844981b82bSWendy Liang	  between processors with Xilinx ZynqMP IPI. It will place the
2854981b82bSWendy Liang	  message to the IPI buffer and will access the IPI control
2864981b82bSWendy Liang	  registers to kick the other processor or enquire status.
2874981b82bSWendy Liang
28825831c44SSamuel Hollandconfig SUN6I_MSGBOX
28925831c44SSamuel Holland	tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box"
29025831c44SSamuel Holland	depends on ARCH_SUNXI || COMPILE_TEST
29125831c44SSamuel Holland	default ARCH_SUNXI
29225831c44SSamuel Holland	help
29325831c44SSamuel Holland	  Mailbox implementation for the hardware message box present in
29425831c44SSamuel Holland	  various Allwinner SoCs. This mailbox is used for communication
29525831c44SSamuel Holland	  between the application CPUs and the power management coprocessor.
29625831c44SSamuel Holland
297ca27fc26SBaolin Wangconfig SPRD_MBOX
298ca27fc26SBaolin Wang	tristate "Spreadtrum Mailbox"
299ca27fc26SBaolin Wang	depends on ARCH_SPRD || COMPILE_TEST
300ca27fc26SBaolin Wang	help
301ca27fc26SBaolin Wang	  Mailbox driver implementation for the Spreadtrum platform. It is used
302ca27fc26SBaolin Wang	  to send message between application processors and MCU. Say Y here if
303ca27fc26SBaolin Wang	  you want to build the Spreatrum mailbox controller driver.
304ca27fc26SBaolin Wang
3050e2a9a03SSibi Sankarconfig QCOM_CPUCP_MBOX
3060e2a9a03SSibi Sankar	tristate "Qualcomm Technologies, Inc. CPUCP mailbox driver"
307cbf50095SArnd Bergmann	depends on (ARCH_QCOM || COMPILE_TEST) && 64BIT
3080e2a9a03SSibi Sankar	help
3090e2a9a03SSibi Sankar	  Qualcomm Technologies, Inc. CPUSS Control Processor (CPUCP) mailbox
3100e2a9a03SSibi Sankar	  controller driver enables communication between AP and CPUCP. Say
3110e2a9a03SSibi Sankar	  Y here if you want to build this driver.
3120e2a9a03SSibi Sankar
313fa74a025SManivannan Sadhasivamconfig QCOM_IPCC
3148d7e5908SAmit Pundir	tristate "Qualcomm Technologies, Inc. IPCC driver"
315fa74a025SManivannan Sadhasivam	depends on ARCH_QCOM || COMPILE_TEST
316fa74a025SManivannan Sadhasivam	help
317fa74a025SManivannan Sadhasivam	  Qualcomm Technologies, Inc. Inter-Processor Communication Controller
318fa74a025SManivannan Sadhasivam	  (IPCC) driver for MSM devices. The driver provides mailbox support for
319fa74a025SManivannan Sadhasivam	  sending interrupts to the clients. On the other hand, the driver also
320fa74a025SManivannan Sadhasivam	  acts as an interrupt controller for receiving interrupts from clients.
321fa74a025SManivannan Sadhasivam	  Say Y here if you want to build this driver.
322fa74a025SManivannan Sadhasivam
3235d4d263eSMichal Wilczynskiconfig THEAD_TH1520_MBOX
3245d4d263eSMichal Wilczynski	tristate "T-head TH1520 Mailbox"
3255d4d263eSMichal Wilczynski	depends on ARCH_THEAD || COMPILE_TEST
3265d4d263eSMichal Wilczynski	help
3275d4d263eSMichal Wilczynski	  Mailbox driver implementation for the Thead TH-1520 platform. Enables
3285d4d263eSMichal Wilczynski	  two cores within the SoC to communicate and coordinate by passing
3295d4d263eSMichal Wilczynski	  messages. Could be used to communicate between E910 core, on which the
3305d4d263eSMichal Wilczynski	  kernel is running, and E902 core used for power management among other
3315d4d263eSMichal Wilczynski	  things.
3325d4d263eSMichal Wilczynski
333*fe2aa236SGuomin Chenconfig CIX_MBOX
334*fe2aa236SGuomin Chen        tristate "CIX Mailbox"
335*fe2aa236SGuomin Chen        depends on ARCH_CIX || COMPILE_TEST
336*fe2aa236SGuomin Chen        depends on OF
337*fe2aa236SGuomin Chen        help
338*fe2aa236SGuomin Chen          Mailbox implementation for CIX IPC system. The controller supports
339*fe2aa236SGuomin Chen          11 mailbox channels with different operating mode and every channel
340*fe2aa236SGuomin Chen          is unidirectional. Say Y here if you want to use the CIX Mailbox
341*fe2aa236SGuomin Chen          support.
342*fe2aa236SGuomin Chen
34330058677SRob Herringendif
344