1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 230058677SRob Herringmenuconfig MAILBOX 330058677SRob Herring bool "Mailbox Hardware Support" 430058677SRob Herring help 530058677SRob Herring Mailbox is a framework to control hardware communication between 630058677SRob Herring on-chip processors through queued messages and interrupt driven 730058677SRob Herring signals. Say Y if your platform supports hardware mailboxes. 830058677SRob Herring 930058677SRob Herringif MAILBOX 10ee23d66aSJassi Brar 11ee23d66aSJassi Brarconfig ARM_MHU 12ee23d66aSJassi Brar tristate "ARM MHU Mailbox" 13ee23d66aSJassi Brar depends on ARM_AMBA 14ee23d66aSJassi Brar help 15ee23d66aSJassi Brar Say Y here if you want to build the ARM MHU controller driver. 16ee23d66aSJassi Brar The controller has 3 mailbox channels, the last of which can be 17ee23d66aSJassi Brar used in Secure mode only. 18ee23d66aSJassi Brar 195a6338ccSViresh Kumarconfig ARM_MHU_V2 205a6338ccSViresh Kumar tristate "ARM MHUv2 Mailbox" 215a6338ccSViresh Kumar depends on ARM_AMBA 225a6338ccSViresh Kumar help 235a6338ccSViresh Kumar Say Y here if you want to build the ARM MHUv2 controller driver, 245a6338ccSViresh Kumar which provides unidirectional mailboxes between processing elements. 255a6338ccSViresh Kumar 26ca1a8680SCristian Marussiconfig ARM_MHU_V3 27ca1a8680SCristian Marussi tristate "ARM MHUv3 Mailbox" 28*0e4ed482SGeert Uytterhoeven depends on ARM64 || COMPILE_TEST 29ca1a8680SCristian Marussi depends on HAS_IOMEM || COMPILE_TEST 30ca1a8680SCristian Marussi depends on OF 31ca1a8680SCristian Marussi help 32ca1a8680SCristian Marussi Say Y here if you want to build the ARM MHUv3 controller driver, 33ca1a8680SCristian Marussi which provides unidirectional mailboxes between processing elements. 34ca1a8680SCristian Marussi 35ca1a8680SCristian Marussi ARM MHUv3 controllers can implement a varying number of extensions 36ca1a8680SCristian Marussi that provides different means of transports: supported extensions 37ca1a8680SCristian Marussi will be discovered and possibly managed at probe-time. 38ca1a8680SCristian Marussi 392bb70056SOleksij Rempelconfig IMX_MBOX 402bb70056SOleksij Rempel tristate "i.MX Mailbox" 412bb70056SOleksij Rempel depends on ARCH_MXC || COMPILE_TEST 422bb70056SOleksij Rempel help 432bb70056SOleksij Rempel Mailbox implementation for i.MX Messaging Unit (MU). 442bb70056SOleksij Rempel 45ad3a212cSNeil Armstrongconfig PLATFORM_MHU 46ad3a212cSNeil Armstrong tristate "Platform MHU Mailbox" 47ad3a212cSNeil Armstrong depends on OF 48ad3a212cSNeil Armstrong depends on HAS_IOMEM 49ad3a212cSNeil Armstrong help 50ad3a212cSNeil Armstrong Say Y here if you want to build a platform specific variant MHU 51ad3a212cSNeil Armstrong controller driver. 52ad3a212cSNeil Armstrong The controller has a maximum of 3 mailbox channels, the last of 53ad3a212cSNeil Armstrong which can be used in Secure mode only. 54ad3a212cSNeil Armstrong 5530058677SRob Herringconfig PL320_MBOX 5630058677SRob Herring bool "ARM PL320 Mailbox" 5730058677SRob Herring depends on ARM_AMBA 5830058677SRob Herring help 5930058677SRob Herring An implementation of the ARM PL320 Interprocessor Communication 6030058677SRob Herring Mailbox (IPCM), tailored for the Calxeda Highbank. It is used to 6130058677SRob Herring send short messages between Highbank's A9 cores and the EnergyCore 6230058677SRob Herring Management Engine, primarily for cpufreq. Say Y here if you want 6330058677SRob Herring to use the PL320 IPCM support. 6430058677SRob Herring 658fbbfd96SMarek Behunconfig ARMADA_37XX_RWTM_MBOX 668fbbfd96SMarek Behun tristate "Armada 37xx rWTM BIU Mailbox" 678fbbfd96SMarek Behun depends on ARCH_MVEBU || COMPILE_TEST 688fbbfd96SMarek Behun depends on OF 698fbbfd96SMarek Behun help 708fbbfd96SMarek Behun Mailbox implementation for communication with the the firmware 718fbbfd96SMarek Behun running on the Cortex-M3 rWTM secure processor of the Armada 37xx 728fbbfd96SMarek Behun SOC. Say Y here if you are building for such a device (for example 738fbbfd96SMarek Behun the Turris Mox router). 748fbbfd96SMarek Behun 75c869c75cSSuman Annaconfig OMAP2PLUS_MBOX 76c869c75cSSuman Anna tristate "OMAP2+ Mailbox framework support" 779c1f2a5dSSuman Anna depends on ARCH_OMAP2PLUS || ARCH_K3 78c869c75cSSuman Anna help 79c869c75cSSuman Anna Mailbox implementation for OMAP family chips with hardware for 80c869c75cSSuman Anna interprocessor communication involving DSP, IVA1.0 and IVA2 in 81c869c75cSSuman Anna OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you 82c869c75cSSuman Anna want to use OMAP2+ Mailbox framework support. 83c869c75cSSuman Anna 84f70ed3b5SCaesar Wangconfig ROCKCHIP_MBOX 859d2e8b93STom Saeger bool "Rockchip Soc Integrated Mailbox Support" 86f70ed3b5SCaesar Wang depends on ARCH_ROCKCHIP || COMPILE_TEST 87f70ed3b5SCaesar Wang help 88f70ed3b5SCaesar Wang This driver provides support for inter-processor communication 89f70ed3b5SCaesar Wang between CPU cores and MCU processor on Some Rockchip SOCs. 90f70ed3b5SCaesar Wang Please check it that the Soc you use have Mailbox hardware. 91f70ed3b5SCaesar Wang Say Y here if you want to use the Rockchip Mailbox support. 92f70ed3b5SCaesar Wang 9386c22f8cSAshwin Chauguleconfig PCC 9486c22f8cSAshwin Chaugule bool "Platform Communication Channel Driver" 9586c22f8cSAshwin Chaugule depends on ACPI 96b6fc6072SAshwin Chaugule default n 9786c22f8cSAshwin Chaugule help 9886c22f8cSAshwin Chaugule ACPI 5.0+ spec defines a generic mode of communication 9986c22f8cSAshwin Chaugule between the OS and a platform such as the BMC. This medium 10086c22f8cSAshwin Chaugule (PCC) is typically used by CPPC (ACPI CPU Performance management), 10186c22f8cSAshwin Chaugule RAS (ACPI reliability protocol) and MPST (ACPI Memory power 10286c22f8cSAshwin Chaugule states). Select this driver if your platform implements the 10386c22f8cSAshwin Chaugule PCC clients mentioned above. 10486c22f8cSAshwin Chaugule 105f62092f6SLey Foon Tanconfig ALTERA_MBOX 106f62092f6SLey Foon Tan tristate "Altera Mailbox" 10759dd3f02SRichard Weinberger depends on HAS_IOMEM 108f62092f6SLey Foon Tan help 109f62092f6SLey Foon Tan An implementation of the Altera Mailbox soft core. It is used 110f62092f6SLey Foon Tan to send message between processors. Say Y here if you want to use the 111f62092f6SLey Foon Tan Altera mailbox support. 1120bae6af6SLubomir Rintel 1130bae6af6SLubomir Rintelconfig BCM2835_MBOX 1140bae6af6SLubomir Rintel tristate "BCM2835 Mailbox" 1150bae6af6SLubomir Rintel depends on ARCH_BCM2835 1160bae6af6SLubomir Rintel help 1170bae6af6SLubomir Rintel An implementation of the BCM2385 Mailbox. It is used to invoke 1180bae6af6SLubomir Rintel the services of the Videocore. Say Y here if you want to use the 1190bae6af6SLubomir Rintel BCM2835 Mailbox. 1200bae6af6SLubomir Rintel 1219ef4546cSLee Jonesconfig STI_MBOX 1229ef4546cSLee Jones tristate "STI Mailbox framework support" 1239ef4546cSLee Jones depends on ARCH_STI && OF 1249ef4546cSLee Jones help 1259ef4546cSLee Jones Mailbox implementation for STMicroelectonics family chips with 1269ef4546cSLee Jones hardware for interprocessor communication. 1279ef4546cSLee Jones 128aace66b1SNishanth Menonconfig TI_MESSAGE_MANAGER 129aace66b1SNishanth Menon tristate "Texas Instruments Message Manager Driver" 130cfc0f7a8SNishanth Menon depends on ARCH_KEYSTONE || ARCH_K3 13131c8d06eSNicolas Frayer default ARCH_K3 132aace66b1SNishanth Menon help 133aace66b1SNishanth Menon An implementation of Message Manager slave driver for Keystone 134cfc0f7a8SNishanth Menon and K3 architecture SoCs from Texas Instruments. Message Manager 135cfc0f7a8SNishanth Menon is a communication entity found on few of Texas Instrument's keystone 136cfc0f7a8SNishanth Menon and K3 architecture SoCs. These may be used for communication between 137aace66b1SNishanth Menon multiple processors within the SoC. Select this driver if your 138aace66b1SNishanth Menon platform has support for the hardware block. 139aace66b1SNishanth Menon 14041c0e939SKaihua Zhongconfig HI3660_MBOX 141f83d1cfcSDaniel Lezcano tristate "Hi3660 Mailbox" if EXPERT 142f83d1cfcSDaniel Lezcano depends on (ARCH_HISI || COMPILE_TEST) 143f83d1cfcSDaniel Lezcano depends on OF 144f83d1cfcSDaniel Lezcano default ARCH_HISI 14541c0e939SKaihua Zhong help 14641c0e939SKaihua Zhong An implementation of the hi3660 mailbox. It is used to send message 14741c0e939SKaihua Zhong between application processors and other processors/MCU/DSP. Select 14841c0e939SKaihua Zhong Y here if you want to use Hi3660 mailbox controller. 14941c0e939SKaihua Zhong 1509c384189SLeo Yanconfig HI6220_MBOX 151f83d1cfcSDaniel Lezcano tristate "Hi6220 Mailbox" if EXPERT 152f83d1cfcSDaniel Lezcano depends on (ARCH_HISI || COMPILE_TEST) 153f83d1cfcSDaniel Lezcano depends on OF 154f83d1cfcSDaniel Lezcano default ARCH_HISI 1559c384189SLeo Yan help 1569c384189SLeo Yan An implementation of the hi6220 mailbox. It is used to send message 1579c384189SLeo Yan between application processors and MCU. Say Y here if you want to 1589c384189SLeo Yan build Hi6220 mailbox controller driver. 1599c384189SLeo Yan 1608ea4484dSLee Jonesconfig MAILBOX_TEST 1618ea4484dSLee Jones tristate "Mailbox Test Client" 1628ea4484dSLee Jones depends on OF 16365d3b04aSRichard Weinberger depends on HAS_IOMEM 1648ea4484dSLee Jones help 1658ea4484dSLee Jones Test client to help with testing new Controller driver 1668ea4484dSLee Jones implementations. 1678ea4484dSLee Jones 16883d7b156SConor Dooleyconfig POLARFIRE_SOC_MAILBOX 16983d7b156SConor Dooley tristate "PolarFire SoC (MPFS) Mailbox" 17083d7b156SConor Dooley depends on HAS_IOMEM 1715f84a056SConor Dooley depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST 17283d7b156SConor Dooley help 17383d7b156SConor Dooley This driver adds support for the PolarFire SoC (MPFS) mailbox controller. 17483d7b156SConor Dooley 17583d7b156SConor Dooley To compile this driver as a module, choose M here. the 17683d7b156SConor Dooley module will be called mailbox-mpfs. 17783d7b156SConor Dooley 17883d7b156SConor Dooley If unsure, say N. 17983d7b156SConor Dooley 18025bfee16SBjorn Anderssonconfig QCOM_APCS_IPC 18125bfee16SBjorn Andersson tristate "Qualcomm APCS IPC driver" 18225bfee16SBjorn Andersson depends on ARCH_QCOM || COMPILE_TEST 18325bfee16SBjorn Andersson help 18425bfee16SBjorn Andersson Say y here to enable support for the APCS IPC mailbox driver, 18525bfee16SBjorn Andersson providing an interface for invoking the inter-process communication 18625bfee16SBjorn Andersson signals from the application processor to other masters. 18725bfee16SBjorn Andersson 1880fe88461SThierry Redingconfig TEGRA_HSP_MBOX 1890fe88461SThierry Reding bool "Tegra HSP (Hardware Synchronization Primitives) Driver" 19085bd2de4SArnd Bergmann depends on ARCH_TEGRA 1910fe88461SThierry Reding help 1920fe88461SThierry Reding The Tegra HSP driver is used for the interprocessor communication 1930fe88461SThierry Reding between different remote processors and host processors on Tegra186 1940fe88461SThierry Reding and later SoCs. Say Y here if you want to have this support. 1950fe88461SThierry Reding If unsure say N. 1960fe88461SThierry Reding 197f700e84fSDuc Dangconfig XGENE_SLIMPRO_MBOX 198f700e84fSDuc Dang tristate "APM SoC X-Gene SLIMpro Mailbox Controller" 199f700e84fSDuc Dang depends on ARCH_XGENE 200f700e84fSDuc Dang help 201f700e84fSDuc Dang An implementation of the APM X-Gene Interprocessor Communication 202f700e84fSDuc Dang Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller. 203f700e84fSDuc Dang It is used to send short messages between ARM64-bit cores and 204f700e84fSDuc Dang the SLIMpro Management Engine, primarily for PM. Say Y here if you 205f700e84fSDuc Dang want to use the APM X-Gene SLIMpro IPCM support. 206a24532f8SRob Rice 207a24532f8SRob Riceconfig BCM_PDC_MBOX 208fc2041c5SSteve Lin tristate "Broadcom FlexSparx DMA Mailbox" 209fc2041c5SSteve Lin depends on ARCH_BCM_IPROC || COMPILE_TEST 210a24532f8SRob Rice help 211fc2041c5SSteve Lin Mailbox implementation for the Broadcom FlexSparx DMA ring manager, 212a24532f8SRob Rice which provides access to various offload engines on Broadcom 213fc2041c5SSteve Lin SoCs, including FA2/FA+ on Northstar Plus and PDC on Northstar 2. 214dbc049eeSAnup Patel 215dbc049eeSAnup Patelconfig BCM_FLEXRM_MBOX 216dbc049eeSAnup Patel tristate "Broadcom FlexRM Mailbox" 21773874913SAnup Patel depends on ARM64 2188f82121dSScott Branden depends on ARCH_BCM_IPROC || COMPILE_TEST 21913e7accbSThomas Gleixner select GENERIC_MSI_IRQ 22022d28b0fSAnup Patel default m if ARCH_BCM_IPROC 221dbc049eeSAnup Patel help 222dbc049eeSAnup Patel Mailbox implementation of the Broadcom FlexRM ring manager, 223dbc049eeSAnup Patel which provides access to various offload engines on Broadcom 224dbc049eeSAnup Patel SoCs. Say Y here if you want to use the Broadcom FlexRM. 225ffbded7dSFabien Dessenne 226ffbded7dSFabien Dessenneconfig STM32_IPCC 227ffbded7dSFabien Dessenne tristate "STM32 IPCC Mailbox" 228d68f1729SMartin Kaiser depends on MACH_STM32MP157 || COMPILE_TEST 229ffbded7dSFabien Dessenne help 230ffbded7dSFabien Dessenne Mailbox implementation for STMicroelectonics STM32 family chips 231ffbded7dSFabien Dessenne with hardware for Inter-Processor Communication Controller (IPCC) 232ffbded7dSFabien Dessenne between processors. Say Y here if you want to have this support. 233623a6143SHoulong Wei 234af2dfa96SAllen-KH Chengconfig MTK_ADSP_MBOX 235af2dfa96SAllen-KH Cheng tristate "MediaTek ADSP Mailbox Controller" 236af2dfa96SAllen-KH Cheng depends on ARCH_MEDIATEK || COMPILE_TEST 237af2dfa96SAllen-KH Cheng help 238af2dfa96SAllen-KH Cheng Say yes here to add support for "MediaTek ADSP Mailbox Controller. 239af2dfa96SAllen-KH Cheng This mailbox driver is used to send notification or short message 240af2dfa96SAllen-KH Cheng between processors with ADSP. It will place the message to share 241af2dfa96SAllen-KH Cheng buffer and will access the ipc control. 242af2dfa96SAllen-KH Cheng 243623a6143SHoulong Weiconfig MTK_CMDQ_MBOX 244623a6143SHoulong Wei tristate "MediaTek CMDQ Mailbox Support" 245623a6143SHoulong Wei depends on ARCH_MEDIATEK || COMPILE_TEST 246623a6143SHoulong Wei select MTK_INFRACFG 247623a6143SHoulong Wei help 248623a6143SHoulong Wei Say yes here to add support for the MediaTek Command Queue (CMDQ) 249623a6143SHoulong Wei mailbox driver. The CMDQ is used to help read/write registers with 250623a6143SHoulong Wei critical time limitation, such as updating display configuration 251623a6143SHoulong Wei during the vblank. 2524981b82bSWendy Liang 2534981b82bSWendy Liangconfig ZYNQMP_IPI_MBOX 2544f2fe396SNick Alcock tristate "Xilinx ZynqMP IPI Mailbox" 2554981b82bSWendy Liang depends on ARCH_ZYNQMP && OF 2564981b82bSWendy Liang help 2574981b82bSWendy Liang Say yes here to add support for Xilinx IPI mailbox driver. 2584981b82bSWendy Liang This mailbox driver is used to send notification or short message 2594981b82bSWendy Liang between processors with Xilinx ZynqMP IPI. It will place the 2604981b82bSWendy Liang message to the IPI buffer and will access the IPI control 2614981b82bSWendy Liang registers to kick the other processor or enquire status. 2624981b82bSWendy Liang 26325831c44SSamuel Hollandconfig SUN6I_MSGBOX 26425831c44SSamuel Holland tristate "Allwinner sun6i/sun8i/sun9i/sun50i Message Box" 26525831c44SSamuel Holland depends on ARCH_SUNXI || COMPILE_TEST 26625831c44SSamuel Holland default ARCH_SUNXI 26725831c44SSamuel Holland help 26825831c44SSamuel Holland Mailbox implementation for the hardware message box present in 26925831c44SSamuel Holland various Allwinner SoCs. This mailbox is used for communication 27025831c44SSamuel Holland between the application CPUs and the power management coprocessor. 27125831c44SSamuel Holland 272ca27fc26SBaolin Wangconfig SPRD_MBOX 273ca27fc26SBaolin Wang tristate "Spreadtrum Mailbox" 274ca27fc26SBaolin Wang depends on ARCH_SPRD || COMPILE_TEST 275ca27fc26SBaolin Wang help 276ca27fc26SBaolin Wang Mailbox driver implementation for the Spreadtrum platform. It is used 277ca27fc26SBaolin Wang to send message between application processors and MCU. Say Y here if 278ca27fc26SBaolin Wang you want to build the Spreatrum mailbox controller driver. 279ca27fc26SBaolin Wang 2800e2a9a03SSibi Sankarconfig QCOM_CPUCP_MBOX 2810e2a9a03SSibi Sankar tristate "Qualcomm Technologies, Inc. CPUCP mailbox driver" 282cbf50095SArnd Bergmann depends on (ARCH_QCOM || COMPILE_TEST) && 64BIT 2830e2a9a03SSibi Sankar help 2840e2a9a03SSibi Sankar Qualcomm Technologies, Inc. CPUSS Control Processor (CPUCP) mailbox 2850e2a9a03SSibi Sankar controller driver enables communication between AP and CPUCP. Say 2860e2a9a03SSibi Sankar Y here if you want to build this driver. 2870e2a9a03SSibi Sankar 288fa74a025SManivannan Sadhasivamconfig QCOM_IPCC 2898d7e5908SAmit Pundir tristate "Qualcomm Technologies, Inc. IPCC driver" 290fa74a025SManivannan Sadhasivam depends on ARCH_QCOM || COMPILE_TEST 291fa74a025SManivannan Sadhasivam help 292fa74a025SManivannan Sadhasivam Qualcomm Technologies, Inc. Inter-Processor Communication Controller 293fa74a025SManivannan Sadhasivam (IPCC) driver for MSM devices. The driver provides mailbox support for 294fa74a025SManivannan Sadhasivam sending interrupts to the clients. On the other hand, the driver also 295fa74a025SManivannan Sadhasivam acts as an interrupt controller for receiving interrupts from clients. 296fa74a025SManivannan Sadhasivam Say Y here if you want to build this driver. 297fa74a025SManivannan Sadhasivam 29830058677SRob Herringendif 299