1config IRQCHIP 2 def_bool y 3 depends on OF_IRQ 4 5config ARM_GIC 6 bool 7 select IRQ_DOMAIN 8 select IRQ_DOMAIN_HIERARCHY 9 select MULTI_IRQ_HANDLER 10 11config ARM_GIC_MAX_NR 12 int 13 default 2 if ARCH_REALVIEW 14 default 1 15 16config ARM_GIC_V2M 17 bool 18 depends on ARM_GIC 19 depends on PCI && PCI_MSI 20 select PCI_MSI_IRQ_DOMAIN 21 22config GIC_NON_BANKED 23 bool 24 25config ARM_GIC_V3 26 bool 27 select IRQ_DOMAIN 28 select MULTI_IRQ_HANDLER 29 select IRQ_DOMAIN_HIERARCHY 30 31config ARM_GIC_V3_ITS 32 bool 33 select PCI_MSI_IRQ_DOMAIN 34 35config HISILICON_IRQ_MBIGEN 36 bool "Support mbigen interrupt controller" 37 default n 38 depends on ARM_GIC_V3 && ARM_GIC_V3_ITS && GENERIC_MSI_IRQ_DOMAIN 39 help 40 Enable the mbigen interrupt controller used on 41 Hisilicon platform. 42 43config ARM_NVIC 44 bool 45 select IRQ_DOMAIN 46 select IRQ_DOMAIN_HIERARCHY 47 select GENERIC_IRQ_CHIP 48 49config ARM_VIC 50 bool 51 select IRQ_DOMAIN 52 select MULTI_IRQ_HANDLER 53 54config ARM_VIC_NR 55 int 56 default 4 if ARCH_S5PV210 57 default 2 58 depends on ARM_VIC 59 help 60 The maximum number of VICs available in the system, for 61 power management. 62 63config ATMEL_AIC_IRQ 64 bool 65 select GENERIC_IRQ_CHIP 66 select IRQ_DOMAIN 67 select MULTI_IRQ_HANDLER 68 select SPARSE_IRQ 69 70config ATMEL_AIC5_IRQ 71 bool 72 select GENERIC_IRQ_CHIP 73 select IRQ_DOMAIN 74 select MULTI_IRQ_HANDLER 75 select SPARSE_IRQ 76 77config I8259 78 bool 79 select IRQ_DOMAIN 80 81config BCM7038_L1_IRQ 82 bool 83 select GENERIC_IRQ_CHIP 84 select IRQ_DOMAIN 85 86config BCM7120_L2_IRQ 87 bool 88 select GENERIC_IRQ_CHIP 89 select IRQ_DOMAIN 90 91config BRCMSTB_L2_IRQ 92 bool 93 select GENERIC_IRQ_CHIP 94 select IRQ_DOMAIN 95 96config DW_APB_ICTL 97 bool 98 select GENERIC_IRQ_CHIP 99 select IRQ_DOMAIN 100 101config IMGPDC_IRQ 102 bool 103 select GENERIC_IRQ_CHIP 104 select IRQ_DOMAIN 105 106config IRQ_MIPS_CPU 107 bool 108 select GENERIC_IRQ_CHIP 109 select IRQ_DOMAIN 110 111config CLPS711X_IRQCHIP 112 bool 113 depends on ARCH_CLPS711X 114 select IRQ_DOMAIN 115 select MULTI_IRQ_HANDLER 116 select SPARSE_IRQ 117 default y 118 119config OR1K_PIC 120 bool 121 select IRQ_DOMAIN 122 123config OMAP_IRQCHIP 124 bool 125 select GENERIC_IRQ_CHIP 126 select IRQ_DOMAIN 127 128config ORION_IRQCHIP 129 bool 130 select IRQ_DOMAIN 131 select MULTI_IRQ_HANDLER 132 133config PIC32_EVIC 134 bool 135 select GENERIC_IRQ_CHIP 136 select IRQ_DOMAIN 137 138config RENESAS_INTC_IRQPIN 139 bool 140 select IRQ_DOMAIN 141 142config RENESAS_IRQC 143 bool 144 select GENERIC_IRQ_CHIP 145 select IRQ_DOMAIN 146 147config ST_IRQCHIP 148 bool 149 select REGMAP 150 select MFD_SYSCON 151 help 152 Enables SysCfg Controlled IRQs on STi based platforms. 153 154config TB10X_IRQC 155 bool 156 select IRQ_DOMAIN 157 select GENERIC_IRQ_CHIP 158 159config TS4800_IRQ 160 tristate "TS-4800 IRQ controller" 161 select IRQ_DOMAIN 162 depends on HAS_IOMEM 163 help 164 Support for the TS-4800 FPGA IRQ controller 165 166config VERSATILE_FPGA_IRQ 167 bool 168 select IRQ_DOMAIN 169 170config VERSATILE_FPGA_IRQ_NR 171 int 172 default 4 173 depends on VERSATILE_FPGA_IRQ 174 175config XTENSA_MX 176 bool 177 select IRQ_DOMAIN 178 179config IRQ_CROSSBAR 180 bool 181 help 182 Support for a CROSSBAR ip that precedes the main interrupt controller. 183 The primary irqchip invokes the crossbar's callback which inturn allocates 184 a free irq and configures the IP. Thus the peripheral interrupts are 185 routed to one of the free irqchip interrupt lines. 186 187config KEYSTONE_IRQ 188 tristate "Keystone 2 IRQ controller IP" 189 depends on ARCH_KEYSTONE 190 help 191 Support for Texas Instruments Keystone 2 IRQ controller IP which 192 is part of the Keystone 2 IPC mechanism 193 194config MIPS_GIC 195 bool 196 select MIPS_CM 197 198config INGENIC_IRQ 199 bool 200 depends on MACH_INGENIC 201 default y 202 203config RENESAS_H8300H_INTC 204 bool 205 select IRQ_DOMAIN 206 207config RENESAS_H8S_INTC 208 bool 209 select IRQ_DOMAIN 210 211config IMX_GPCV2 212 bool 213 select IRQ_DOMAIN 214 help 215 Enables the wakeup IRQs for IMX platforms with GPCv2 block 216 217config IRQ_MXS 218 def_bool y if MACH_ASM9260 || ARCH_MXS 219 select IRQ_DOMAIN 220 select STMP_DEVICE 221