xref: /linux/drivers/irqchip/Kconfig (revision 37cb8e1f8e10c6e9bd2a1b95cdda0620a21b0551)
1menu "IRQ chip support"
2
3config IRQCHIP
4	def_bool y
5	depends on OF_IRQ
6
7config ARM_GIC
8	bool
9	select IRQ_DOMAIN
10	select IRQ_DOMAIN_HIERARCHY
11	select MULTI_IRQ_HANDLER
12	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
13
14config ARM_GIC_PM
15	bool
16	depends on PM
17	select ARM_GIC
18	select PM_CLK
19
20config ARM_GIC_MAX_NR
21	int
22	default 2 if ARCH_REALVIEW
23	default 1
24
25config ARM_GIC_V2M
26	bool
27	depends on PCI
28	select ARM_GIC
29	select PCI_MSI
30
31config GIC_NON_BANKED
32	bool
33
34config ARM_GIC_V3
35	bool
36	select IRQ_DOMAIN
37	select MULTI_IRQ_HANDLER
38	select IRQ_DOMAIN_HIERARCHY
39	select PARTITION_PERCPU
40	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
41
42config ARM_GIC_V3_ITS
43	bool
44	depends on PCI
45	depends on PCI_MSI
46
47config ARM_NVIC
48	bool
49	select IRQ_DOMAIN
50	select IRQ_DOMAIN_HIERARCHY
51	select GENERIC_IRQ_CHIP
52
53config ARM_VIC
54	bool
55	select IRQ_DOMAIN
56	select MULTI_IRQ_HANDLER
57
58config ARM_VIC_NR
59	int
60	default 4 if ARCH_S5PV210
61	default 2
62	depends on ARM_VIC
63	help
64	  The maximum number of VICs available in the system, for
65	  power management.
66
67config ARMADA_370_XP_IRQ
68	bool
69	select GENERIC_IRQ_CHIP
70	select PCI_MSI if PCI
71	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
72
73config ALPINE_MSI
74	bool
75	depends on PCI
76	select PCI_MSI
77	select GENERIC_IRQ_CHIP
78
79config ATMEL_AIC_IRQ
80	bool
81	select GENERIC_IRQ_CHIP
82	select IRQ_DOMAIN
83	select MULTI_IRQ_HANDLER
84	select SPARSE_IRQ
85
86config ATMEL_AIC5_IRQ
87	bool
88	select GENERIC_IRQ_CHIP
89	select IRQ_DOMAIN
90	select MULTI_IRQ_HANDLER
91	select SPARSE_IRQ
92
93config I8259
94	bool
95	select IRQ_DOMAIN
96
97config BCM6345_L1_IRQ
98	bool
99	select GENERIC_IRQ_CHIP
100	select IRQ_DOMAIN
101	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
102
103config BCM7038_L1_IRQ
104	bool
105	select GENERIC_IRQ_CHIP
106	select IRQ_DOMAIN
107	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
108
109config BCM7120_L2_IRQ
110	bool
111	select GENERIC_IRQ_CHIP
112	select IRQ_DOMAIN
113
114config BRCMSTB_L2_IRQ
115	bool
116	select GENERIC_IRQ_CHIP
117	select IRQ_DOMAIN
118
119config DW_APB_ICTL
120	bool
121	select GENERIC_IRQ_CHIP
122	select IRQ_DOMAIN
123
124config FARADAY_FTINTC010
125	bool
126	select IRQ_DOMAIN
127	select MULTI_IRQ_HANDLER
128	select SPARSE_IRQ
129
130config HISILICON_IRQ_MBIGEN
131	bool
132	select ARM_GIC_V3
133	select ARM_GIC_V3_ITS
134
135config IMGPDC_IRQ
136	bool
137	select GENERIC_IRQ_CHIP
138	select IRQ_DOMAIN
139
140config IRQ_MIPS_CPU
141	bool
142	select GENERIC_IRQ_CHIP
143	select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
144	select IRQ_DOMAIN
145	select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
146	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
147
148config CLPS711X_IRQCHIP
149	bool
150	depends on ARCH_CLPS711X
151	select IRQ_DOMAIN
152	select MULTI_IRQ_HANDLER
153	select SPARSE_IRQ
154	default y
155
156config OMPIC
157	bool
158
159config OR1K_PIC
160	bool
161	select IRQ_DOMAIN
162
163config OMAP_IRQCHIP
164	bool
165	select GENERIC_IRQ_CHIP
166	select IRQ_DOMAIN
167
168config ORION_IRQCHIP
169	bool
170	select IRQ_DOMAIN
171	select MULTI_IRQ_HANDLER
172
173config PIC32_EVIC
174	bool
175	select GENERIC_IRQ_CHIP
176	select IRQ_DOMAIN
177
178config JCORE_AIC
179	bool "J-Core integrated AIC" if COMPILE_TEST
180	depends on OF
181	select IRQ_DOMAIN
182	help
183	  Support for the J-Core integrated AIC.
184
185config RENESAS_INTC_IRQPIN
186	bool
187	select IRQ_DOMAIN
188
189config RENESAS_IRQC
190	bool
191	select GENERIC_IRQ_CHIP
192	select IRQ_DOMAIN
193
194config ST_IRQCHIP
195	bool
196	select REGMAP
197	select MFD_SYSCON
198	help
199	  Enables SysCfg Controlled IRQs on STi based platforms.
200
201config TANGO_IRQ
202	bool
203	select IRQ_DOMAIN
204	select GENERIC_IRQ_CHIP
205
206config TB10X_IRQC
207	bool
208	select IRQ_DOMAIN
209	select GENERIC_IRQ_CHIP
210
211config TS4800_IRQ
212	tristate "TS-4800 IRQ controller"
213	select IRQ_DOMAIN
214	depends on HAS_IOMEM
215	depends on SOC_IMX51 || COMPILE_TEST
216	help
217	  Support for the TS-4800 FPGA IRQ controller
218
219config VERSATILE_FPGA_IRQ
220	bool
221	select IRQ_DOMAIN
222
223config VERSATILE_FPGA_IRQ_NR
224       int
225       default 4
226       depends on VERSATILE_FPGA_IRQ
227
228config XTENSA_MX
229	bool
230	select IRQ_DOMAIN
231	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
232
233config XILINX_INTC
234	bool
235	select IRQ_DOMAIN
236
237config IRQ_CROSSBAR
238	bool
239	help
240	  Support for a CROSSBAR ip that precedes the main interrupt controller.
241	  The primary irqchip invokes the crossbar's callback which inturn allocates
242	  a free irq and configures the IP. Thus the peripheral interrupts are
243	  routed to one of the free irqchip interrupt lines.
244
245config KEYSTONE_IRQ
246	tristate "Keystone 2 IRQ controller IP"
247	depends on ARCH_KEYSTONE
248	help
249		Support for Texas Instruments Keystone 2 IRQ controller IP which
250		is part of the Keystone 2 IPC mechanism
251
252config MIPS_GIC
253	bool
254	select GENERIC_IRQ_IPI
255	select IRQ_DOMAIN_HIERARCHY
256	select MIPS_CM
257
258config INGENIC_IRQ
259	bool
260	depends on MACH_INGENIC
261	default y
262
263config RENESAS_H8300H_INTC
264        bool
265	select IRQ_DOMAIN
266
267config RENESAS_H8S_INTC
268        bool
269	select IRQ_DOMAIN
270
271config IMX_GPCV2
272	bool
273	select IRQ_DOMAIN
274	help
275	  Enables the wakeup IRQs for IMX platforms with GPCv2 block
276
277config IRQ_MXS
278	def_bool y if MACH_ASM9260 || ARCH_MXS
279	select IRQ_DOMAIN
280	select STMP_DEVICE
281
282config MVEBU_GICP
283	bool
284
285config MVEBU_ICU
286	bool
287
288config MVEBU_ODMI
289	bool
290	select GENERIC_MSI_IRQ_DOMAIN
291
292config MVEBU_PIC
293	bool
294
295config LS_SCFG_MSI
296	def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
297	depends on PCI && PCI_MSI
298
299config PARTITION_PERCPU
300	bool
301
302config EZNPS_GIC
303	bool "NPS400 Global Interrupt Manager (GIM)"
304	depends on ARC || (COMPILE_TEST && !64BIT)
305	select IRQ_DOMAIN
306	help
307	  Support the EZchip NPS400 global interrupt controller
308
309config STM32_EXTI
310	bool
311	select IRQ_DOMAIN
312	select GENERIC_IRQ_CHIP
313
314config QCOM_IRQ_COMBINER
315	bool "QCOM IRQ combiner support"
316	depends on ARCH_QCOM && ACPI
317	select IRQ_DOMAIN
318	select IRQ_DOMAIN_HIERARCHY
319	help
320	  Say yes here to add support for the IRQ combiner devices embedded
321	  in Qualcomm Technologies chips.
322
323config IRQ_UNIPHIER_AIDET
324	bool "UniPhier AIDET support" if COMPILE_TEST
325	depends on ARCH_UNIPHIER || COMPILE_TEST
326	default ARCH_UNIPHIER
327	select IRQ_DOMAIN_HIERARCHY
328	help
329	  Support for the UniPhier AIDET (ARM Interrupt Detector).
330
331config MESON_IRQ_GPIO
332       bool "Meson GPIO Interrupt Multiplexer"
333       depends on ARCH_MESON
334       select IRQ_DOMAIN
335       select IRQ_DOMAIN_HIERARCHY
336       help
337         Support Meson SoC Family GPIO Interrupt Multiplexer
338
339endmenu
340