1c94fb639SRandy Dunlapmenu "IRQ chip support" 2c94fb639SRandy Dunlap 3f6e916b8SThomas Petazzoniconfig IRQCHIP 4f6e916b8SThomas Petazzoni def_bool y 5f6e916b8SThomas Petazzoni depends on OF_IRQ 6f6e916b8SThomas Petazzoni 781243e44SRob Herringconfig ARM_GIC 881243e44SRob Herring bool 981243e44SRob Herring select IRQ_DOMAIN 109a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 1181243e44SRob Herring select MULTI_IRQ_HANDLER 120c9e4982SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1381243e44SRob Herring 149c8edddfSJon Hunterconfig ARM_GIC_PM 159c8edddfSJon Hunter bool 169c8edddfSJon Hunter depends on PM 179c8edddfSJon Hunter select ARM_GIC 189c8edddfSJon Hunter select PM_CLK 199c8edddfSJon Hunter 20a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 21a27d21e0SLinus Walleij int 22a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 23a27d21e0SLinus Walleij default 1 24a27d21e0SLinus Walleij 25853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 26853a33ceSSuravee Suthikulpanit bool 273ee80364SArnd Bergmann depends on PCI 283ee80364SArnd Bergmann select ARM_GIC 293ee80364SArnd Bergmann select PCI_MSI 30853a33ceSSuravee Suthikulpanit 3181243e44SRob Herringconfig GIC_NON_BANKED 3281243e44SRob Herring bool 3381243e44SRob Herring 34021f6537SMarc Zyngierconfig ARM_GIC_V3 35021f6537SMarc Zyngier bool 36021f6537SMarc Zyngier select IRQ_DOMAIN 37021f6537SMarc Zyngier select MULTI_IRQ_HANDLER 38443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 39e3825ba1SMarc Zyngier select PARTITION_PERCPU 40956ae91aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 41021f6537SMarc Zyngier 4219812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4319812729SMarc Zyngier bool 4429f41139SMarc Zyngier select GENERIC_MSI_IRQ_DOMAIN 4529f41139SMarc Zyngier default ARM_GIC_V3 4629f41139SMarc Zyngier 4729f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4829f41139SMarc Zyngier bool 4929f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 503ee80364SArnd Bergmann depends on PCI 513ee80364SArnd Bergmann depends on PCI_MSI 5229f41139SMarc Zyngier default ARM_GIC_V3_ITS 53292ec080SUwe Kleine-König 5444430ec0SRob Herringconfig ARM_NVIC 5544430ec0SRob Herring bool 5644430ec0SRob Herring select IRQ_DOMAIN 572d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 5844430ec0SRob Herring select GENERIC_IRQ_CHIP 5944430ec0SRob Herring 6044430ec0SRob Herringconfig ARM_VIC 6144430ec0SRob Herring bool 6244430ec0SRob Herring select IRQ_DOMAIN 6344430ec0SRob Herring select MULTI_IRQ_HANDLER 6444430ec0SRob Herring 6544430ec0SRob Herringconfig ARM_VIC_NR 6644430ec0SRob Herring int 6744430ec0SRob Herring default 4 if ARCH_S5PV210 6844430ec0SRob Herring default 2 6944430ec0SRob Herring depends on ARM_VIC 7044430ec0SRob Herring help 7144430ec0SRob Herring The maximum number of VICs available in the system, for 7244430ec0SRob Herring power management. 7344430ec0SRob Herring 74fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 75fed6d336SThomas Petazzoni bool 76fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 773ee80364SArnd Bergmann select PCI_MSI if PCI 78e31793a3SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 79fed6d336SThomas Petazzoni 80e6b78f2cSAntoine Tenartconfig ALPINE_MSI 81e6b78f2cSAntoine Tenart bool 823ee80364SArnd Bergmann depends on PCI 833ee80364SArnd Bergmann select PCI_MSI 84e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 85e6b78f2cSAntoine Tenart 86b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 87b1479ebbSBoris BREZILLON bool 88b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 89b1479ebbSBoris BREZILLON select IRQ_DOMAIN 90b1479ebbSBoris BREZILLON select MULTI_IRQ_HANDLER 91b1479ebbSBoris BREZILLON select SPARSE_IRQ 92b1479ebbSBoris BREZILLON 93b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 94b1479ebbSBoris BREZILLON bool 95b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 96b1479ebbSBoris BREZILLON select IRQ_DOMAIN 97b1479ebbSBoris BREZILLON select MULTI_IRQ_HANDLER 98b1479ebbSBoris BREZILLON select SPARSE_IRQ 99b1479ebbSBoris BREZILLON 1000509cfdeSRalf Baechleconfig I8259 1010509cfdeSRalf Baechle bool 1020509cfdeSRalf Baechle select IRQ_DOMAIN 1030509cfdeSRalf Baechle 104c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 105c7c42ec2SSimon Arlott bool 106c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 107c7c42ec2SSimon Arlott select IRQ_DOMAIN 108d0ed5e8eSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 109c7c42ec2SSimon Arlott 1105f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 1115f7f0317SKevin Cernekee bool 1125f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1135f7f0317SKevin Cernekee select IRQ_DOMAIN 114b8d9884aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1155f7f0317SKevin Cernekee 116a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 117a4fcbb86SKevin Cernekee bool 118a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 119a4fcbb86SKevin Cernekee select IRQ_DOMAIN 120a4fcbb86SKevin Cernekee 1217f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 1227f646e92SFlorian Fainelli bool 1237f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1247f646e92SFlorian Fainelli select IRQ_DOMAIN 1257f646e92SFlorian Fainelli 126350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 127350d71b9SSebastian Hesselbarth bool 128e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 129350d71b9SSebastian Hesselbarth select IRQ_DOMAIN 130350d71b9SSebastian Hesselbarth 1316ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1326ee532e2SLinus Walleij bool 1336ee532e2SLinus Walleij select IRQ_DOMAIN 1346ee532e2SLinus Walleij select MULTI_IRQ_HANDLER 1356ee532e2SLinus Walleij select SPARSE_IRQ 1366ee532e2SLinus Walleij 1379a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1389a7c4abdSMaJun bool 1399a7c4abdSMaJun select ARM_GIC_V3 1409a7c4abdSMaJun select ARM_GIC_V3_ITS 1419a7c4abdSMaJun 142b6ef9161SJames Hoganconfig IMGPDC_IRQ 143b6ef9161SJames Hogan bool 144b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 145b6ef9161SJames Hogan select IRQ_DOMAIN 146b6ef9161SJames Hogan 14767e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 14867e38cf2SRalf Baechle bool 14967e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1503838a547SPaul Burton select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING 15167e38cf2SRalf Baechle select IRQ_DOMAIN 1523838a547SPaul Burton select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI 15318416e45SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 15467e38cf2SRalf Baechle 155afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 156afc98d90SAlexander Shiyan bool 157afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 158afc98d90SAlexander Shiyan select IRQ_DOMAIN 159afc98d90SAlexander Shiyan select MULTI_IRQ_HANDLER 160afc98d90SAlexander Shiyan select SPARSE_IRQ 161afc98d90SAlexander Shiyan default y 162afc98d90SAlexander Shiyan 1639b54470aSStafford Horneconfig OMPIC 1649b54470aSStafford Horne bool 1659b54470aSStafford Horne 1664db8e6d2SStefan Kristianssonconfig OR1K_PIC 1674db8e6d2SStefan Kristiansson bool 1684db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1694db8e6d2SStefan Kristiansson 1708598066cSFelipe Balbiconfig OMAP_IRQCHIP 1718598066cSFelipe Balbi bool 1728598066cSFelipe Balbi select GENERIC_IRQ_CHIP 1738598066cSFelipe Balbi select IRQ_DOMAIN 1748598066cSFelipe Balbi 1759dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 1769dbd90f1SSebastian Hesselbarth bool 1779dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 1789dbd90f1SSebastian Hesselbarth select MULTI_IRQ_HANDLER 1799dbd90f1SSebastian Hesselbarth 180aaa8666aSCristian Birsanconfig PIC32_EVIC 181aaa8666aSCristian Birsan bool 182aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 183aaa8666aSCristian Birsan select IRQ_DOMAIN 184aaa8666aSCristian Birsan 185981b58f6SRich Felkerconfig JCORE_AIC 1863602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 1873602ffdeSRich Felker depends on OF 188981b58f6SRich Felker select IRQ_DOMAIN 189981b58f6SRich Felker help 190981b58f6SRich Felker Support for the J-Core integrated AIC. 191981b58f6SRich Felker 19244358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 19344358048SMagnus Damm bool 19444358048SMagnus Damm select IRQ_DOMAIN 19544358048SMagnus Damm 196fbc83b7fSMagnus Dammconfig RENESAS_IRQC 197fbc83b7fSMagnus Damm bool 19899c221dfSMagnus Damm select GENERIC_IRQ_CHIP 199fbc83b7fSMagnus Damm select IRQ_DOMAIN 200fbc83b7fSMagnus Damm 20107088484SLee Jonesconfig ST_IRQCHIP 20207088484SLee Jones bool 20307088484SLee Jones select REGMAP 20407088484SLee Jones select MFD_SYSCON 20507088484SLee Jones help 20607088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 20707088484SLee Jones 2084bba6689SMans Rullgardconfig TANGO_IRQ 2094bba6689SMans Rullgard bool 2104bba6689SMans Rullgard select IRQ_DOMAIN 2114bba6689SMans Rullgard select GENERIC_IRQ_CHIP 2124bba6689SMans Rullgard 213b06eb017SChristian Ruppertconfig TB10X_IRQC 214b06eb017SChristian Ruppert bool 215b06eb017SChristian Ruppert select IRQ_DOMAIN 216b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 217b06eb017SChristian Ruppert 218d01f8633SDamien Riegelconfig TS4800_IRQ 219d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 220d01f8633SDamien Riegel select IRQ_DOMAIN 2210df337cfSRichard Weinberger depends on HAS_IOMEM 222d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 223d01f8633SDamien Riegel help 224d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 225d01f8633SDamien Riegel 2262389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2272389d501SLinus Walleij bool 2282389d501SLinus Walleij select IRQ_DOMAIN 2292389d501SLinus Walleij 2302389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2312389d501SLinus Walleij int 2322389d501SLinus Walleij default 4 2332389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 23426a8e96aSMax Filippov 23526a8e96aSMax Filippovconfig XTENSA_MX 23626a8e96aSMax Filippov bool 23726a8e96aSMax Filippov select IRQ_DOMAIN 23850091212SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 23996ca848eSSricharan R 2400547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 2410547dc78SZubair Lutfullah Kakakhel bool 2420547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 2430547dc78SZubair Lutfullah Kakakhel 24496ca848eSSricharan Rconfig IRQ_CROSSBAR 24596ca848eSSricharan R bool 24696ca848eSSricharan R help 247f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 24896ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 24996ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 25096ca848eSSricharan R routed to one of the free irqchip interrupt lines. 25189323f8cSGrygorii Strashko 25289323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 25389323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 25489323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 25589323f8cSGrygorii Strashko help 25689323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 25789323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 2588a19b8f1SAndrew Bresticker 2598a19b8f1SAndrew Brestickerconfig MIPS_GIC 2608a19b8f1SAndrew Bresticker bool 261bb11cff3SQais Yousef select GENERIC_IRQ_IPI 2622af70a96SQais Yousef select IRQ_DOMAIN_HIERARCHY 2638a19b8f1SAndrew Bresticker select MIPS_CM 2648a764482SYoshinori Sato 26544e08e70SPaul Burtonconfig INGENIC_IRQ 26644e08e70SPaul Burton bool 26744e08e70SPaul Burton depends on MACH_INGENIC 26844e08e70SPaul Burton default y 26978c10e55SLinus Torvalds 2708a764482SYoshinori Satoconfig RENESAS_H8300H_INTC 2718a764482SYoshinori Sato bool 2728a764482SYoshinori Sato select IRQ_DOMAIN 2738a764482SYoshinori Sato 2748a764482SYoshinori Satoconfig RENESAS_H8S_INTC 2758a764482SYoshinori Sato bool 2768a764482SYoshinori Sato select IRQ_DOMAIN 277e324c4dcSShenwei Wang 278e324c4dcSShenwei Wangconfig IMX_GPCV2 279e324c4dcSShenwei Wang bool 280e324c4dcSShenwei Wang select IRQ_DOMAIN 281e324c4dcSShenwei Wang help 282e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 2837e4ac676SOleksij Rempel 2847e4ac676SOleksij Rempelconfig IRQ_MXS 2857e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 2867e4ac676SOleksij Rempel select IRQ_DOMAIN 2877e4ac676SOleksij Rempel select STMP_DEVICE 288c27f29bbSThomas Petazzoni 289a68a63cbSThomas Petazzoniconfig MVEBU_GICP 290a68a63cbSThomas Petazzoni bool 291a68a63cbSThomas Petazzoni 292e0de91a9SThomas Petazzoniconfig MVEBU_ICU 293e0de91a9SThomas Petazzoni bool 294e0de91a9SThomas Petazzoni 295c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 296c27f29bbSThomas Petazzoni bool 297fa23b9d1SArnd Bergmann select GENERIC_MSI_IRQ_DOMAIN 2989e2c986cSMarc Zyngier 299a109893bSThomas Petazzoniconfig MVEBU_PIC 300a109893bSThomas Petazzoni bool 301a109893bSThomas Petazzoni 302b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 303b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 304b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 305b8f3ebe6SMinghuan Lian 3069e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3079e2c986cSMarc Zyngier bool 3080efacbbaSLinus Torvalds 30944df427cSNoam Camusconfig EZNPS_GIC 31044df427cSNoam Camus bool "NPS400 Global Interrupt Manager (GIM)" 311ffd565e3SArnd Bergmann depends on ARC || (COMPILE_TEST && !64BIT) 31244df427cSNoam Camus select IRQ_DOMAIN 31344df427cSNoam Camus help 31444df427cSNoam Camus Support the EZchip NPS400 global interrupt controller 315e0720416SAlexandre TORGUE 316e0720416SAlexandre TORGUEconfig STM32_EXTI 317e0720416SAlexandre TORGUE bool 318e0720416SAlexandre TORGUE select IRQ_DOMAIN 3190e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 320f20cc9b0SAgustin Vega-Frias 321f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 322f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 323f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 324f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN 325f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 326f20cc9b0SAgustin Vega-Frias help 327f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 328f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 3295ed34d3aSMasahiro Yamada 3305ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 3315ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 3325ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 3335ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 3345ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 3355ed34d3aSMasahiro Yamada help 3365ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 337c94fb639SRandy Dunlap 338215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 339215f4cc0SJerome Brunet bool "Meson GPIO Interrupt Multiplexer" 340d9ee91c1SThomas Gleixner depends on ARCH_MESON 341215f4cc0SJerome Brunet select IRQ_DOMAIN 342215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 343215f4cc0SJerome Brunet help 344215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 345215f4cc0SJerome Brunet 3464235ff50SMiodrag Dinicconfig GOLDFISH_PIC 3474235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 3484235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 3494235ff50SMiodrag Dinic select IRQ_DOMAIN 3504235ff50SMiodrag Dinic help 3514235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 3524235ff50SMiodrag Dinic for Goldfish based virtual platforms. 3534235ff50SMiodrag Dinic 354*f55c73aeSArchana Sathyakumarconfig QCOM_PDC 355*f55c73aeSArchana Sathyakumar bool "QCOM PDC" 356*f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 357*f55c73aeSArchana Sathyakumar select IRQ_DOMAIN 358*f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 359*f55c73aeSArchana Sathyakumar help 360*f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 361*f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 362*f55c73aeSArchana Sathyakumar 363c94fb639SRandy Dunlapendmenu 364