1*ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2c94fb639SRandy Dunlapmenu "IRQ chip support" 3c94fb639SRandy Dunlap 4f6e916b8SThomas Petazzoniconfig IRQCHIP 5f6e916b8SThomas Petazzoni def_bool y 6f6e916b8SThomas Petazzoni depends on OF_IRQ 7f6e916b8SThomas Petazzoni 881243e44SRob Herringconfig ARM_GIC 981243e44SRob Herring bool 109a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 114f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 120c9e4982SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1381243e44SRob Herring 149c8edddfSJon Hunterconfig ARM_GIC_PM 159c8edddfSJon Hunter bool 169c8edddfSJon Hunter depends on PM 179c8edddfSJon Hunter select ARM_GIC 189c8edddfSJon Hunter select PM_CLK 199c8edddfSJon Hunter 20a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 21a27d21e0SLinus Walleij int 22a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 23a27d21e0SLinus Walleij default 1 24a27d21e0SLinus Walleij 25853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 26853a33ceSSuravee Suthikulpanit bool 273ee80364SArnd Bergmann depends on PCI 283ee80364SArnd Bergmann select ARM_GIC 293ee80364SArnd Bergmann select PCI_MSI 30853a33ceSSuravee Suthikulpanit 3181243e44SRob Herringconfig GIC_NON_BANKED 3281243e44SRob Herring bool 3381243e44SRob Herring 34021f6537SMarc Zyngierconfig ARM_GIC_V3 35021f6537SMarc Zyngier bool 364f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 37443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 38e3825ba1SMarc Zyngier select PARTITION_PERCPU 39956ae91aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 40021f6537SMarc Zyngier 4119812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4219812729SMarc Zyngier bool 4329f41139SMarc Zyngier select GENERIC_MSI_IRQ_DOMAIN 4429f41139SMarc Zyngier default ARM_GIC_V3 4529f41139SMarc Zyngier 4629f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4729f41139SMarc Zyngier bool 4829f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 493ee80364SArnd Bergmann depends on PCI 503ee80364SArnd Bergmann depends on PCI_MSI 5129f41139SMarc Zyngier default ARM_GIC_V3_ITS 52292ec080SUwe Kleine-König 537afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 547afe031cSBogdan Purcareata bool 557afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 567afe031cSBogdan Purcareata depends on FSL_MC_BUS 577afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 587afe031cSBogdan Purcareata 5944430ec0SRob Herringconfig ARM_NVIC 6044430ec0SRob Herring bool 612d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 6244430ec0SRob Herring select GENERIC_IRQ_CHIP 6344430ec0SRob Herring 6444430ec0SRob Herringconfig ARM_VIC 6544430ec0SRob Herring bool 6644430ec0SRob Herring select IRQ_DOMAIN 674f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 6844430ec0SRob Herring 6944430ec0SRob Herringconfig ARM_VIC_NR 7044430ec0SRob Herring int 7144430ec0SRob Herring default 4 if ARCH_S5PV210 7244430ec0SRob Herring default 2 7344430ec0SRob Herring depends on ARM_VIC 7444430ec0SRob Herring help 7544430ec0SRob Herring The maximum number of VICs available in the system, for 7644430ec0SRob Herring power management. 7744430ec0SRob Herring 78fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 79fed6d336SThomas Petazzoni bool 80fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 813ee80364SArnd Bergmann select PCI_MSI if PCI 82e31793a3SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 83fed6d336SThomas Petazzoni 84e6b78f2cSAntoine Tenartconfig ALPINE_MSI 85e6b78f2cSAntoine Tenart bool 863ee80364SArnd Bergmann depends on PCI 873ee80364SArnd Bergmann select PCI_MSI 88e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 89e6b78f2cSAntoine Tenart 90b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 91b1479ebbSBoris BREZILLON bool 92b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 93b1479ebbSBoris BREZILLON select IRQ_DOMAIN 944f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 95b1479ebbSBoris BREZILLON select SPARSE_IRQ 96b1479ebbSBoris BREZILLON 97b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 98b1479ebbSBoris BREZILLON bool 99b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 100b1479ebbSBoris BREZILLON select IRQ_DOMAIN 1014f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 102b1479ebbSBoris BREZILLON select SPARSE_IRQ 103b1479ebbSBoris BREZILLON 1040509cfdeSRalf Baechleconfig I8259 1050509cfdeSRalf Baechle bool 1060509cfdeSRalf Baechle select IRQ_DOMAIN 1070509cfdeSRalf Baechle 108c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 109c7c42ec2SSimon Arlott bool 110c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 111c7c42ec2SSimon Arlott select IRQ_DOMAIN 112d0ed5e8eSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 113c7c42ec2SSimon Arlott 1145f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 1155f7f0317SKevin Cernekee bool 1165f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1175f7f0317SKevin Cernekee select IRQ_DOMAIN 118b8d9884aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1195f7f0317SKevin Cernekee 120a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 121a4fcbb86SKevin Cernekee bool 122a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 123a4fcbb86SKevin Cernekee select IRQ_DOMAIN 124a4fcbb86SKevin Cernekee 1257f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 1267f646e92SFlorian Fainelli bool 1277f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1287f646e92SFlorian Fainelli select IRQ_DOMAIN 1297f646e92SFlorian Fainelli 1300145beedSBartosz Golaszewskiconfig DAVINCI_AINTC 1310145beedSBartosz Golaszewski bool 1320145beedSBartosz Golaszewski select GENERIC_IRQ_CHIP 1330145beedSBartosz Golaszewski select IRQ_DOMAIN 1340145beedSBartosz Golaszewski 1350fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC 1360fc3d74cSBartosz Golaszewski bool 1370fc3d74cSBartosz Golaszewski select GENERIC_IRQ_CHIP 1380fc3d74cSBartosz Golaszewski select IRQ_DOMAIN 1390fc3d74cSBartosz Golaszewski 140350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 141350d71b9SSebastian Hesselbarth bool 142e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 143350d71b9SSebastian Hesselbarth select IRQ_DOMAIN 144350d71b9SSebastian Hesselbarth 1456ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1466ee532e2SLinus Walleij bool 1476ee532e2SLinus Walleij select IRQ_DOMAIN 1484f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 1496ee532e2SLinus Walleij select SPARSE_IRQ 1506ee532e2SLinus Walleij 1519a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1529a7c4abdSMaJun bool 1539a7c4abdSMaJun select ARM_GIC_V3 1549a7c4abdSMaJun select ARM_GIC_V3_ITS 1559a7c4abdSMaJun 156b6ef9161SJames Hoganconfig IMGPDC_IRQ 157b6ef9161SJames Hogan bool 158b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 159b6ef9161SJames Hogan select IRQ_DOMAIN 160b6ef9161SJames Hogan 1615b978c10SLinus Walleijconfig IXP4XX_IRQ 1625b978c10SLinus Walleij bool 1635b978c10SLinus Walleij select IRQ_DOMAIN 1645b978c10SLinus Walleij select GENERIC_IRQ_MULTI_HANDLER 1655b978c10SLinus Walleij select SPARSE_IRQ 1665b978c10SLinus Walleij 167da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ 168da0abe1aSRichard Fitzgerald tristate 169da0abe1aSRichard Fitzgerald 17067e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 17167e38cf2SRalf Baechle bool 17267e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1733838a547SPaul Burton select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING 17467e38cf2SRalf Baechle select IRQ_DOMAIN 1753838a547SPaul Burton select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI 17618416e45SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 17767e38cf2SRalf Baechle 178afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 179afc98d90SAlexander Shiyan bool 180afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 181afc98d90SAlexander Shiyan select IRQ_DOMAIN 1824f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 183afc98d90SAlexander Shiyan select SPARSE_IRQ 184afc98d90SAlexander Shiyan default y 185afc98d90SAlexander Shiyan 1869b54470aSStafford Horneconfig OMPIC 1879b54470aSStafford Horne bool 1889b54470aSStafford Horne 1894db8e6d2SStefan Kristianssonconfig OR1K_PIC 1904db8e6d2SStefan Kristiansson bool 1914db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1924db8e6d2SStefan Kristiansson 1938598066cSFelipe Balbiconfig OMAP_IRQCHIP 1948598066cSFelipe Balbi bool 1958598066cSFelipe Balbi select GENERIC_IRQ_CHIP 1968598066cSFelipe Balbi select IRQ_DOMAIN 1978598066cSFelipe Balbi 1989dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 1999dbd90f1SSebastian Hesselbarth bool 2009dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 2014f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 2029dbd90f1SSebastian Hesselbarth 203aaa8666aSCristian Birsanconfig PIC32_EVIC 204aaa8666aSCristian Birsan bool 205aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 206aaa8666aSCristian Birsan select IRQ_DOMAIN 207aaa8666aSCristian Birsan 208981b58f6SRich Felkerconfig JCORE_AIC 2093602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 2103602ffdeSRich Felker depends on OF 211981b58f6SRich Felker select IRQ_DOMAIN 212981b58f6SRich Felker help 213981b58f6SRich Felker Support for the J-Core integrated AIC. 214981b58f6SRich Felker 215d852e62aSManivannan Sadhasivamconfig RDA_INTC 216d852e62aSManivannan Sadhasivam bool 217d852e62aSManivannan Sadhasivam select IRQ_DOMAIN 218d852e62aSManivannan Sadhasivam 21944358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 22044358048SMagnus Damm bool 22144358048SMagnus Damm select IRQ_DOMAIN 22244358048SMagnus Damm 223fbc83b7fSMagnus Dammconfig RENESAS_IRQC 224fbc83b7fSMagnus Damm bool 22599c221dfSMagnus Damm select GENERIC_IRQ_CHIP 226fbc83b7fSMagnus Damm select IRQ_DOMAIN 227fbc83b7fSMagnus Damm 22807088484SLee Jonesconfig ST_IRQCHIP 22907088484SLee Jones bool 23007088484SLee Jones select REGMAP 23107088484SLee Jones select MFD_SYSCON 23207088484SLee Jones help 23307088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 23407088484SLee Jones 2354bba6689SMans Rullgardconfig TANGO_IRQ 2364bba6689SMans Rullgard bool 2374bba6689SMans Rullgard select IRQ_DOMAIN 2384bba6689SMans Rullgard select GENERIC_IRQ_CHIP 2394bba6689SMans Rullgard 240b06eb017SChristian Ruppertconfig TB10X_IRQC 241b06eb017SChristian Ruppert bool 242b06eb017SChristian Ruppert select IRQ_DOMAIN 243b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 244b06eb017SChristian Ruppert 245d01f8633SDamien Riegelconfig TS4800_IRQ 246d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 247d01f8633SDamien Riegel select IRQ_DOMAIN 2480df337cfSRichard Weinberger depends on HAS_IOMEM 249d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 250d01f8633SDamien Riegel help 251d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 252d01f8633SDamien Riegel 2532389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2542389d501SLinus Walleij bool 2552389d501SLinus Walleij select IRQ_DOMAIN 2562389d501SLinus Walleij 2572389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2582389d501SLinus Walleij int 2592389d501SLinus Walleij default 4 2602389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 26126a8e96aSMax Filippov 26226a8e96aSMax Filippovconfig XTENSA_MX 26326a8e96aSMax Filippov bool 26426a8e96aSMax Filippov select IRQ_DOMAIN 26550091212SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 26696ca848eSSricharan R 2670547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 2680547dc78SZubair Lutfullah Kakakhel bool 2690547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 2700547dc78SZubair Lutfullah Kakakhel 27196ca848eSSricharan Rconfig IRQ_CROSSBAR 27296ca848eSSricharan R bool 27396ca848eSSricharan R help 274f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 27596ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 27696ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 27796ca848eSSricharan R routed to one of the free irqchip interrupt lines. 27889323f8cSGrygorii Strashko 27989323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 28089323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 28189323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 28289323f8cSGrygorii Strashko help 28389323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 28489323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 2858a19b8f1SAndrew Bresticker 2868a19b8f1SAndrew Brestickerconfig MIPS_GIC 2878a19b8f1SAndrew Bresticker bool 288bb11cff3SQais Yousef select GENERIC_IRQ_IPI 2892af70a96SQais Yousef select IRQ_DOMAIN_HIERARCHY 2908a19b8f1SAndrew Bresticker select MIPS_CM 2918a764482SYoshinori Sato 29244e08e70SPaul Burtonconfig INGENIC_IRQ 29344e08e70SPaul Burton bool 29444e08e70SPaul Burton depends on MACH_INGENIC 29544e08e70SPaul Burton default y 29678c10e55SLinus Torvalds 2978a764482SYoshinori Satoconfig RENESAS_H8300H_INTC 2988a764482SYoshinori Sato bool 2998a764482SYoshinori Sato select IRQ_DOMAIN 3008a764482SYoshinori Sato 3018a764482SYoshinori Satoconfig RENESAS_H8S_INTC 3028a764482SYoshinori Sato bool 3038a764482SYoshinori Sato select IRQ_DOMAIN 304e324c4dcSShenwei Wang 305e324c4dcSShenwei Wangconfig IMX_GPCV2 306e324c4dcSShenwei Wang bool 307e324c4dcSShenwei Wang select IRQ_DOMAIN 308e324c4dcSShenwei Wang help 309e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 3107e4ac676SOleksij Rempel 3117e4ac676SOleksij Rempelconfig IRQ_MXS 3127e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 3137e4ac676SOleksij Rempel select IRQ_DOMAIN 3147e4ac676SOleksij Rempel select STMP_DEVICE 315c27f29bbSThomas Petazzoni 31619d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 31719d99164SAlexandre Belloni bool 31819d99164SAlexandre Belloni select IRQ_DOMAIN 31919d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 32019d99164SAlexandre Belloni 321a68a63cbSThomas Petazzoniconfig MVEBU_GICP 322a68a63cbSThomas Petazzoni bool 323a68a63cbSThomas Petazzoni 324e0de91a9SThomas Petazzoniconfig MVEBU_ICU 325e0de91a9SThomas Petazzoni bool 326e0de91a9SThomas Petazzoni 327c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 328c27f29bbSThomas Petazzoni bool 329fa23b9d1SArnd Bergmann select GENERIC_MSI_IRQ_DOMAIN 3309e2c986cSMarc Zyngier 331a109893bSThomas Petazzoniconfig MVEBU_PIC 332a109893bSThomas Petazzoni bool 333a109893bSThomas Petazzoni 33461ce8d8dSMiquel Raynalconfig MVEBU_SEI 33561ce8d8dSMiquel Raynal bool 33661ce8d8dSMiquel Raynal 337b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 338b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 339b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 340b8f3ebe6SMinghuan Lian 3419e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3429e2c986cSMarc Zyngier bool 3430efacbbaSLinus Torvalds 34444df427cSNoam Camusconfig EZNPS_GIC 34544df427cSNoam Camus bool "NPS400 Global Interrupt Manager (GIM)" 346ffd565e3SArnd Bergmann depends on ARC || (COMPILE_TEST && !64BIT) 34744df427cSNoam Camus select IRQ_DOMAIN 34844df427cSNoam Camus help 34944df427cSNoam Camus Support the EZchip NPS400 global interrupt controller 350e0720416SAlexandre TORGUE 351e0720416SAlexandre TORGUEconfig STM32_EXTI 352e0720416SAlexandre TORGUE bool 353e0720416SAlexandre TORGUE select IRQ_DOMAIN 3540e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 355f20cc9b0SAgustin Vega-Frias 356f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 357f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 358f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 359f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 360f20cc9b0SAgustin Vega-Frias help 361f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 362f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 3635ed34d3aSMasahiro Yamada 3645ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 3655ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 3665ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 3675ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 3685ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 3695ed34d3aSMasahiro Yamada help 3705ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 371c94fb639SRandy Dunlap 372215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 373215f4cc0SJerome Brunet bool "Meson GPIO Interrupt Multiplexer" 374d9ee91c1SThomas Gleixner depends on ARCH_MESON 375215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 376215f4cc0SJerome Brunet help 377215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 378215f4cc0SJerome Brunet 3794235ff50SMiodrag Dinicconfig GOLDFISH_PIC 3804235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 3814235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 3824235ff50SMiodrag Dinic select IRQ_DOMAIN 3834235ff50SMiodrag Dinic help 3844235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 3854235ff50SMiodrag Dinic for Goldfish based virtual platforms. 3864235ff50SMiodrag Dinic 387f55c73aeSArchana Sathyakumarconfig QCOM_PDC 388f55c73aeSArchana Sathyakumar bool "QCOM PDC" 389f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 390f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 391f55c73aeSArchana Sathyakumar help 392f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 393f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 394f55c73aeSArchana Sathyakumar 395d8a5f5f7SGuo Renconfig CSKY_MPINTC 396d8a5f5f7SGuo Ren bool "C-SKY Multi Processor Interrupt Controller" 397d8a5f5f7SGuo Ren depends on CSKY 398d8a5f5f7SGuo Ren help 399d8a5f5f7SGuo Ren Say yes here to enable C-SKY SMP interrupt controller driver used 400d8a5f5f7SGuo Ren for C-SKY SMP system. 401d8a5f5f7SGuo Ren In fact it's not mmio map in hw and it use ld/st to visit the 402d8a5f5f7SGuo Ren controller's register inside CPU. 403d8a5f5f7SGuo Ren 404edff1b48SGuo Renconfig CSKY_APB_INTC 405edff1b48SGuo Ren bool "C-SKY APB Interrupt Controller" 406edff1b48SGuo Ren depends on CSKY 407edff1b48SGuo Ren help 408edff1b48SGuo Ren Say yes here to enable C-SKY APB interrupt controller driver used 409edff1b48SGuo Ren by C-SKY single core SOC system. It use mmio map apb-bus to visit 410edff1b48SGuo Ren the controller's register. 411edff1b48SGuo Ren 4120136afa0SLucas Stachconfig IMX_IRQSTEER 4130136afa0SLucas Stach bool "i.MX IRQSTEER support" 4140136afa0SLucas Stach depends on ARCH_MXC || COMPILE_TEST 4150136afa0SLucas Stach default ARCH_MXC 4160136afa0SLucas Stach select IRQ_DOMAIN 4170136afa0SLucas Stach help 4180136afa0SLucas Stach Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 4190136afa0SLucas Stach 4209e543e22SJiaxun Yangconfig LS1X_IRQ 4219e543e22SJiaxun Yang bool "Loongson-1 Interrupt Controller" 4229e543e22SJiaxun Yang depends on MACH_LOONGSON32 4239e543e22SJiaxun Yang default y 4249e543e22SJiaxun Yang select IRQ_DOMAIN 4259e543e22SJiaxun Yang select GENERIC_IRQ_CHIP 4269e543e22SJiaxun Yang help 4279e543e22SJiaxun Yang Support for the Loongson-1 platform Interrupt Controller. 4289e543e22SJiaxun Yang 429cd844b07SLokesh Vutlaconfig TI_SCI_INTR_IRQCHIP 430cd844b07SLokesh Vutla bool 431cd844b07SLokesh Vutla depends on TI_SCI_PROTOCOL 432cd844b07SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 433cd844b07SLokesh Vutla help 434cd844b07SLokesh Vutla This enables the irqchip driver support for K3 Interrupt router 435cd844b07SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 436cd844b07SLokesh Vutla If you wish to use interrupt router irq resources managed by the 437cd844b07SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 438cd844b07SLokesh Vutla 4399f1463b8SLokesh Vutlaconfig TI_SCI_INTA_IRQCHIP 4409f1463b8SLokesh Vutla bool 4419f1463b8SLokesh Vutla depends on TI_SCI_PROTOCOL 4429f1463b8SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 443f011df61SLokesh Vutla select TI_SCI_INTA_MSI_DOMAIN 4449f1463b8SLokesh Vutla help 4459f1463b8SLokesh Vutla This enables the irqchip driver support for K3 Interrupt aggregator 4469f1463b8SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 4479f1463b8SLokesh Vutla If you wish to use interrupt aggregator irq resources managed by the 4489f1463b8SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 4499f1463b8SLokesh Vutla 450c94fb639SRandy Dunlapendmenu 4518237f8bcSChristoph Hellwig 4528237f8bcSChristoph Hellwigconfig SIFIVE_PLIC 4538237f8bcSChristoph Hellwig bool "SiFive Platform-Level Interrupt Controller" 4548237f8bcSChristoph Hellwig depends on RISCV 4558237f8bcSChristoph Hellwig help 4568237f8bcSChristoph Hellwig This enables support for the PLIC chip found in SiFive (and 4578237f8bcSChristoph Hellwig potentially other) RISC-V systems. The PLIC controls devices 4588237f8bcSChristoph Hellwig interrupts and connects them to each core's local interrupt 4598237f8bcSChristoph Hellwig controller. Aside from timer and software interrupts, all other 4608237f8bcSChristoph Hellwig interrupt sources are subordinate to the PLIC. 4618237f8bcSChristoph Hellwig 4628237f8bcSChristoph Hellwig If you don't know what to do here, say Y. 463