xref: /linux/drivers/irqchip/Kconfig (revision e31793a3e51137a910b827b18e532d6c1fa54514)
1f6e916b8SThomas Petazzoniconfig IRQCHIP
2f6e916b8SThomas Petazzoni	def_bool y
3f6e916b8SThomas Petazzoni	depends on OF_IRQ
4f6e916b8SThomas Petazzoni
581243e44SRob Herringconfig ARM_GIC
681243e44SRob Herring	bool
781243e44SRob Herring	select IRQ_DOMAIN
89a1091efSYingjoe Chen	select IRQ_DOMAIN_HIERARCHY
981243e44SRob Herring	select MULTI_IRQ_HANDLER
100c9e4982SMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
1181243e44SRob Herring
129c8edddfSJon Hunterconfig ARM_GIC_PM
139c8edddfSJon Hunter	bool
149c8edddfSJon Hunter	depends on PM
159c8edddfSJon Hunter	select ARM_GIC
169c8edddfSJon Hunter	select PM_CLK
179c8edddfSJon Hunter
18a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR
19a27d21e0SLinus Walleij	int
20a27d21e0SLinus Walleij	default 2 if ARCH_REALVIEW
21a27d21e0SLinus Walleij	default 1
22a27d21e0SLinus Walleij
23853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M
24853a33ceSSuravee Suthikulpanit	bool
253ee80364SArnd Bergmann	depends on PCI
263ee80364SArnd Bergmann	select ARM_GIC
273ee80364SArnd Bergmann	select PCI_MSI
28853a33ceSSuravee Suthikulpanit
2981243e44SRob Herringconfig GIC_NON_BANKED
3081243e44SRob Herring	bool
3181243e44SRob Herring
32021f6537SMarc Zyngierconfig ARM_GIC_V3
33021f6537SMarc Zyngier	bool
34021f6537SMarc Zyngier	select IRQ_DOMAIN
35021f6537SMarc Zyngier	select MULTI_IRQ_HANDLER
36443acc4fSMarc Zyngier	select IRQ_DOMAIN_HIERARCHY
37e3825ba1SMarc Zyngier	select PARTITION_PERCPU
38956ae91aSMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
39021f6537SMarc Zyngier
4019812729SMarc Zyngierconfig ARM_GIC_V3_ITS
4119812729SMarc Zyngier	bool
423ee80364SArnd Bergmann	depends on PCI
433ee80364SArnd Bergmann	depends on PCI_MSI
44292ec080SUwe Kleine-König
4544430ec0SRob Herringconfig ARM_NVIC
4644430ec0SRob Herring	bool
4744430ec0SRob Herring	select IRQ_DOMAIN
482d9f59f7SStefan Agner	select IRQ_DOMAIN_HIERARCHY
4944430ec0SRob Herring	select GENERIC_IRQ_CHIP
5044430ec0SRob Herring
5144430ec0SRob Herringconfig ARM_VIC
5244430ec0SRob Herring	bool
5344430ec0SRob Herring	select IRQ_DOMAIN
5444430ec0SRob Herring	select MULTI_IRQ_HANDLER
5544430ec0SRob Herring
5644430ec0SRob Herringconfig ARM_VIC_NR
5744430ec0SRob Herring	int
5844430ec0SRob Herring	default 4 if ARCH_S5PV210
5944430ec0SRob Herring	default 2
6044430ec0SRob Herring	depends on ARM_VIC
6144430ec0SRob Herring	help
6244430ec0SRob Herring	  The maximum number of VICs available in the system, for
6344430ec0SRob Herring	  power management.
6444430ec0SRob Herring
65fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ
66fed6d336SThomas Petazzoni	bool
67fed6d336SThomas Petazzoni	select GENERIC_IRQ_CHIP
683ee80364SArnd Bergmann	select PCI_MSI if PCI
69*e31793a3SMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
70fed6d336SThomas Petazzoni
71e6b78f2cSAntoine Tenartconfig ALPINE_MSI
72e6b78f2cSAntoine Tenart	bool
733ee80364SArnd Bergmann	depends on PCI
743ee80364SArnd Bergmann	select PCI_MSI
75e6b78f2cSAntoine Tenart	select GENERIC_IRQ_CHIP
76e6b78f2cSAntoine Tenart
77b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ
78b1479ebbSBoris BREZILLON	bool
79b1479ebbSBoris BREZILLON	select GENERIC_IRQ_CHIP
80b1479ebbSBoris BREZILLON	select IRQ_DOMAIN
81b1479ebbSBoris BREZILLON	select MULTI_IRQ_HANDLER
82b1479ebbSBoris BREZILLON	select SPARSE_IRQ
83b1479ebbSBoris BREZILLON
84b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ
85b1479ebbSBoris BREZILLON	bool
86b1479ebbSBoris BREZILLON	select GENERIC_IRQ_CHIP
87b1479ebbSBoris BREZILLON	select IRQ_DOMAIN
88b1479ebbSBoris BREZILLON	select MULTI_IRQ_HANDLER
89b1479ebbSBoris BREZILLON	select SPARSE_IRQ
90b1479ebbSBoris BREZILLON
910509cfdeSRalf Baechleconfig I8259
920509cfdeSRalf Baechle	bool
930509cfdeSRalf Baechle	select IRQ_DOMAIN
940509cfdeSRalf Baechle
95c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ
96c7c42ec2SSimon Arlott	bool
97c7c42ec2SSimon Arlott	select GENERIC_IRQ_CHIP
98c7c42ec2SSimon Arlott	select IRQ_DOMAIN
99c7c42ec2SSimon Arlott
1005f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ
1015f7f0317SKevin Cernekee	bool
1025f7f0317SKevin Cernekee	select GENERIC_IRQ_CHIP
1035f7f0317SKevin Cernekee	select IRQ_DOMAIN
1045f7f0317SKevin Cernekee
105a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ
106a4fcbb86SKevin Cernekee	bool
107a4fcbb86SKevin Cernekee	select GENERIC_IRQ_CHIP
108a4fcbb86SKevin Cernekee	select IRQ_DOMAIN
109a4fcbb86SKevin Cernekee
1107f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ
1117f646e92SFlorian Fainelli	bool
1127f646e92SFlorian Fainelli	select GENERIC_IRQ_CHIP
1137f646e92SFlorian Fainelli	select IRQ_DOMAIN
1147f646e92SFlorian Fainelli
115350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL
116350d71b9SSebastian Hesselbarth	bool
117e1588490SJisheng Zhang	select GENERIC_IRQ_CHIP
118350d71b9SSebastian Hesselbarth	select IRQ_DOMAIN
119350d71b9SSebastian Hesselbarth
1206ee532e2SLinus Walleijconfig FARADAY_FTINTC010
1216ee532e2SLinus Walleij	bool
1226ee532e2SLinus Walleij	select IRQ_DOMAIN
1236ee532e2SLinus Walleij	select MULTI_IRQ_HANDLER
1246ee532e2SLinus Walleij	select SPARSE_IRQ
1256ee532e2SLinus Walleij
1269a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN
1279a7c4abdSMaJun	bool
1289a7c4abdSMaJun	select ARM_GIC_V3
1299a7c4abdSMaJun	select ARM_GIC_V3_ITS
1309a7c4abdSMaJun
131b6ef9161SJames Hoganconfig IMGPDC_IRQ
132b6ef9161SJames Hogan	bool
133b6ef9161SJames Hogan	select GENERIC_IRQ_CHIP
134b6ef9161SJames Hogan	select IRQ_DOMAIN
135b6ef9161SJames Hogan
13667e38cf2SRalf Baechleconfig IRQ_MIPS_CPU
13767e38cf2SRalf Baechle	bool
13867e38cf2SRalf Baechle	select GENERIC_IRQ_CHIP
1393838a547SPaul Burton	select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
14067e38cf2SRalf Baechle	select IRQ_DOMAIN
1413838a547SPaul Burton	select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
14267e38cf2SRalf Baechle
143afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP
144afc98d90SAlexander Shiyan	bool
145afc98d90SAlexander Shiyan	depends on ARCH_CLPS711X
146afc98d90SAlexander Shiyan	select IRQ_DOMAIN
147afc98d90SAlexander Shiyan	select MULTI_IRQ_HANDLER
148afc98d90SAlexander Shiyan	select SPARSE_IRQ
149afc98d90SAlexander Shiyan	default y
150afc98d90SAlexander Shiyan
1514db8e6d2SStefan Kristianssonconfig OR1K_PIC
1524db8e6d2SStefan Kristiansson	bool
1534db8e6d2SStefan Kristiansson	select IRQ_DOMAIN
1544db8e6d2SStefan Kristiansson
1558598066cSFelipe Balbiconfig OMAP_IRQCHIP
1568598066cSFelipe Balbi	bool
1578598066cSFelipe Balbi	select GENERIC_IRQ_CHIP
1588598066cSFelipe Balbi	select IRQ_DOMAIN
1598598066cSFelipe Balbi
1609dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP
1619dbd90f1SSebastian Hesselbarth	bool
1629dbd90f1SSebastian Hesselbarth	select IRQ_DOMAIN
1639dbd90f1SSebastian Hesselbarth	select MULTI_IRQ_HANDLER
1649dbd90f1SSebastian Hesselbarth
165aaa8666aSCristian Birsanconfig PIC32_EVIC
166aaa8666aSCristian Birsan	bool
167aaa8666aSCristian Birsan	select GENERIC_IRQ_CHIP
168aaa8666aSCristian Birsan	select IRQ_DOMAIN
169aaa8666aSCristian Birsan
170981b58f6SRich Felkerconfig JCORE_AIC
1713602ffdeSRich Felker	bool "J-Core integrated AIC" if COMPILE_TEST
1723602ffdeSRich Felker	depends on OF
173981b58f6SRich Felker	select IRQ_DOMAIN
174981b58f6SRich Felker	help
175981b58f6SRich Felker	  Support for the J-Core integrated AIC.
176981b58f6SRich Felker
17744358048SMagnus Dammconfig RENESAS_INTC_IRQPIN
17844358048SMagnus Damm	bool
17944358048SMagnus Damm	select IRQ_DOMAIN
18044358048SMagnus Damm
181fbc83b7fSMagnus Dammconfig RENESAS_IRQC
182fbc83b7fSMagnus Damm	bool
18399c221dfSMagnus Damm	select GENERIC_IRQ_CHIP
184fbc83b7fSMagnus Damm	select IRQ_DOMAIN
185fbc83b7fSMagnus Damm
18607088484SLee Jonesconfig ST_IRQCHIP
18707088484SLee Jones	bool
18807088484SLee Jones	select REGMAP
18907088484SLee Jones	select MFD_SYSCON
19007088484SLee Jones	help
19107088484SLee Jones	  Enables SysCfg Controlled IRQs on STi based platforms.
19207088484SLee Jones
1934bba6689SMans Rullgardconfig TANGO_IRQ
1944bba6689SMans Rullgard	bool
1954bba6689SMans Rullgard	select IRQ_DOMAIN
1964bba6689SMans Rullgard	select GENERIC_IRQ_CHIP
1974bba6689SMans Rullgard
198b06eb017SChristian Ruppertconfig TB10X_IRQC
199b06eb017SChristian Ruppert	bool
200b06eb017SChristian Ruppert	select IRQ_DOMAIN
201b06eb017SChristian Ruppert	select GENERIC_IRQ_CHIP
202b06eb017SChristian Ruppert
203d01f8633SDamien Riegelconfig TS4800_IRQ
204d01f8633SDamien Riegel	tristate "TS-4800 IRQ controller"
205d01f8633SDamien Riegel	select IRQ_DOMAIN
2060df337cfSRichard Weinberger	depends on HAS_IOMEM
207d2b383dcSJean Delvare	depends on SOC_IMX51 || COMPILE_TEST
208d01f8633SDamien Riegel	help
209d01f8633SDamien Riegel	  Support for the TS-4800 FPGA IRQ controller
210d01f8633SDamien Riegel
2112389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ
2122389d501SLinus Walleij	bool
2132389d501SLinus Walleij	select IRQ_DOMAIN
2142389d501SLinus Walleij
2152389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR
2162389d501SLinus Walleij       int
2172389d501SLinus Walleij       default 4
2182389d501SLinus Walleij       depends on VERSATILE_FPGA_IRQ
21926a8e96aSMax Filippov
22026a8e96aSMax Filippovconfig XTENSA_MX
22126a8e96aSMax Filippov	bool
22226a8e96aSMax Filippov	select IRQ_DOMAIN
22396ca848eSSricharan R
2240547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC
2250547dc78SZubair Lutfullah Kakakhel	bool
2260547dc78SZubair Lutfullah Kakakhel	select IRQ_DOMAIN
2270547dc78SZubair Lutfullah Kakakhel
22896ca848eSSricharan Rconfig IRQ_CROSSBAR
22996ca848eSSricharan R	bool
23096ca848eSSricharan R	help
231f54619f2SMasanari Iida	  Support for a CROSSBAR ip that precedes the main interrupt controller.
23296ca848eSSricharan R	  The primary irqchip invokes the crossbar's callback which inturn allocates
23396ca848eSSricharan R	  a free irq and configures the IP. Thus the peripheral interrupts are
23496ca848eSSricharan R	  routed to one of the free irqchip interrupt lines.
23589323f8cSGrygorii Strashko
23689323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ
23789323f8cSGrygorii Strashko	tristate "Keystone 2 IRQ controller IP"
23889323f8cSGrygorii Strashko	depends on ARCH_KEYSTONE
23989323f8cSGrygorii Strashko	help
24089323f8cSGrygorii Strashko		Support for Texas Instruments Keystone 2 IRQ controller IP which
24189323f8cSGrygorii Strashko		is part of the Keystone 2 IPC mechanism
2428a19b8f1SAndrew Bresticker
2438a19b8f1SAndrew Brestickerconfig MIPS_GIC
2448a19b8f1SAndrew Bresticker	bool
245bb11cff3SQais Yousef	select GENERIC_IRQ_IPI
2462af70a96SQais Yousef	select IRQ_DOMAIN_HIERARCHY
2478a19b8f1SAndrew Bresticker	select MIPS_CM
2488a764482SYoshinori Sato
24944e08e70SPaul Burtonconfig INGENIC_IRQ
25044e08e70SPaul Burton	bool
25144e08e70SPaul Burton	depends on MACH_INGENIC
25244e08e70SPaul Burton	default y
25378c10e55SLinus Torvalds
2548a764482SYoshinori Satoconfig RENESAS_H8300H_INTC
2558a764482SYoshinori Sato        bool
2568a764482SYoshinori Sato	select IRQ_DOMAIN
2578a764482SYoshinori Sato
2588a764482SYoshinori Satoconfig RENESAS_H8S_INTC
2598a764482SYoshinori Sato        bool
2608a764482SYoshinori Sato	select IRQ_DOMAIN
261e324c4dcSShenwei Wang
262e324c4dcSShenwei Wangconfig IMX_GPCV2
263e324c4dcSShenwei Wang	bool
264e324c4dcSShenwei Wang	select IRQ_DOMAIN
265e324c4dcSShenwei Wang	help
266e324c4dcSShenwei Wang	  Enables the wakeup IRQs for IMX platforms with GPCv2 block
2677e4ac676SOleksij Rempel
2687e4ac676SOleksij Rempelconfig IRQ_MXS
2697e4ac676SOleksij Rempel	def_bool y if MACH_ASM9260 || ARCH_MXS
2707e4ac676SOleksij Rempel	select IRQ_DOMAIN
2717e4ac676SOleksij Rempel	select STMP_DEVICE
272c27f29bbSThomas Petazzoni
273a68a63cbSThomas Petazzoniconfig MVEBU_GICP
274a68a63cbSThomas Petazzoni	bool
275a68a63cbSThomas Petazzoni
276e0de91a9SThomas Petazzoniconfig MVEBU_ICU
277e0de91a9SThomas Petazzoni	bool
278e0de91a9SThomas Petazzoni
279c27f29bbSThomas Petazzoniconfig MVEBU_ODMI
280c27f29bbSThomas Petazzoni	bool
281fa23b9d1SArnd Bergmann	select GENERIC_MSI_IRQ_DOMAIN
2829e2c986cSMarc Zyngier
283a109893bSThomas Petazzoniconfig MVEBU_PIC
284a109893bSThomas Petazzoni	bool
285a109893bSThomas Petazzoni
286b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI
287b8f3ebe6SMinghuan Lian	def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
288b8f3ebe6SMinghuan Lian	depends on PCI && PCI_MSI
289b8f3ebe6SMinghuan Lian
2909e2c986cSMarc Zyngierconfig PARTITION_PERCPU
2919e2c986cSMarc Zyngier	bool
2920efacbbaSLinus Torvalds
29344df427cSNoam Camusconfig EZNPS_GIC
29444df427cSNoam Camus	bool "NPS400 Global Interrupt Manager (GIM)"
295ffd565e3SArnd Bergmann	depends on ARC || (COMPILE_TEST && !64BIT)
29644df427cSNoam Camus	select IRQ_DOMAIN
29744df427cSNoam Camus	help
29844df427cSNoam Camus	  Support the EZchip NPS400 global interrupt controller
299e0720416SAlexandre TORGUE
300e0720416SAlexandre TORGUEconfig STM32_EXTI
301e0720416SAlexandre TORGUE	bool
302e0720416SAlexandre TORGUE	select IRQ_DOMAIN
303f20cc9b0SAgustin Vega-Frias
304f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER
305f20cc9b0SAgustin Vega-Frias	bool "QCOM IRQ combiner support"
306f20cc9b0SAgustin Vega-Frias	depends on ARCH_QCOM && ACPI
307f20cc9b0SAgustin Vega-Frias	select IRQ_DOMAIN
308f20cc9b0SAgustin Vega-Frias	select IRQ_DOMAIN_HIERARCHY
309f20cc9b0SAgustin Vega-Frias	help
310f20cc9b0SAgustin Vega-Frias	  Say yes here to add support for the IRQ combiner devices embedded
311f20cc9b0SAgustin Vega-Frias	  in Qualcomm Technologies chips.
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