1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2c94fb639SRandy Dunlapmenu "IRQ chip support" 3c94fb639SRandy Dunlap 4f6e916b8SThomas Petazzoniconfig IRQCHIP 5f6e916b8SThomas Petazzoni def_bool y 6612d5494SHuacai Chen depends on (OF_IRQ || ACPI_GENERIC_GSI) 7f6e916b8SThomas Petazzoni 881243e44SRob Herringconfig ARM_GIC 981243e44SRob Herring bool 10dee23403SMarc Zyngier depends on OF 119a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 120e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1381243e44SRob Herring 149c8edddfSJon Hunterconfig ARM_GIC_PM 159c8edddfSJon Hunter bool 169c8edddfSJon Hunter depends on PM 179c8edddfSJon Hunter select ARM_GIC 189c8edddfSJon Hunter 19a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 20a27d21e0SLinus Walleij int 2170265523SJiangfeng Xiao depends on ARM_GIC 22a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 23a27d21e0SLinus Walleij default 1 24a27d21e0SLinus Walleij 25853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 26853a33ceSSuravee Suthikulpanit bool 273ee80364SArnd Bergmann depends on PCI 283ee80364SArnd Bergmann select ARM_GIC 2974e44454SThomas Gleixner select IRQ_MSI_LIB 303ee80364SArnd Bergmann select PCI_MSI 31853a33ceSSuravee Suthikulpanit 3281243e44SRob Herringconfig GIC_NON_BANKED 3381243e44SRob Herring bool 3481243e44SRob Herring 35021f6537SMarc Zyngierconfig ARM_GIC_V3 36021f6537SMarc Zyngier bool 37443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 38e3825ba1SMarc Zyngier select PARTITION_PERCPU 390e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 4035727af2SShanker Donthineni select HAVE_ARM_SMCCC_DISCOVERY 41021f6537SMarc Zyngier 4219812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4319812729SMarc Zyngier bool 4413e7accbSThomas Gleixner select GENERIC_MSI_IRQ 4548f71d56SThomas Gleixner select IRQ_MSI_LIB 4629f41139SMarc Zyngier default ARM_GIC_V3 4729f41139SMarc Zyngier 487afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 497afe031cSBogdan Purcareata bool 507afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 517afe031cSBogdan Purcareata depends on FSL_MC_BUS 527afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 537afe031cSBogdan Purcareata 54292ec080SUwe Kleine-Königconfig ARM_NVIC 55292ec080SUwe Kleine-König bool 562d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 57292ec080SUwe Kleine-König select GENERIC_IRQ_CHIP 58292ec080SUwe Kleine-König 5944430ec0SRob Herringconfig ARM_VIC 6044430ec0SRob Herring bool 6144430ec0SRob Herring select IRQ_DOMAIN 6244430ec0SRob Herring 6344430ec0SRob Herringconfig ARM_VIC_NR 6444430ec0SRob Herring int 6544430ec0SRob Herring default 4 if ARCH_S5PV210 6644430ec0SRob Herring default 2 6744430ec0SRob Herring depends on ARM_VIC 6844430ec0SRob Herring help 6944430ec0SRob Herring The maximum number of VICs available in the system, for 7044430ec0SRob Herring power management. 7144430ec0SRob Herring 7272e257c6SThomas Gleixnerconfig IRQ_MSI_LIB 7372e257c6SThomas Gleixner bool 7472e257c6SThomas Gleixner 75fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 76fed6d336SThomas Petazzoni bool 77fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 783ee80364SArnd Bergmann select PCI_MSI if PCI 790e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 80fed6d336SThomas Petazzoni 81e6b78f2cSAntoine Tenartconfig ALPINE_MSI 82e6b78f2cSAntoine Tenart bool 833ee80364SArnd Bergmann depends on PCI 843ee80364SArnd Bergmann select PCI_MSI 85e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 86e6b78f2cSAntoine Tenart 871eb77c3bSTalel Shenharconfig AL_FIC 881eb77c3bSTalel Shenhar bool "Amazon's Annapurna Labs Fabric Interrupt Controller" 899869f37aSJean Delvare depends on OF 9035e0cd77SBaoquan He depends on HAS_IOMEM 911eb77c3bSTalel Shenhar select GENERIC_IRQ_CHIP 921eb77c3bSTalel Shenhar select IRQ_DOMAIN 931eb77c3bSTalel Shenhar help 941eb77c3bSTalel Shenhar Support Amazon's Annapurna Labs Fabric Interrupt Controller. 951eb77c3bSTalel Shenhar 96b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 97b1479ebbSBoris BREZILLON bool 98b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 99b1479ebbSBoris BREZILLON select IRQ_DOMAIN 100b1479ebbSBoris BREZILLON select SPARSE_IRQ 101b1479ebbSBoris BREZILLON 102b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 103b1479ebbSBoris BREZILLON bool 104b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 105b1479ebbSBoris BREZILLON select IRQ_DOMAIN 106b1479ebbSBoris BREZILLON select SPARSE_IRQ 107b1479ebbSBoris BREZILLON 1080509cfdeSRalf Baechleconfig I8259 1090509cfdeSRalf Baechle bool 1100509cfdeSRalf Baechle select IRQ_DOMAIN 1110509cfdeSRalf Baechle 112c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 113c7c42ec2SSimon Arlott bool 114c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 115c7c42ec2SSimon Arlott select IRQ_DOMAIN 1160e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 117c7c42ec2SSimon Arlott 1185f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 119c057c799SFlorian Fainelli tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" 120c057c799SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 121c057c799SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 1225f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1235f7f0317SKevin Cernekee select IRQ_DOMAIN 1240e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1255f7f0317SKevin Cernekee 126a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 1273ac268d5SFlorian Fainelli tristate "Broadcom STB 7120-style L2 interrupt controller driver" 1283ac268d5SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 1293ac268d5SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 130a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 131a4fcbb86SKevin Cernekee select IRQ_DOMAIN 132a4fcbb86SKevin Cernekee 1337f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 13451d9db5cSFlorian Fainelli tristate "Broadcom STB generic L2 interrupt controller driver" 13551d9db5cSFlorian Fainelli depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 13651d9db5cSFlorian Fainelli default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 1377f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1387f646e92SFlorian Fainelli select IRQ_DOMAIN 1397f646e92SFlorian Fainelli 1400fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC 1410fc3d74cSBartosz Golaszewski bool 1420fc3d74cSBartosz Golaszewski select GENERIC_IRQ_CHIP 1430fc3d74cSBartosz Golaszewski select IRQ_DOMAIN 1440fc3d74cSBartosz Golaszewski 145350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 146be5e5f3aSThomas Gleixner bool 147e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 14854a38440SZhen Lei select IRQ_DOMAIN_HIERARCHY 149350d71b9SSebastian Hesselbarth 1506ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1516ee532e2SLinus Walleij bool 1526ee532e2SLinus Walleij select IRQ_DOMAIN 1536ee532e2SLinus Walleij select SPARSE_IRQ 1546ee532e2SLinus Walleij 1559a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1569a7c4abdSMaJun bool 1579a7c4abdSMaJun select ARM_GIC_V3 1589a7c4abdSMaJun select ARM_GIC_V3_ITS 1599a7c4abdSMaJun 160b6ef9161SJames Hoganconfig IMGPDC_IRQ 161b6ef9161SJames Hogan bool 162b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 163b6ef9161SJames Hogan select IRQ_DOMAIN 164b6ef9161SJames Hogan 1655b978c10SLinus Walleijconfig IXP4XX_IRQ 1665b978c10SLinus Walleij bool 1675b978c10SLinus Walleij select IRQ_DOMAIN 1685b978c10SLinus Walleij select SPARSE_IRQ 1695b978c10SLinus Walleij 1703e3a7b35SHerve Codinaconfig LAN966X_OIC 1713e3a7b35SHerve Codina tristate "Microchip LAN966x OIC Support" 172*e06c9e36SGeert Uytterhoeven depends on MCHP_LAN966X_PCI || COMPILE_TEST 1733e3a7b35SHerve Codina select GENERIC_IRQ_CHIP 1743e3a7b35SHerve Codina select IRQ_DOMAIN 1753e3a7b35SHerve Codina help 1763e3a7b35SHerve Codina Enable support for the LAN966x Outbound Interrupt Controller. 1773e3a7b35SHerve Codina This controller is present on the Microchip LAN966x PCI device and 1783e3a7b35SHerve Codina maps the internal interrupts sources to PCIe interrupt. 1793e3a7b35SHerve Codina 1803e3a7b35SHerve Codina To compile this driver as a module, choose M here: the module 1813e3a7b35SHerve Codina will be called irq-lan966x-oic. 1823e3a7b35SHerve Codina 183da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ 184da0abe1aSRichard Fitzgerald tristate 185da0abe1aSRichard Fitzgerald 18667e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 18767e38cf2SRalf Baechle bool 18867e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1890f5209feSSamuel Holland select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING 19067e38cf2SRalf Baechle select IRQ_DOMAIN 1910e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 19267e38cf2SRalf Baechle 193afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 194afc98d90SAlexander Shiyan bool 195afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 196afc98d90SAlexander Shiyan select IRQ_DOMAIN 197afc98d90SAlexander Shiyan select SPARSE_IRQ 198afc98d90SAlexander Shiyan default y 199afc98d90SAlexander Shiyan 2009b54470aSStafford Horneconfig OMPIC 2019b54470aSStafford Horne bool 2029b54470aSStafford Horne 2034db8e6d2SStefan Kristianssonconfig OR1K_PIC 2044db8e6d2SStefan Kristiansson bool 2054db8e6d2SStefan Kristiansson select IRQ_DOMAIN 2064db8e6d2SStefan Kristiansson 2078598066cSFelipe Balbiconfig OMAP_IRQCHIP 2088598066cSFelipe Balbi bool 2098598066cSFelipe Balbi select GENERIC_IRQ_CHIP 2108598066cSFelipe Balbi select IRQ_DOMAIN 2118598066cSFelipe Balbi 2129dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 2139dbd90f1SSebastian Hesselbarth bool 2149dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 2159dbd90f1SSebastian Hesselbarth 216aaa8666aSCristian Birsanconfig PIC32_EVIC 217aaa8666aSCristian Birsan bool 218aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 219aaa8666aSCristian Birsan select IRQ_DOMAIN 220aaa8666aSCristian Birsan 221981b58f6SRich Felkerconfig JCORE_AIC 2223602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 2233602ffdeSRich Felker depends on OF 224981b58f6SRich Felker select IRQ_DOMAIN 225981b58f6SRich Felker help 226981b58f6SRich Felker Support for the J-Core integrated AIC. 227981b58f6SRich Felker 228d852e62aSManivannan Sadhasivamconfig RDA_INTC 229d852e62aSManivannan Sadhasivam bool 230d852e62aSManivannan Sadhasivam select IRQ_DOMAIN 231d852e62aSManivannan Sadhasivam 23244358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 23302d7e041SGeert Uytterhoeven bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 23444358048SMagnus Damm select IRQ_DOMAIN 23502d7e041SGeert Uytterhoeven help 23602d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 23702d7e041SGeert Uytterhoeven interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 23844358048SMagnus Damm 239fbc83b7fSMagnus Dammconfig RENESAS_IRQC 24072d44c0cSLad Prabhakar bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 24199c221dfSMagnus Damm select GENERIC_IRQ_CHIP 242fbc83b7fSMagnus Damm select IRQ_DOMAIN 24302d7e041SGeert Uytterhoeven help 24402d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 24572d44c0cSLad Prabhakar devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 246fbc83b7fSMagnus Damm 247a644ccb8SGeert Uytterhoevenconfig RENESAS_RZA1_IRQC 24802d7e041SGeert Uytterhoeven bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST 249a644ccb8SGeert Uytterhoeven select IRQ_DOMAIN_HIERARCHY 25002d7e041SGeert Uytterhoeven help 25102d7e041SGeert Uytterhoeven Enable support for the Renesas RZ/A1 Interrupt Controller, to use up 25202d7e041SGeert Uytterhoeven to 8 external interrupts with configurable sense select. 253a644ccb8SGeert Uytterhoeven 2543fed0955SLad Prabhakarconfig RENESAS_RZG2L_IRQC 2553fed0955SLad Prabhakar bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST 2563fed0955SLad Prabhakar select GENERIC_IRQ_CHIP 2573fed0955SLad Prabhakar select IRQ_DOMAIN_HIERARCHY 2583fed0955SLad Prabhakar help 2593fed0955SLad Prabhakar Enable support for the Renesas RZ/G2L (and alike SoC) Interrupt Controller 2603fed0955SLad Prabhakar for external devices. 2613fed0955SLad Prabhakar 2620d7605e7SFabrizio Castroconfig RENESAS_RZV2H_ICU 2630d7605e7SFabrizio Castro bool "Renesas RZ/V2H(P) ICU support" if COMPILE_TEST 2640d7605e7SFabrizio Castro select GENERIC_IRQ_CHIP 2650d7605e7SFabrizio Castro select IRQ_DOMAIN_HIERARCHY 2660d7605e7SFabrizio Castro help 2670d7605e7SFabrizio Castro Enable support for the Renesas RZ/V2H(P) Interrupt Control Unit (ICU) 2680d7605e7SFabrizio Castro 26903ac990eSMichael Walleconfig SL28CPLD_INTC 27003ac990eSMichael Walle bool "Kontron sl28cpld IRQ controller" 27103ac990eSMichael Walle depends on MFD_SL28CPLD=y || COMPILE_TEST 27203ac990eSMichael Walle select REGMAP_IRQ 27303ac990eSMichael Walle help 27403ac990eSMichael Walle Interrupt controller driver for the board management controller 27503ac990eSMichael Walle found on the Kontron sl28 CPLD. 27603ac990eSMichael Walle 27707088484SLee Jonesconfig ST_IRQCHIP 27807088484SLee Jones bool 27907088484SLee Jones select REGMAP 28007088484SLee Jones select MFD_SYSCON 28107088484SLee Jones help 28207088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 28307088484SLee Jones 284d421fd6dSSamuel Hollandconfig SUN4I_INTC 285d421fd6dSSamuel Holland bool 286d421fd6dSSamuel Holland 287d421fd6dSSamuel Hollandconfig SUN6I_R_INTC 288d421fd6dSSamuel Holland bool 289d421fd6dSSamuel Holland select IRQ_DOMAIN_HIERARCHY 290d421fd6dSSamuel Holland select IRQ_FASTEOI_HIERARCHY_HANDLERS 291d421fd6dSSamuel Holland 292d421fd6dSSamuel Hollandconfig SUNXI_NMI_INTC 293d421fd6dSSamuel Holland bool 294d421fd6dSSamuel Holland select GENERIC_IRQ_CHIP 295d421fd6dSSamuel Holland 296b06eb017SChristian Ruppertconfig TB10X_IRQC 297b06eb017SChristian Ruppert bool 298b06eb017SChristian Ruppert select IRQ_DOMAIN 299b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 300b06eb017SChristian Ruppert 301d01f8633SDamien Riegelconfig TS4800_IRQ 302d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 303d01f8633SDamien Riegel select IRQ_DOMAIN 3040df337cfSRichard Weinberger depends on HAS_IOMEM 305d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 306d01f8633SDamien Riegel help 307d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 308d01f8633SDamien Riegel 3092389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 3102389d501SLinus Walleij bool 3112389d501SLinus Walleij select IRQ_DOMAIN 3122389d501SLinus Walleij 3132389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 3142389d501SLinus Walleij int 3152389d501SLinus Walleij default 4 3162389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 31726a8e96aSMax Filippov 31826a8e96aSMax Filippovconfig XTENSA_MX 31926a8e96aSMax Filippov bool 32026a8e96aSMax Filippov select IRQ_DOMAIN 3210e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 32296ca848eSSricharan R 3230547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 324debf69cfSRobert Hancock bool "Xilinx Interrupt Controller IP" 325fd31000dSJamie Iles depends on OF_ADDRESS 3260547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 327debf69cfSRobert Hancock help 328debf69cfSRobert Hancock Support for the Xilinx Interrupt Controller IP core. 329debf69cfSRobert Hancock This is used as a primary controller with MicroBlaze and can also 330debf69cfSRobert Hancock be used as a secondary chained controller on other platforms. 3310547dc78SZubair Lutfullah Kakakhel 33296ca848eSSricharan Rconfig IRQ_CROSSBAR 33396ca848eSSricharan R bool 33496ca848eSSricharan R help 335f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 33696ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 33796ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 33896ca848eSSricharan R routed to one of the free irqchip interrupt lines. 33989323f8cSGrygorii Strashko 34089323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 34189323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 34289323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 34389323f8cSGrygorii Strashko help 34489323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 34589323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 3468a19b8f1SAndrew Bresticker 3478a19b8f1SAndrew Brestickerconfig MIPS_GIC 3488a19b8f1SAndrew Bresticker bool 3490053892fSNathan Chancellor select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 3508190cc57SSamuel Holland select GENERIC_IRQ_IPI if SMP 3518190cc57SSamuel Holland select IRQ_DOMAIN_HIERARCHY 3528a19b8f1SAndrew Bresticker select MIPS_CM 3538a764482SYoshinori Sato 35444e08e70SPaul Burtonconfig INGENIC_IRQ 35544e08e70SPaul Burton bool 35644e08e70SPaul Burton depends on MACH_INGENIC 35744e08e70SPaul Burton default y 35878c10e55SLinus Torvalds 3599536eba0SPaul Cercueilconfig INGENIC_TCU_IRQ 3609536eba0SPaul Cercueil bool "Ingenic JZ47xx TCU interrupt controller" 3619536eba0SPaul Cercueil default MACH_INGENIC 3629536eba0SPaul Cercueil depends on MIPS || COMPILE_TEST 3639536eba0SPaul Cercueil select MFD_SYSCON 3648084499bSYueHaibing select GENERIC_IRQ_CHIP 3659536eba0SPaul Cercueil help 3669536eba0SPaul Cercueil Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic 3679536eba0SPaul Cercueil JZ47xx SoCs. 3689536eba0SPaul Cercueil 3699536eba0SPaul Cercueil If unsure, say N. 3709536eba0SPaul Cercueil 371e324c4dcSShenwei Wangconfig IMX_GPCV2 372e324c4dcSShenwei Wang bool 373e324c4dcSShenwei Wang select IRQ_DOMAIN 374e324c4dcSShenwei Wang help 375e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 3767e4ac676SOleksij Rempel 3777e4ac676SOleksij Rempelconfig IRQ_MXS 3787e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 3797e4ac676SOleksij Rempel select IRQ_DOMAIN 3807e4ac676SOleksij Rempel select STMP_DEVICE 381c27f29bbSThomas Petazzoni 38219d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 38319d99164SAlexandre Belloni bool 38419d99164SAlexandre Belloni select IRQ_DOMAIN 38519d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 38619d99164SAlexandre Belloni 387a68a63cbSThomas Petazzoniconfig MVEBU_GICP 388cdb23872SThomas Gleixner select IRQ_MSI_LIB 389a68a63cbSThomas Petazzoni bool 390a68a63cbSThomas Petazzoni 391e0de91a9SThomas Petazzoniconfig MVEBU_ICU 392e0de91a9SThomas Petazzoni bool 393e0de91a9SThomas Petazzoni 394c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 395c27f29bbSThomas Petazzoni bool 396e0b99c4cSThomas Gleixner select IRQ_MSI_LIB 39713e7accbSThomas Gleixner select GENERIC_MSI_IRQ 3989e2c986cSMarc Zyngier 399a109893bSThomas Petazzoniconfig MVEBU_PIC 400a109893bSThomas Petazzoni bool 401a109893bSThomas Petazzoni 40261ce8d8dSMiquel Raynalconfig MVEBU_SEI 40361ce8d8dSMiquel Raynal bool 40461ce8d8dSMiquel Raynal 4050dcd9f87SRasmus Villemoesconfig LS_EXTIRQ 4060dcd9f87SRasmus Villemoes def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 4070dcd9f87SRasmus Villemoes select MFD_SYSCON 4080dcd9f87SRasmus Villemoes 409b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 410b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 4119c1a7bfcSLukas Bulwahn depends on PCI_MSI 412b8f3ebe6SMinghuan Lian 4139e2c986cSMarc Zyngierconfig PARTITION_PERCPU 4149e2c986cSMarc Zyngier bool 4150efacbbaSLinus Torvalds 416b20cf2dcSAntonio Borneoconfig STM32MP_EXTI 4170be58e05SAntonio Borneo tristate "STM32MP extended interrupts and event controller" 4180be58e05SAntonio Borneo depends on (ARCH_STM32 && !ARM_SINGLE_ARMV7M) || COMPILE_TEST 4199151299eSGeert Uytterhoeven default ARCH_STM32 && !ARM_SINGLE_ARMV7M 4200be58e05SAntonio Borneo select IRQ_DOMAIN_HIERARCHY 421350755e2SAntonio Borneo select GENERIC_IRQ_CHIP 4220be58e05SAntonio Borneo help 4230be58e05SAntonio Borneo Support STM32MP EXTI (extended interrupts and event) controller. 424b20cf2dcSAntonio Borneo 425e0720416SAlexandre TORGUEconfig STM32_EXTI 426e0720416SAlexandre TORGUE bool 427e0720416SAlexandre TORGUE select IRQ_DOMAIN 4280e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 429f20cc9b0SAgustin Vega-Frias 430f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 431f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 432f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 433f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 434f20cc9b0SAgustin Vega-Frias help 435f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 436f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 4375ed34d3aSMasahiro Yamada 4385ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 4395ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 4405ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 4415ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 4425ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 4435ed34d3aSMasahiro Yamada help 4445ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 445c94fb639SRandy Dunlap 446215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 447a947aa00SNeil Armstrong tristate "Meson GPIO Interrupt Multiplexer" 448a947aa00SNeil Armstrong depends on ARCH_MESON || COMPILE_TEST 449a947aa00SNeil Armstrong default ARCH_MESON 450215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 451215f4cc0SJerome Brunet help 452215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 453215f4cc0SJerome Brunet 4544235ff50SMiodrag Dinicconfig GOLDFISH_PIC 4554235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 4564235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 457969ac78dSRandy Dunlap select GENERIC_IRQ_CHIP 4584235ff50SMiodrag Dinic select IRQ_DOMAIN 4594235ff50SMiodrag Dinic help 4604235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 4614235ff50SMiodrag Dinic for Goldfish based virtual platforms. 4624235ff50SMiodrag Dinic 463f55c73aeSArchana Sathyakumarconfig QCOM_PDC 4644acd8a4bSSaravana Kannan tristate "QCOM PDC" 465f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 466f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 467f55c73aeSArchana Sathyakumar help 468f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 469f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 470f55c73aeSArchana Sathyakumar 471a6199bb5SShawn Guoconfig QCOM_MPM 472a6199bb5SShawn Guo tristate "QCOM MPM" 473a6199bb5SShawn Guo depends on ARCH_QCOM 474fa4dcc88SYueHaibing depends on MAILBOX 475a6199bb5SShawn Guo select IRQ_DOMAIN_HIERARCHY 476a6199bb5SShawn Guo help 477a6199bb5SShawn Guo MSM Power Manager driver to manage and configure wakeup 478a6199bb5SShawn Guo IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 479a6199bb5SShawn Guo 480d8a5f5f7SGuo Renconfig CSKY_MPINTC 481be1abc5bSGuo Ren bool 482d8a5f5f7SGuo Ren depends on CSKY 483d8a5f5f7SGuo Ren help 484d8a5f5f7SGuo Ren Say yes here to enable C-SKY SMP interrupt controller driver used 485d8a5f5f7SGuo Ren for C-SKY SMP system. 486656b42deSRandy Dunlap In fact it's not mmio map in hardware and it uses ld/st to visit the 487d8a5f5f7SGuo Ren controller's register inside CPU. 488d8a5f5f7SGuo Ren 489edff1b48SGuo Renconfig CSKY_APB_INTC 490edff1b48SGuo Ren bool "C-SKY APB Interrupt Controller" 491edff1b48SGuo Ren depends on CSKY 492edff1b48SGuo Ren help 493edff1b48SGuo Ren Say yes here to enable C-SKY APB interrupt controller driver used 494656b42deSRandy Dunlap by C-SKY single core SOC system. It uses mmio map apb-bus to visit 495edff1b48SGuo Ren the controller's register. 496edff1b48SGuo Ren 4970136afa0SLucas Stachconfig IMX_IRQSTEER 4980136afa0SLucas Stach bool "i.MX IRQSTEER support" 4990136afa0SLucas Stach depends on ARCH_MXC || COMPILE_TEST 5000136afa0SLucas Stach default ARCH_MXC 5010136afa0SLucas Stach select IRQ_DOMAIN 5020136afa0SLucas Stach help 5030136afa0SLucas Stach Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 5040136afa0SLucas Stach 5052fbb1396SJoakim Zhangconfig IMX_INTMUX 506a890caebSGeert Uytterhoeven bool "i.MX INTMUX support" if COMPILE_TEST 507a890caebSGeert Uytterhoeven default y if ARCH_MXC 5082fbb1396SJoakim Zhang select IRQ_DOMAIN 5092fbb1396SJoakim Zhang help 5102fbb1396SJoakim Zhang Support for the i.MX INTMUX interrupt multiplexer. 5112fbb1396SJoakim Zhang 51270afdab9SFrank Liconfig IMX_MU_MSI 51370afdab9SFrank Li tristate "i.MX MU used as MSI controller" 51470afdab9SFrank Li depends on OF && HAS_IOMEM 5156c9f7434SGeert Uytterhoeven depends on ARCH_MXC || COMPILE_TEST 51670afdab9SFrank Li default m if ARCH_MXC 51770afdab9SFrank Li select IRQ_DOMAIN 51870afdab9SFrank Li select IRQ_DOMAIN_HIERARCHY 51913e7accbSThomas Gleixner select GENERIC_MSI_IRQ 5207b2f8aa0SThomas Gleixner select IRQ_MSI_LIB 52170afdab9SFrank Li help 5226c9f7434SGeert Uytterhoeven Provide a driver for the i.MX Messaging Unit block used as a 5236c9f7434SGeert Uytterhoeven CPU-to-CPU MSI controller. This requires a specially crafted DT 5246c9f7434SGeert Uytterhoeven to make use of this driver. 52570afdab9SFrank Li 52670afdab9SFrank Li If unsure, say N 52770afdab9SFrank Li 5289e543e22SJiaxun Yangconfig LS1X_IRQ 5299e543e22SJiaxun Yang bool "Loongson-1 Interrupt Controller" 5309e543e22SJiaxun Yang depends on MACH_LOONGSON32 5319e543e22SJiaxun Yang default y 5329e543e22SJiaxun Yang select IRQ_DOMAIN 5339e543e22SJiaxun Yang select GENERIC_IRQ_CHIP 5349e543e22SJiaxun Yang help 5359e543e22SJiaxun Yang Support for the Loongson-1 platform Interrupt Controller. 5369e543e22SJiaxun Yang 537cd844b07SLokesh Vutlaconfig TI_SCI_INTR_IRQCHIP 5382d95ffaeSNicolas Frayer tristate "TI SCI INTR Interrupt Controller" 539cd844b07SLokesh Vutla depends on TI_SCI_PROTOCOL 5402d95ffaeSNicolas Frayer depends on ARCH_K3 || COMPILE_TEST 541cd844b07SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 542cd844b07SLokesh Vutla help 543cd844b07SLokesh Vutla This enables the irqchip driver support for K3 Interrupt router 544cd844b07SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 545cd844b07SLokesh Vutla If you wish to use interrupt router irq resources managed by the 546cd844b07SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 547cd844b07SLokesh Vutla 5489f1463b8SLokesh Vutlaconfig TI_SCI_INTA_IRQCHIP 549b8b26ae3SNicolas Frayer tristate "TI SCI INTA Interrupt Controller" 5509f1463b8SLokesh Vutla depends on TI_SCI_PROTOCOL 551b8b26ae3SNicolas Frayer depends on ARCH_K3 || (COMPILE_TEST && ARM64) 5529f1463b8SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 553f011df61SLokesh Vutla select TI_SCI_INTA_MSI_DOMAIN 5549f1463b8SLokesh Vutla help 5559f1463b8SLokesh Vutla This enables the irqchip driver support for K3 Interrupt aggregator 5569f1463b8SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 5579f1463b8SLokesh Vutla If you wish to use interrupt aggregator irq resources managed by the 5589f1463b8SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 5599f1463b8SLokesh Vutla 56004e2d1e0SGrzegorz Jaszczykconfig TI_PRUSS_INTC 561b8e594faSSuman Anna tristate 562b8e594faSSuman Anna depends on TI_PRUSS 563b8e594faSSuman Anna default TI_PRUSS 56404e2d1e0SGrzegorz Jaszczyk select IRQ_DOMAIN 56504e2d1e0SGrzegorz Jaszczyk help 56604e2d1e0SGrzegorz Jaszczyk This enables support for the PRU-ICSS Local Interrupt Controller 56704e2d1e0SGrzegorz Jaszczyk present within a PRU-ICSS subsystem present on various TI SoCs. 56804e2d1e0SGrzegorz Jaszczyk The PRUSS INTC enables various interrupts to be routed to multiple 56904e2d1e0SGrzegorz Jaszczyk different processors within the SoC. 57004e2d1e0SGrzegorz Jaszczyk 5716b7ce892SAnup Patelconfig RISCV_INTC 572d8fb1307SConor Dooley bool 5736b7ce892SAnup Patel depends on RISCV 574832f15f4SAnup Patel select IRQ_DOMAIN_HIERARCHY 5756b7ce892SAnup Patel 5762333df5aSAnup Patelconfig RISCV_APLIC 5772333df5aSAnup Patel bool 5782333df5aSAnup Patel depends on RISCV 5792333df5aSAnup Patel select IRQ_DOMAIN_HIERARCHY 5802333df5aSAnup Patel 581ca8df97fSAnup Patelconfig RISCV_APLIC_MSI 582ca8df97fSAnup Patel bool 583ca8df97fSAnup Patel depends on RISCV_APLIC 584ca8df97fSAnup Patel select GENERIC_MSI_IRQ 585ca8df97fSAnup Patel default RISCV_APLIC 586ca8df97fSAnup Patel 58721a8f8a0SAnup Patelconfig RISCV_IMSIC 58821a8f8a0SAnup Patel bool 58921a8f8a0SAnup Patel depends on RISCV 59021a8f8a0SAnup Patel select IRQ_DOMAIN_HIERARCHY 59121a8f8a0SAnup Patel select GENERIC_IRQ_MATRIX_ALLOCATOR 59221a8f8a0SAnup Patel select GENERIC_MSI_IRQ 59321a8f8a0SAnup Patel 5945c5a71d0SAnup Patelconfig RISCV_IMSIC_PCI 5955c5a71d0SAnup Patel bool 5965c5a71d0SAnup Patel depends on RISCV_IMSIC 5975c5a71d0SAnup Patel depends on PCI 5985c5a71d0SAnup Patel depends on PCI_MSI 5995c5a71d0SAnup Patel default RISCV_IMSIC 6005c5a71d0SAnup Patel 6018237f8bcSChristoph Hellwigconfig SIFIVE_PLIC 602fdb1742aSConor Dooley bool 6038237f8bcSChristoph Hellwig depends on RISCV 604466008f9SYash Shah select IRQ_DOMAIN_HIERARCHY 605de078949SSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 60601493855SJonathan Neuschäfer 607e4e53503SChanghuang Liangconfig STARFIVE_JH8100_INTC 608e4e53503SChanghuang Liang bool "StarFive JH8100 External Interrupt Controller" 609e4e53503SChanghuang Liang depends on ARCH_STARFIVE || COMPILE_TEST 610e4e53503SChanghuang Liang default ARCH_STARFIVE 611e4e53503SChanghuang Liang select IRQ_DOMAIN_HIERARCHY 612e4e53503SChanghuang Liang help 613e4e53503SChanghuang Liang This enables support for the INTC chip found in StarFive JH8100 614e4e53503SChanghuang Liang SoC. 615e4e53503SChanghuang Liang 616e4e53503SChanghuang Liang If you don't know what to do here, say Y. 617e4e53503SChanghuang Liang 61825caea95SInochi Amaotoconfig THEAD_C900_ACLINT_SSWI 61925caea95SInochi Amaoto bool "THEAD C9XX ACLINT S-mode IPI Interrupt Controller" 62025caea95SInochi Amaoto depends on RISCV 62125caea95SInochi Amaoto depends on SMP 62225caea95SInochi Amaoto select IRQ_DOMAIN_HIERARCHY 62325caea95SInochi Amaoto select GENERIC_IRQ_IPI_MUX 62425caea95SInochi Amaoto help 62525caea95SInochi Amaoto This enables support for T-HEAD specific ACLINT SSWI device 62625caea95SInochi Amaoto support. 62725caea95SInochi Amaoto 62825caea95SInochi Amaoto If you don't know what to do here, say Y. 62925caea95SInochi Amaoto 630b74416dbSHyunki Kooconfig EXYNOS_IRQ_COMBINER 631b74416dbSHyunki Koo bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST 632b74416dbSHyunki Koo depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST 633b74416dbSHyunki Koo help 634b74416dbSHyunki Koo Say yes here to add support for the IRQ combiner devices embedded 635b74416dbSHyunki Koo in Samsung Exynos chips. 636b74416dbSHyunki Koo 637b2d3e335SHuacai Chenconfig IRQ_LOONGARCH_CPU 638b2d3e335SHuacai Chen bool 639b2d3e335SHuacai Chen select GENERIC_IRQ_CHIP 640b2d3e335SHuacai Chen select IRQ_DOMAIN 64142a7d887STiezhu Yang select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 64270f7b6c0SHuacai Chen select LOONGSON_HTVEC 6438d5356f9SHuacai Chen select LOONGSON_LIOINTC 6448d5356f9SHuacai Chen select LOONGSON_EIOINTC 6458d5356f9SHuacai Chen select LOONGSON_PCH_PIC 6468d5356f9SHuacai Chen select LOONGSON_PCH_MSI 6478d5356f9SHuacai Chen select LOONGSON_PCH_LPC 648b2d3e335SHuacai Chen help 649b2d3e335SHuacai Chen Support for the LoongArch CPU Interrupt Controller. For details of 650b2d3e335SHuacai Chen irq chip hierarchy on LoongArch platforms please read the document 65151712e49SCosta Shulyupin Documentation/arch/loongarch/irq-chip-model.rst. 652b2d3e335SHuacai Chen 653dbb15226SJiaxun Yangconfig LOONGSON_LIOINTC 654dbb15226SJiaxun Yang bool "Loongson Local I/O Interrupt Controller" 655dbb15226SJiaxun Yang depends on MACH_LOONGSON64 656dbb15226SJiaxun Yang default y 657dbb15226SJiaxun Yang select IRQ_DOMAIN 658dbb15226SJiaxun Yang select GENERIC_IRQ_CHIP 659dbb15226SJiaxun Yang help 660dbb15226SJiaxun Yang Support for the Loongson Local I/O Interrupt Controller. 661dbb15226SJiaxun Yang 662dd281e1aSHuacai Chenconfig LOONGSON_EIOINTC 663dd281e1aSHuacai Chen bool "Loongson Extend I/O Interrupt Controller" 664dd281e1aSHuacai Chen depends on LOONGARCH 665dd281e1aSHuacai Chen depends on MACH_LOONGSON64 666dd281e1aSHuacai Chen default MACH_LOONGSON64 667dd281e1aSHuacai Chen select IRQ_DOMAIN_HIERARCHY 668dd281e1aSHuacai Chen select GENERIC_IRQ_CHIP 669dd281e1aSHuacai Chen help 670dd281e1aSHuacai Chen Support for the Loongson3 Extend I/O Interrupt Vector Controller. 671dd281e1aSHuacai Chen 672a93f1d90SJiaxun Yangconfig LOONGSON_HTPIC 673a93f1d90SJiaxun Yang bool "Loongson3 HyperTransport PIC Controller" 674987a3e03SHuacai Chen depends on MACH_LOONGSON64 && MIPS 675a93f1d90SJiaxun Yang default y 676a93f1d90SJiaxun Yang select IRQ_DOMAIN 677a93f1d90SJiaxun Yang select GENERIC_IRQ_CHIP 678a93f1d90SJiaxun Yang help 679a93f1d90SJiaxun Yang Support for the Loongson-3 HyperTransport PIC Controller. 680a93f1d90SJiaxun Yang 681818e915fSJiaxun Yangconfig LOONGSON_HTVEC 682987a3e03SHuacai Chen bool "Loongson HyperTransport Interrupt Vector Controller" 683d77aeb5dSIngo Molnar depends on MACH_LOONGSON64 684818e915fSJiaxun Yang default MACH_LOONGSON64 685818e915fSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 686818e915fSJiaxun Yang help 687987a3e03SHuacai Chen Support for the Loongson HyperTransport Interrupt Vector Controller. 688818e915fSJiaxun Yang 689ef8c01ebSJiaxun Yangconfig LOONGSON_PCH_PIC 690ef8c01ebSJiaxun Yang bool "Loongson PCH PIC Controller" 691bcdd75c5SHuacai Chen depends on MACH_LOONGSON64 692ef8c01ebSJiaxun Yang default MACH_LOONGSON64 693ef8c01ebSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 694ef8c01ebSJiaxun Yang select IRQ_FASTEOI_HIERARCHY_HANDLERS 695ef8c01ebSJiaxun Yang help 696ef8c01ebSJiaxun Yang Support for the Loongson PCH PIC Controller. 697ef8c01ebSJiaxun Yang 698632dcc2cSJiaxun Yangconfig LOONGSON_PCH_MSI 699a23df9a4SJiaxun Yang bool "Loongson PCH MSI Controller" 70002308732SHuacai Chen depends on MACH_LOONGSON64 701632dcc2cSJiaxun Yang depends on PCI 702632dcc2cSJiaxun Yang default MACH_LOONGSON64 703632dcc2cSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 7040b3af759SHuacai Chen select IRQ_MSI_LIB 705632dcc2cSJiaxun Yang select PCI_MSI 706632dcc2cSJiaxun Yang help 707632dcc2cSJiaxun Yang Support for the Loongson PCH MSI Controller. 708632dcc2cSJiaxun Yang 709ee73f14eSHuacai Chenconfig LOONGSON_PCH_LPC 710ee73f14eSHuacai Chen bool "Loongson PCH LPC Controller" 711e7ccba77SJianmin Lv depends on LOONGARCH 712ee73f14eSHuacai Chen depends on MACH_LOONGSON64 713e7ccba77SJianmin Lv default MACH_LOONGSON64 714ee73f14eSHuacai Chen select IRQ_DOMAIN_HIERARCHY 715ee73f14eSHuacai Chen help 716ee73f14eSHuacai Chen Support for the Loongson PCH LPC Controller. 717ee73f14eSHuacai Chen 718ad4c938cSMark-PK Tsaiconfig MST_IRQ 719ad4c938cSMark-PK Tsai bool "MStar Interrupt Controller" 72061b0648dSGeert Uytterhoeven depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST 721ad4c938cSMark-PK Tsai default ARCH_MEDIATEK 722ad4c938cSMark-PK Tsai select IRQ_DOMAIN 723ad4c938cSMark-PK Tsai select IRQ_DOMAIN_HIERARCHY 724ad4c938cSMark-PK Tsai help 725ad4c938cSMark-PK Tsai Support MStar Interrupt Controller. 726ad4c938cSMark-PK Tsai 727fead4dd4SJonathan Neuschäferconfig WPCM450_AIC 728fead4dd4SJonathan Neuschäfer bool "Nuvoton WPCM450 Advanced Interrupt Controller" 72994bc9420SMarc Zyngier depends on ARCH_WPCM450 730fead4dd4SJonathan Neuschäfer help 731fead4dd4SJonathan Neuschäfer Support for the interrupt controller in the Nuvoton WPCM450 BMC SoC. 732fead4dd4SJonathan Neuschäfer 733529ea368SThomas Bogendoerferconfig IRQ_IDT3243X 734529ea368SThomas Bogendoerfer bool 735529ea368SThomas Bogendoerfer select GENERIC_IRQ_CHIP 736529ea368SThomas Bogendoerfer select IRQ_DOMAIN 737529ea368SThomas Bogendoerfer 73876cde263SHector Martinconfig APPLE_AIC 73976cde263SHector Martin bool "Apple Interrupt Controller (AIC)" 74076cde263SHector Martin depends on ARM64 7415b44955dSGeert Uytterhoeven depends on ARCH_APPLE || COMPILE_TEST 742c19f8971SMarc Zyngier select GENERIC_IRQ_IPI_MUX 74376cde263SHector Martin help 74476cde263SHector Martin Support for the Apple Interrupt Controller found on Apple Silicon SoCs, 74576cde263SHector Martin such as the M1. 74676cde263SHector Martin 74700fa3461SClaudiu Bezneaconfig MCHP_EIC 74800fa3461SClaudiu Beznea bool "Microchip External Interrupt Controller" 74900fa3461SClaudiu Beznea depends on ARCH_AT91 || COMPILE_TEST 75000fa3461SClaudiu Beznea select IRQ_DOMAIN 75100fa3461SClaudiu Beznea select IRQ_DOMAIN_HIERARCHY 75200fa3461SClaudiu Beznea help 75300fa3461SClaudiu Beznea Support for Microchip External Interrupt Controller. 75400fa3461SClaudiu Beznea 755f7189d93SQin Jianconfig SUNPLUS_SP7021_INTC 756f7189d93SQin Jian bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST 757f7189d93SQin Jian default SOC_SP7021 758f7189d93SQin Jian help 759f7189d93SQin Jian Support for the Sunplus SP7021 Interrupt Controller IP core. 760f7189d93SQin Jian SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a 761f7189d93SQin Jian chained controller, routing all interrupt source in P-Chip to 762f7189d93SQin Jian the primary controller on C-Chip. 763f7189d93SQin Jian 76401493855SJonathan Neuschäferendmenu 765