1f6e916b8SThomas Petazzoniconfig IRQCHIP 2f6e916b8SThomas Petazzoni def_bool y 3f6e916b8SThomas Petazzoni depends on OF_IRQ 4f6e916b8SThomas Petazzoni 581243e44SRob Herringconfig ARM_GIC 681243e44SRob Herring bool 781243e44SRob Herring select IRQ_DOMAIN 89a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 981243e44SRob Herring select MULTI_IRQ_HANDLER 1081243e44SRob Herring 119c8edddfSJon Hunterconfig ARM_GIC_PM 129c8edddfSJon Hunter bool 139c8edddfSJon Hunter depends on PM 149c8edddfSJon Hunter select ARM_GIC 159c8edddfSJon Hunter select PM_CLK 169c8edddfSJon Hunter 17a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 18a27d21e0SLinus Walleij int 19a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 20a27d21e0SLinus Walleij default 1 21a27d21e0SLinus Walleij 22853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 23853a33ceSSuravee Suthikulpanit bool 243ee80364SArnd Bergmann depends on PCI 253ee80364SArnd Bergmann select ARM_GIC 263ee80364SArnd Bergmann select PCI_MSI 27853a33ceSSuravee Suthikulpanit 2881243e44SRob Herringconfig GIC_NON_BANKED 2981243e44SRob Herring bool 3081243e44SRob Herring 31021f6537SMarc Zyngierconfig ARM_GIC_V3 32021f6537SMarc Zyngier bool 33021f6537SMarc Zyngier select IRQ_DOMAIN 34021f6537SMarc Zyngier select MULTI_IRQ_HANDLER 35443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 36e3825ba1SMarc Zyngier select PARTITION_PERCPU 37021f6537SMarc Zyngier 3819812729SMarc Zyngierconfig ARM_GIC_V3_ITS 3919812729SMarc Zyngier bool 403ee80364SArnd Bergmann depends on PCI 413ee80364SArnd Bergmann depends on PCI_MSI 42292ec080SUwe Kleine-König 4344430ec0SRob Herringconfig ARM_NVIC 4444430ec0SRob Herring bool 4544430ec0SRob Herring select IRQ_DOMAIN 462d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 4744430ec0SRob Herring select GENERIC_IRQ_CHIP 4844430ec0SRob Herring 4944430ec0SRob Herringconfig ARM_VIC 5044430ec0SRob Herring bool 5144430ec0SRob Herring select IRQ_DOMAIN 5244430ec0SRob Herring select MULTI_IRQ_HANDLER 5344430ec0SRob Herring 5444430ec0SRob Herringconfig ARM_VIC_NR 5544430ec0SRob Herring int 5644430ec0SRob Herring default 4 if ARCH_S5PV210 5744430ec0SRob Herring default 2 5844430ec0SRob Herring depends on ARM_VIC 5944430ec0SRob Herring help 6044430ec0SRob Herring The maximum number of VICs available in the system, for 6144430ec0SRob Herring power management. 6244430ec0SRob Herring 63fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 64fed6d336SThomas Petazzoni bool 65fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 663ee80364SArnd Bergmann select PCI_MSI if PCI 67fed6d336SThomas Petazzoni 68e6b78f2cSAntoine Tenartconfig ALPINE_MSI 69e6b78f2cSAntoine Tenart bool 703ee80364SArnd Bergmann depends on PCI 713ee80364SArnd Bergmann select PCI_MSI 72e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 73e6b78f2cSAntoine Tenart 74b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 75b1479ebbSBoris BREZILLON bool 76b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 77b1479ebbSBoris BREZILLON select IRQ_DOMAIN 78b1479ebbSBoris BREZILLON select MULTI_IRQ_HANDLER 79b1479ebbSBoris BREZILLON select SPARSE_IRQ 80b1479ebbSBoris BREZILLON 81b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 82b1479ebbSBoris BREZILLON bool 83b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 84b1479ebbSBoris BREZILLON select IRQ_DOMAIN 85b1479ebbSBoris BREZILLON select MULTI_IRQ_HANDLER 86b1479ebbSBoris BREZILLON select SPARSE_IRQ 87b1479ebbSBoris BREZILLON 880509cfdeSRalf Baechleconfig I8259 890509cfdeSRalf Baechle bool 900509cfdeSRalf Baechle select IRQ_DOMAIN 910509cfdeSRalf Baechle 92c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 93c7c42ec2SSimon Arlott bool 94c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 95c7c42ec2SSimon Arlott select IRQ_DOMAIN 96c7c42ec2SSimon Arlott 975f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 985f7f0317SKevin Cernekee bool 995f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1005f7f0317SKevin Cernekee select IRQ_DOMAIN 1015f7f0317SKevin Cernekee 102a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 103a4fcbb86SKevin Cernekee bool 104a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 105a4fcbb86SKevin Cernekee select IRQ_DOMAIN 106a4fcbb86SKevin Cernekee 1077f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 1087f646e92SFlorian Fainelli bool 1097f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1107f646e92SFlorian Fainelli select IRQ_DOMAIN 1117f646e92SFlorian Fainelli 112350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 113350d71b9SSebastian Hesselbarth bool 114e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 115350d71b9SSebastian Hesselbarth select IRQ_DOMAIN 116350d71b9SSebastian Hesselbarth 1179a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1189a7c4abdSMaJun bool 1199a7c4abdSMaJun select ARM_GIC_V3 1209a7c4abdSMaJun select ARM_GIC_V3_ITS 1219a7c4abdSMaJun 122b6ef9161SJames Hoganconfig IMGPDC_IRQ 123b6ef9161SJames Hogan bool 124b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 125b6ef9161SJames Hogan select IRQ_DOMAIN 126b6ef9161SJames Hogan 12767e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 12867e38cf2SRalf Baechle bool 12967e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 13067e38cf2SRalf Baechle select IRQ_DOMAIN 13167e38cf2SRalf Baechle 132afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 133afc98d90SAlexander Shiyan bool 134afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 135afc98d90SAlexander Shiyan select IRQ_DOMAIN 136afc98d90SAlexander Shiyan select MULTI_IRQ_HANDLER 137afc98d90SAlexander Shiyan select SPARSE_IRQ 138afc98d90SAlexander Shiyan default y 139afc98d90SAlexander Shiyan 1404db8e6d2SStefan Kristianssonconfig OR1K_PIC 1414db8e6d2SStefan Kristiansson bool 1424db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1434db8e6d2SStefan Kristiansson 1448598066cSFelipe Balbiconfig OMAP_IRQCHIP 1458598066cSFelipe Balbi bool 1468598066cSFelipe Balbi select GENERIC_IRQ_CHIP 1478598066cSFelipe Balbi select IRQ_DOMAIN 1488598066cSFelipe Balbi 1499dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 1509dbd90f1SSebastian Hesselbarth bool 1519dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 1529dbd90f1SSebastian Hesselbarth select MULTI_IRQ_HANDLER 1539dbd90f1SSebastian Hesselbarth 154aaa8666aSCristian Birsanconfig PIC32_EVIC 155aaa8666aSCristian Birsan bool 156aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 157aaa8666aSCristian Birsan select IRQ_DOMAIN 158aaa8666aSCristian Birsan 15944358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 16044358048SMagnus Damm bool 16144358048SMagnus Damm select IRQ_DOMAIN 16244358048SMagnus Damm 163fbc83b7fSMagnus Dammconfig RENESAS_IRQC 164fbc83b7fSMagnus Damm bool 16599c221dfSMagnus Damm select GENERIC_IRQ_CHIP 166fbc83b7fSMagnus Damm select IRQ_DOMAIN 167fbc83b7fSMagnus Damm 16807088484SLee Jonesconfig ST_IRQCHIP 16907088484SLee Jones bool 17007088484SLee Jones select REGMAP 17107088484SLee Jones select MFD_SYSCON 17207088484SLee Jones help 17307088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 17407088484SLee Jones 1754bba6689SMans Rullgardconfig TANGO_IRQ 1764bba6689SMans Rullgard bool 1774bba6689SMans Rullgard select IRQ_DOMAIN 1784bba6689SMans Rullgard select GENERIC_IRQ_CHIP 1794bba6689SMans Rullgard 180b06eb017SChristian Ruppertconfig TB10X_IRQC 181b06eb017SChristian Ruppert bool 182b06eb017SChristian Ruppert select IRQ_DOMAIN 183b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 184b06eb017SChristian Ruppert 185d01f8633SDamien Riegelconfig TS4800_IRQ 186d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 187d01f8633SDamien Riegel select IRQ_DOMAIN 1880df337cfSRichard Weinberger depends on HAS_IOMEM 189d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 190d01f8633SDamien Riegel help 191d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 192d01f8633SDamien Riegel 1932389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 1942389d501SLinus Walleij bool 1952389d501SLinus Walleij select IRQ_DOMAIN 1962389d501SLinus Walleij 1972389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 1982389d501SLinus Walleij int 1992389d501SLinus Walleij default 4 2002389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 20126a8e96aSMax Filippov 20226a8e96aSMax Filippovconfig XTENSA_MX 20326a8e96aSMax Filippov bool 20426a8e96aSMax Filippov select IRQ_DOMAIN 20596ca848eSSricharan R 20696ca848eSSricharan Rconfig IRQ_CROSSBAR 20796ca848eSSricharan R bool 20896ca848eSSricharan R help 209f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 21096ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 21196ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 21296ca848eSSricharan R routed to one of the free irqchip interrupt lines. 21389323f8cSGrygorii Strashko 21489323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 21589323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 21689323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 21789323f8cSGrygorii Strashko help 21889323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 21989323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 2208a19b8f1SAndrew Bresticker 2218a19b8f1SAndrew Brestickerconfig MIPS_GIC 2228a19b8f1SAndrew Bresticker bool 223bb11cff3SQais Yousef select GENERIC_IRQ_IPI 2242af70a96SQais Yousef select IRQ_DOMAIN_HIERARCHY 2258a19b8f1SAndrew Bresticker select MIPS_CM 2268a764482SYoshinori Sato 22744e08e70SPaul Burtonconfig INGENIC_IRQ 22844e08e70SPaul Burton bool 22944e08e70SPaul Burton depends on MACH_INGENIC 23044e08e70SPaul Burton default y 23178c10e55SLinus Torvalds 2328a764482SYoshinori Satoconfig RENESAS_H8300H_INTC 2338a764482SYoshinori Sato bool 2348a764482SYoshinori Sato select IRQ_DOMAIN 2358a764482SYoshinori Sato 2368a764482SYoshinori Satoconfig RENESAS_H8S_INTC 2378a764482SYoshinori Sato bool 2388a764482SYoshinori Sato select IRQ_DOMAIN 239e324c4dcSShenwei Wang 240e324c4dcSShenwei Wangconfig IMX_GPCV2 241e324c4dcSShenwei Wang bool 242e324c4dcSShenwei Wang select IRQ_DOMAIN 243e324c4dcSShenwei Wang help 244e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 2457e4ac676SOleksij Rempel 2467e4ac676SOleksij Rempelconfig IRQ_MXS 2477e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 2487e4ac676SOleksij Rempel select IRQ_DOMAIN 2497e4ac676SOleksij Rempel select STMP_DEVICE 250c27f29bbSThomas Petazzoni 251c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 252c27f29bbSThomas Petazzoni bool 2539e2c986cSMarc Zyngier 254*a109893bSThomas Petazzoniconfig MVEBU_PIC 255*a109893bSThomas Petazzoni bool 256*a109893bSThomas Petazzoni 257b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 258b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 259b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 260b8f3ebe6SMinghuan Lian 2619e2c986cSMarc Zyngierconfig PARTITION_PERCPU 2629e2c986cSMarc Zyngier bool 2630efacbbaSLinus Torvalds 26444df427cSNoam Camusconfig EZNPS_GIC 26544df427cSNoam Camus bool "NPS400 Global Interrupt Manager (GIM)" 266ffd565e3SArnd Bergmann depends on ARC || (COMPILE_TEST && !64BIT) 26744df427cSNoam Camus select IRQ_DOMAIN 26844df427cSNoam Camus help 26944df427cSNoam Camus Support the EZchip NPS400 global interrupt controller 270