1f6e916b8SThomas Petazzoniconfig IRQCHIP 2f6e916b8SThomas Petazzoni def_bool y 3f6e916b8SThomas Petazzoni depends on OF_IRQ 4f6e916b8SThomas Petazzoni 581243e44SRob Herringconfig ARM_GIC 681243e44SRob Herring bool 781243e44SRob Herring select IRQ_DOMAIN 89a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 981243e44SRob Herring select MULTI_IRQ_HANDLER 100c9e4982SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1181243e44SRob Herring 129c8edddfSJon Hunterconfig ARM_GIC_PM 139c8edddfSJon Hunter bool 149c8edddfSJon Hunter depends on PM 159c8edddfSJon Hunter select ARM_GIC 169c8edddfSJon Hunter select PM_CLK 179c8edddfSJon Hunter 18a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 19a27d21e0SLinus Walleij int 20a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 21a27d21e0SLinus Walleij default 1 22a27d21e0SLinus Walleij 23853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 24853a33ceSSuravee Suthikulpanit bool 253ee80364SArnd Bergmann depends on PCI 263ee80364SArnd Bergmann select ARM_GIC 273ee80364SArnd Bergmann select PCI_MSI 28853a33ceSSuravee Suthikulpanit 2981243e44SRob Herringconfig GIC_NON_BANKED 3081243e44SRob Herring bool 3181243e44SRob Herring 32021f6537SMarc Zyngierconfig ARM_GIC_V3 33021f6537SMarc Zyngier bool 34021f6537SMarc Zyngier select IRQ_DOMAIN 35021f6537SMarc Zyngier select MULTI_IRQ_HANDLER 36443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 37e3825ba1SMarc Zyngier select PARTITION_PERCPU 38*956ae91aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 39021f6537SMarc Zyngier 4019812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4119812729SMarc Zyngier bool 423ee80364SArnd Bergmann depends on PCI 433ee80364SArnd Bergmann depends on PCI_MSI 44292ec080SUwe Kleine-König 4544430ec0SRob Herringconfig ARM_NVIC 4644430ec0SRob Herring bool 4744430ec0SRob Herring select IRQ_DOMAIN 482d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 4944430ec0SRob Herring select GENERIC_IRQ_CHIP 5044430ec0SRob Herring 5144430ec0SRob Herringconfig ARM_VIC 5244430ec0SRob Herring bool 5344430ec0SRob Herring select IRQ_DOMAIN 5444430ec0SRob Herring select MULTI_IRQ_HANDLER 5544430ec0SRob Herring 5644430ec0SRob Herringconfig ARM_VIC_NR 5744430ec0SRob Herring int 5844430ec0SRob Herring default 4 if ARCH_S5PV210 5944430ec0SRob Herring default 2 6044430ec0SRob Herring depends on ARM_VIC 6144430ec0SRob Herring help 6244430ec0SRob Herring The maximum number of VICs available in the system, for 6344430ec0SRob Herring power management. 6444430ec0SRob Herring 65fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 66fed6d336SThomas Petazzoni bool 67fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 683ee80364SArnd Bergmann select PCI_MSI if PCI 69fed6d336SThomas Petazzoni 70e6b78f2cSAntoine Tenartconfig ALPINE_MSI 71e6b78f2cSAntoine Tenart bool 723ee80364SArnd Bergmann depends on PCI 733ee80364SArnd Bergmann select PCI_MSI 74e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 75e6b78f2cSAntoine Tenart 76b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 77b1479ebbSBoris BREZILLON bool 78b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 79b1479ebbSBoris BREZILLON select IRQ_DOMAIN 80b1479ebbSBoris BREZILLON select MULTI_IRQ_HANDLER 81b1479ebbSBoris BREZILLON select SPARSE_IRQ 82b1479ebbSBoris BREZILLON 83b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 84b1479ebbSBoris BREZILLON bool 85b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 86b1479ebbSBoris BREZILLON select IRQ_DOMAIN 87b1479ebbSBoris BREZILLON select MULTI_IRQ_HANDLER 88b1479ebbSBoris BREZILLON select SPARSE_IRQ 89b1479ebbSBoris BREZILLON 900509cfdeSRalf Baechleconfig I8259 910509cfdeSRalf Baechle bool 920509cfdeSRalf Baechle select IRQ_DOMAIN 930509cfdeSRalf Baechle 94c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 95c7c42ec2SSimon Arlott bool 96c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 97c7c42ec2SSimon Arlott select IRQ_DOMAIN 98c7c42ec2SSimon Arlott 995f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 1005f7f0317SKevin Cernekee bool 1015f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1025f7f0317SKevin Cernekee select IRQ_DOMAIN 1035f7f0317SKevin Cernekee 104a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 105a4fcbb86SKevin Cernekee bool 106a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 107a4fcbb86SKevin Cernekee select IRQ_DOMAIN 108a4fcbb86SKevin Cernekee 1097f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 1107f646e92SFlorian Fainelli bool 1117f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1127f646e92SFlorian Fainelli select IRQ_DOMAIN 1137f646e92SFlorian Fainelli 114350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 115350d71b9SSebastian Hesselbarth bool 116e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 117350d71b9SSebastian Hesselbarth select IRQ_DOMAIN 118350d71b9SSebastian Hesselbarth 1196ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1206ee532e2SLinus Walleij bool 1216ee532e2SLinus Walleij select IRQ_DOMAIN 1226ee532e2SLinus Walleij select MULTI_IRQ_HANDLER 1236ee532e2SLinus Walleij select SPARSE_IRQ 1246ee532e2SLinus Walleij 1259a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1269a7c4abdSMaJun bool 1279a7c4abdSMaJun select ARM_GIC_V3 1289a7c4abdSMaJun select ARM_GIC_V3_ITS 1299a7c4abdSMaJun 130b6ef9161SJames Hoganconfig IMGPDC_IRQ 131b6ef9161SJames Hogan bool 132b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 133b6ef9161SJames Hogan select IRQ_DOMAIN 134b6ef9161SJames Hogan 13567e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 13667e38cf2SRalf Baechle bool 13767e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1383838a547SPaul Burton select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING 13967e38cf2SRalf Baechle select IRQ_DOMAIN 1403838a547SPaul Burton select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI 14167e38cf2SRalf Baechle 142afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 143afc98d90SAlexander Shiyan bool 144afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 145afc98d90SAlexander Shiyan select IRQ_DOMAIN 146afc98d90SAlexander Shiyan select MULTI_IRQ_HANDLER 147afc98d90SAlexander Shiyan select SPARSE_IRQ 148afc98d90SAlexander Shiyan default y 149afc98d90SAlexander Shiyan 1504db8e6d2SStefan Kristianssonconfig OR1K_PIC 1514db8e6d2SStefan Kristiansson bool 1524db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1534db8e6d2SStefan Kristiansson 1548598066cSFelipe Balbiconfig OMAP_IRQCHIP 1558598066cSFelipe Balbi bool 1568598066cSFelipe Balbi select GENERIC_IRQ_CHIP 1578598066cSFelipe Balbi select IRQ_DOMAIN 1588598066cSFelipe Balbi 1599dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 1609dbd90f1SSebastian Hesselbarth bool 1619dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 1629dbd90f1SSebastian Hesselbarth select MULTI_IRQ_HANDLER 1639dbd90f1SSebastian Hesselbarth 164aaa8666aSCristian Birsanconfig PIC32_EVIC 165aaa8666aSCristian Birsan bool 166aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 167aaa8666aSCristian Birsan select IRQ_DOMAIN 168aaa8666aSCristian Birsan 169981b58f6SRich Felkerconfig JCORE_AIC 1703602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 1713602ffdeSRich Felker depends on OF 172981b58f6SRich Felker select IRQ_DOMAIN 173981b58f6SRich Felker help 174981b58f6SRich Felker Support for the J-Core integrated AIC. 175981b58f6SRich Felker 17644358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 17744358048SMagnus Damm bool 17844358048SMagnus Damm select IRQ_DOMAIN 17944358048SMagnus Damm 180fbc83b7fSMagnus Dammconfig RENESAS_IRQC 181fbc83b7fSMagnus Damm bool 18299c221dfSMagnus Damm select GENERIC_IRQ_CHIP 183fbc83b7fSMagnus Damm select IRQ_DOMAIN 184fbc83b7fSMagnus Damm 18507088484SLee Jonesconfig ST_IRQCHIP 18607088484SLee Jones bool 18707088484SLee Jones select REGMAP 18807088484SLee Jones select MFD_SYSCON 18907088484SLee Jones help 19007088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 19107088484SLee Jones 1924bba6689SMans Rullgardconfig TANGO_IRQ 1934bba6689SMans Rullgard bool 1944bba6689SMans Rullgard select IRQ_DOMAIN 1954bba6689SMans Rullgard select GENERIC_IRQ_CHIP 1964bba6689SMans Rullgard 197b06eb017SChristian Ruppertconfig TB10X_IRQC 198b06eb017SChristian Ruppert bool 199b06eb017SChristian Ruppert select IRQ_DOMAIN 200b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 201b06eb017SChristian Ruppert 202d01f8633SDamien Riegelconfig TS4800_IRQ 203d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 204d01f8633SDamien Riegel select IRQ_DOMAIN 2050df337cfSRichard Weinberger depends on HAS_IOMEM 206d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 207d01f8633SDamien Riegel help 208d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 209d01f8633SDamien Riegel 2102389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2112389d501SLinus Walleij bool 2122389d501SLinus Walleij select IRQ_DOMAIN 2132389d501SLinus Walleij 2142389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2152389d501SLinus Walleij int 2162389d501SLinus Walleij default 4 2172389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 21826a8e96aSMax Filippov 21926a8e96aSMax Filippovconfig XTENSA_MX 22026a8e96aSMax Filippov bool 22126a8e96aSMax Filippov select IRQ_DOMAIN 22296ca848eSSricharan R 2230547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 2240547dc78SZubair Lutfullah Kakakhel bool 2250547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 2260547dc78SZubair Lutfullah Kakakhel 22796ca848eSSricharan Rconfig IRQ_CROSSBAR 22896ca848eSSricharan R bool 22996ca848eSSricharan R help 230f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 23196ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 23296ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 23396ca848eSSricharan R routed to one of the free irqchip interrupt lines. 23489323f8cSGrygorii Strashko 23589323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 23689323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 23789323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 23889323f8cSGrygorii Strashko help 23989323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 24089323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 2418a19b8f1SAndrew Bresticker 2428a19b8f1SAndrew Brestickerconfig MIPS_GIC 2438a19b8f1SAndrew Bresticker bool 244bb11cff3SQais Yousef select GENERIC_IRQ_IPI 2452af70a96SQais Yousef select IRQ_DOMAIN_HIERARCHY 2468a19b8f1SAndrew Bresticker select MIPS_CM 2478a764482SYoshinori Sato 24844e08e70SPaul Burtonconfig INGENIC_IRQ 24944e08e70SPaul Burton bool 25044e08e70SPaul Burton depends on MACH_INGENIC 25144e08e70SPaul Burton default y 25278c10e55SLinus Torvalds 2538a764482SYoshinori Satoconfig RENESAS_H8300H_INTC 2548a764482SYoshinori Sato bool 2558a764482SYoshinori Sato select IRQ_DOMAIN 2568a764482SYoshinori Sato 2578a764482SYoshinori Satoconfig RENESAS_H8S_INTC 2588a764482SYoshinori Sato bool 2598a764482SYoshinori Sato select IRQ_DOMAIN 260e324c4dcSShenwei Wang 261e324c4dcSShenwei Wangconfig IMX_GPCV2 262e324c4dcSShenwei Wang bool 263e324c4dcSShenwei Wang select IRQ_DOMAIN 264e324c4dcSShenwei Wang help 265e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 2667e4ac676SOleksij Rempel 2677e4ac676SOleksij Rempelconfig IRQ_MXS 2687e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 2697e4ac676SOleksij Rempel select IRQ_DOMAIN 2707e4ac676SOleksij Rempel select STMP_DEVICE 271c27f29bbSThomas Petazzoni 272a68a63cbSThomas Petazzoniconfig MVEBU_GICP 273a68a63cbSThomas Petazzoni bool 274a68a63cbSThomas Petazzoni 275e0de91a9SThomas Petazzoniconfig MVEBU_ICU 276e0de91a9SThomas Petazzoni bool 277e0de91a9SThomas Petazzoni 278c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 279c27f29bbSThomas Petazzoni bool 280fa23b9d1SArnd Bergmann select GENERIC_MSI_IRQ_DOMAIN 2819e2c986cSMarc Zyngier 282a109893bSThomas Petazzoniconfig MVEBU_PIC 283a109893bSThomas Petazzoni bool 284a109893bSThomas Petazzoni 285b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 286b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 287b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 288b8f3ebe6SMinghuan Lian 2899e2c986cSMarc Zyngierconfig PARTITION_PERCPU 2909e2c986cSMarc Zyngier bool 2910efacbbaSLinus Torvalds 29244df427cSNoam Camusconfig EZNPS_GIC 29344df427cSNoam Camus bool "NPS400 Global Interrupt Manager (GIM)" 294ffd565e3SArnd Bergmann depends on ARC || (COMPILE_TEST && !64BIT) 29544df427cSNoam Camus select IRQ_DOMAIN 29644df427cSNoam Camus help 29744df427cSNoam Camus Support the EZchip NPS400 global interrupt controller 298e0720416SAlexandre TORGUE 299e0720416SAlexandre TORGUEconfig STM32_EXTI 300e0720416SAlexandre TORGUE bool 301e0720416SAlexandre TORGUE select IRQ_DOMAIN 302f20cc9b0SAgustin Vega-Frias 303f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 304f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 305f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 306f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN 307f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 308f20cc9b0SAgustin Vega-Frias help 309f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 310f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 311