1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2c94fb639SRandy Dunlapmenu "IRQ chip support" 3c94fb639SRandy Dunlap 4f6e916b8SThomas Petazzoniconfig IRQCHIP 5f6e916b8SThomas Petazzoni def_bool y 6612d5494SHuacai Chen depends on (OF_IRQ || ACPI_GENERIC_GSI) 7f6e916b8SThomas Petazzoni 881243e44SRob Herringconfig ARM_GIC 981243e44SRob Herring bool 10dee23403SMarc Zyngier depends on OF 119a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 120e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1381243e44SRob Herring 149c8edddfSJon Hunterconfig ARM_GIC_PM 159c8edddfSJon Hunter bool 169c8edddfSJon Hunter depends on PM 179c8edddfSJon Hunter select ARM_GIC 189c8edddfSJon Hunter 19a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 20a27d21e0SLinus Walleij int 2170265523SJiangfeng Xiao depends on ARM_GIC 22a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 23a27d21e0SLinus Walleij default 1 24a27d21e0SLinus Walleij 25853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 26853a33ceSSuravee Suthikulpanit bool 273ee80364SArnd Bergmann depends on PCI 283ee80364SArnd Bergmann select ARM_GIC 293ee80364SArnd Bergmann select PCI_MSI 30853a33ceSSuravee Suthikulpanit 3181243e44SRob Herringconfig GIC_NON_BANKED 3281243e44SRob Herring bool 3381243e44SRob Herring 34021f6537SMarc Zyngierconfig ARM_GIC_V3 35021f6537SMarc Zyngier bool 36443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 37e3825ba1SMarc Zyngier select PARTITION_PERCPU 380e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 3935727af2SShanker Donthineni select HAVE_ARM_SMCCC_DISCOVERY 40021f6537SMarc Zyngier 4119812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4219812729SMarc Zyngier bool 4313e7accbSThomas Gleixner select GENERIC_MSI_IRQ 4429f41139SMarc Zyngier default ARM_GIC_V3 4529f41139SMarc Zyngier 4629f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4729f41139SMarc Zyngier bool 4829f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 493ee80364SArnd Bergmann depends on PCI 503ee80364SArnd Bergmann depends on PCI_MSI 5129f41139SMarc Zyngier default ARM_GIC_V3_ITS 52292ec080SUwe Kleine-König 537afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 547afe031cSBogdan Purcareata bool 557afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 567afe031cSBogdan Purcareata depends on FSL_MC_BUS 577afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 587afe031cSBogdan Purcareata 5944430ec0SRob Herringconfig ARM_NVIC 6044430ec0SRob Herring bool 612d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 6244430ec0SRob Herring select GENERIC_IRQ_CHIP 6344430ec0SRob Herring 6444430ec0SRob Herringconfig ARM_VIC 6544430ec0SRob Herring bool 6644430ec0SRob Herring select IRQ_DOMAIN 6744430ec0SRob Herring 6844430ec0SRob Herringconfig ARM_VIC_NR 6944430ec0SRob Herring int 7044430ec0SRob Herring default 4 if ARCH_S5PV210 7144430ec0SRob Herring default 2 7244430ec0SRob Herring depends on ARM_VIC 7344430ec0SRob Herring help 7444430ec0SRob Herring The maximum number of VICs available in the system, for 7544430ec0SRob Herring power management. 7644430ec0SRob Herring 77*72e257c6SThomas Gleixnerconfig IRQ_MSI_LIB 78*72e257c6SThomas Gleixner bool 79*72e257c6SThomas Gleixner 80fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 81fed6d336SThomas Petazzoni bool 82fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 833ee80364SArnd Bergmann select PCI_MSI if PCI 840e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 85fed6d336SThomas Petazzoni 86e6b78f2cSAntoine Tenartconfig ALPINE_MSI 87e6b78f2cSAntoine Tenart bool 883ee80364SArnd Bergmann depends on PCI 893ee80364SArnd Bergmann select PCI_MSI 90e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 91e6b78f2cSAntoine Tenart 921eb77c3bSTalel Shenharconfig AL_FIC 931eb77c3bSTalel Shenhar bool "Amazon's Annapurna Labs Fabric Interrupt Controller" 949869f37aSJean Delvare depends on OF 9535e0cd77SBaoquan He depends on HAS_IOMEM 961eb77c3bSTalel Shenhar select GENERIC_IRQ_CHIP 971eb77c3bSTalel Shenhar select IRQ_DOMAIN 981eb77c3bSTalel Shenhar help 991eb77c3bSTalel Shenhar Support Amazon's Annapurna Labs Fabric Interrupt Controller. 1001eb77c3bSTalel Shenhar 101b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 102b1479ebbSBoris BREZILLON bool 103b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 104b1479ebbSBoris BREZILLON select IRQ_DOMAIN 105b1479ebbSBoris BREZILLON select SPARSE_IRQ 106b1479ebbSBoris BREZILLON 107b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 108b1479ebbSBoris BREZILLON bool 109b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 110b1479ebbSBoris BREZILLON select IRQ_DOMAIN 111b1479ebbSBoris BREZILLON select SPARSE_IRQ 112b1479ebbSBoris BREZILLON 1130509cfdeSRalf Baechleconfig I8259 1140509cfdeSRalf Baechle bool 1150509cfdeSRalf Baechle select IRQ_DOMAIN 1160509cfdeSRalf Baechle 117c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 118c7c42ec2SSimon Arlott bool 119c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 120c7c42ec2SSimon Arlott select IRQ_DOMAIN 1210e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 122c7c42ec2SSimon Arlott 1235f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 124c057c799SFlorian Fainelli tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" 125c057c799SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 126c057c799SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 1275f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1285f7f0317SKevin Cernekee select IRQ_DOMAIN 1290e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 1305f7f0317SKevin Cernekee 131a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 1323ac268d5SFlorian Fainelli tristate "Broadcom STB 7120-style L2 interrupt controller driver" 1333ac268d5SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 1343ac268d5SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 135a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 136a4fcbb86SKevin Cernekee select IRQ_DOMAIN 137a4fcbb86SKevin Cernekee 1387f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 13951d9db5cSFlorian Fainelli tristate "Broadcom STB generic L2 interrupt controller driver" 14051d9db5cSFlorian Fainelli depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 14151d9db5cSFlorian Fainelli default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 1427f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1437f646e92SFlorian Fainelli select IRQ_DOMAIN 1447f646e92SFlorian Fainelli 1450fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC 1460fc3d74cSBartosz Golaszewski bool 1470fc3d74cSBartosz Golaszewski select GENERIC_IRQ_CHIP 1480fc3d74cSBartosz Golaszewski select IRQ_DOMAIN 1490fc3d74cSBartosz Golaszewski 150350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 151350d71b9SSebastian Hesselbarth bool 152e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 15354a38440SZhen Lei select IRQ_DOMAIN_HIERARCHY 154350d71b9SSebastian Hesselbarth 1556ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1566ee532e2SLinus Walleij bool 1576ee532e2SLinus Walleij select IRQ_DOMAIN 1586ee532e2SLinus Walleij select SPARSE_IRQ 1596ee532e2SLinus Walleij 1609a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1619a7c4abdSMaJun bool 1629a7c4abdSMaJun select ARM_GIC_V3 1639a7c4abdSMaJun select ARM_GIC_V3_ITS 1649a7c4abdSMaJun 165b6ef9161SJames Hoganconfig IMGPDC_IRQ 166b6ef9161SJames Hogan bool 167b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 168b6ef9161SJames Hogan select IRQ_DOMAIN 169b6ef9161SJames Hogan 1705b978c10SLinus Walleijconfig IXP4XX_IRQ 1715b978c10SLinus Walleij bool 1725b978c10SLinus Walleij select IRQ_DOMAIN 1735b978c10SLinus Walleij select SPARSE_IRQ 1745b978c10SLinus Walleij 175da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ 176da0abe1aSRichard Fitzgerald tristate 177da0abe1aSRichard Fitzgerald 17867e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 17967e38cf2SRalf Baechle bool 18067e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1810f5209feSSamuel Holland select GENERIC_IRQ_IPI if SMP && SYS_SUPPORTS_MULTITHREADING 18267e38cf2SRalf Baechle select IRQ_DOMAIN 1830e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 18467e38cf2SRalf Baechle 185afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 186afc98d90SAlexander Shiyan bool 187afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 188afc98d90SAlexander Shiyan select IRQ_DOMAIN 189afc98d90SAlexander Shiyan select SPARSE_IRQ 190afc98d90SAlexander Shiyan default y 191afc98d90SAlexander Shiyan 1929b54470aSStafford Horneconfig OMPIC 1939b54470aSStafford Horne bool 1949b54470aSStafford Horne 1954db8e6d2SStefan Kristianssonconfig OR1K_PIC 1964db8e6d2SStefan Kristiansson bool 1974db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1984db8e6d2SStefan Kristiansson 1998598066cSFelipe Balbiconfig OMAP_IRQCHIP 2008598066cSFelipe Balbi bool 2018598066cSFelipe Balbi select GENERIC_IRQ_CHIP 2028598066cSFelipe Balbi select IRQ_DOMAIN 2038598066cSFelipe Balbi 2049dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 2059dbd90f1SSebastian Hesselbarth bool 2069dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 2079dbd90f1SSebastian Hesselbarth 208aaa8666aSCristian Birsanconfig PIC32_EVIC 209aaa8666aSCristian Birsan bool 210aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 211aaa8666aSCristian Birsan select IRQ_DOMAIN 212aaa8666aSCristian Birsan 213981b58f6SRich Felkerconfig JCORE_AIC 2143602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 2153602ffdeSRich Felker depends on OF 216981b58f6SRich Felker select IRQ_DOMAIN 217981b58f6SRich Felker help 218981b58f6SRich Felker Support for the J-Core integrated AIC. 219981b58f6SRich Felker 220d852e62aSManivannan Sadhasivamconfig RDA_INTC 221d852e62aSManivannan Sadhasivam bool 222d852e62aSManivannan Sadhasivam select IRQ_DOMAIN 223d852e62aSManivannan Sadhasivam 22444358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 22502d7e041SGeert Uytterhoeven bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 22644358048SMagnus Damm select IRQ_DOMAIN 22702d7e041SGeert Uytterhoeven help 22802d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 22902d7e041SGeert Uytterhoeven interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 23044358048SMagnus Damm 231fbc83b7fSMagnus Dammconfig RENESAS_IRQC 23272d44c0cSLad Prabhakar bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 23399c221dfSMagnus Damm select GENERIC_IRQ_CHIP 234fbc83b7fSMagnus Damm select IRQ_DOMAIN 23502d7e041SGeert Uytterhoeven help 23602d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 23772d44c0cSLad Prabhakar devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 238fbc83b7fSMagnus Damm 239a644ccb8SGeert Uytterhoevenconfig RENESAS_RZA1_IRQC 24002d7e041SGeert Uytterhoeven bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST 241a644ccb8SGeert Uytterhoeven select IRQ_DOMAIN_HIERARCHY 24202d7e041SGeert Uytterhoeven help 24302d7e041SGeert Uytterhoeven Enable support for the Renesas RZ/A1 Interrupt Controller, to use up 24402d7e041SGeert Uytterhoeven to 8 external interrupts with configurable sense select. 245a644ccb8SGeert Uytterhoeven 2463fed0955SLad Prabhakarconfig RENESAS_RZG2L_IRQC 2473fed0955SLad Prabhakar bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST 2483fed0955SLad Prabhakar select GENERIC_IRQ_CHIP 2493fed0955SLad Prabhakar select IRQ_DOMAIN_HIERARCHY 2503fed0955SLad Prabhakar help 2513fed0955SLad Prabhakar Enable support for the Renesas RZ/G2L (and alike SoC) Interrupt Controller 2523fed0955SLad Prabhakar for external devices. 2533fed0955SLad Prabhakar 25403ac990eSMichael Walleconfig SL28CPLD_INTC 25503ac990eSMichael Walle bool "Kontron sl28cpld IRQ controller" 25603ac990eSMichael Walle depends on MFD_SL28CPLD=y || COMPILE_TEST 25703ac990eSMichael Walle select REGMAP_IRQ 25803ac990eSMichael Walle help 25903ac990eSMichael Walle Interrupt controller driver for the board management controller 26003ac990eSMichael Walle found on the Kontron sl28 CPLD. 26103ac990eSMichael Walle 26207088484SLee Jonesconfig ST_IRQCHIP 26307088484SLee Jones bool 26407088484SLee Jones select REGMAP 26507088484SLee Jones select MFD_SYSCON 26607088484SLee Jones help 26707088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 26807088484SLee Jones 269d421fd6dSSamuel Hollandconfig SUN4I_INTC 270d421fd6dSSamuel Holland bool 271d421fd6dSSamuel Holland 272d421fd6dSSamuel Hollandconfig SUN6I_R_INTC 273d421fd6dSSamuel Holland bool 274d421fd6dSSamuel Holland select IRQ_DOMAIN_HIERARCHY 275d421fd6dSSamuel Holland select IRQ_FASTEOI_HIERARCHY_HANDLERS 276d421fd6dSSamuel Holland 277d421fd6dSSamuel Hollandconfig SUNXI_NMI_INTC 278d421fd6dSSamuel Holland bool 279d421fd6dSSamuel Holland select GENERIC_IRQ_CHIP 280d421fd6dSSamuel Holland 281b06eb017SChristian Ruppertconfig TB10X_IRQC 282b06eb017SChristian Ruppert bool 283b06eb017SChristian Ruppert select IRQ_DOMAIN 284b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 285b06eb017SChristian Ruppert 286d01f8633SDamien Riegelconfig TS4800_IRQ 287d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 288d01f8633SDamien Riegel select IRQ_DOMAIN 2890df337cfSRichard Weinberger depends on HAS_IOMEM 290d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 291d01f8633SDamien Riegel help 292d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 293d01f8633SDamien Riegel 2942389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2952389d501SLinus Walleij bool 2962389d501SLinus Walleij select IRQ_DOMAIN 2972389d501SLinus Walleij 2982389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2992389d501SLinus Walleij int 3002389d501SLinus Walleij default 4 3012389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 30226a8e96aSMax Filippov 30326a8e96aSMax Filippovconfig XTENSA_MX 30426a8e96aSMax Filippov bool 30526a8e96aSMax Filippov select IRQ_DOMAIN 3060e6c027cSSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 30796ca848eSSricharan R 3080547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 309debf69cfSRobert Hancock bool "Xilinx Interrupt Controller IP" 310fd31000dSJamie Iles depends on OF_ADDRESS 3110547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 312debf69cfSRobert Hancock help 313debf69cfSRobert Hancock Support for the Xilinx Interrupt Controller IP core. 314debf69cfSRobert Hancock This is used as a primary controller with MicroBlaze and can also 315debf69cfSRobert Hancock be used as a secondary chained controller on other platforms. 3160547dc78SZubair Lutfullah Kakakhel 31796ca848eSSricharan Rconfig IRQ_CROSSBAR 31896ca848eSSricharan R bool 31996ca848eSSricharan R help 320f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 32196ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 32296ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 32396ca848eSSricharan R routed to one of the free irqchip interrupt lines. 32489323f8cSGrygorii Strashko 32589323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 32689323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 32789323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 32889323f8cSGrygorii Strashko help 32989323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 33089323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 3318a19b8f1SAndrew Bresticker 3328a19b8f1SAndrew Brestickerconfig MIPS_GIC 3338a19b8f1SAndrew Bresticker bool 3348190cc57SSamuel Holland select GENERIC_IRQ_IPI if SMP 3358190cc57SSamuel Holland select IRQ_DOMAIN_HIERARCHY 3368a19b8f1SAndrew Bresticker select MIPS_CM 3378a764482SYoshinori Sato 33844e08e70SPaul Burtonconfig INGENIC_IRQ 33944e08e70SPaul Burton bool 34044e08e70SPaul Burton depends on MACH_INGENIC 34144e08e70SPaul Burton default y 34278c10e55SLinus Torvalds 3439536eba0SPaul Cercueilconfig INGENIC_TCU_IRQ 3449536eba0SPaul Cercueil bool "Ingenic JZ47xx TCU interrupt controller" 3459536eba0SPaul Cercueil default MACH_INGENIC 3469536eba0SPaul Cercueil depends on MIPS || COMPILE_TEST 3479536eba0SPaul Cercueil select MFD_SYSCON 3488084499bSYueHaibing select GENERIC_IRQ_CHIP 3499536eba0SPaul Cercueil help 3509536eba0SPaul Cercueil Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic 3519536eba0SPaul Cercueil JZ47xx SoCs. 3529536eba0SPaul Cercueil 3539536eba0SPaul Cercueil If unsure, say N. 3549536eba0SPaul Cercueil 355e324c4dcSShenwei Wangconfig IMX_GPCV2 356e324c4dcSShenwei Wang bool 357e324c4dcSShenwei Wang select IRQ_DOMAIN 358e324c4dcSShenwei Wang help 359e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 3607e4ac676SOleksij Rempel 3617e4ac676SOleksij Rempelconfig IRQ_MXS 3627e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 3637e4ac676SOleksij Rempel select IRQ_DOMAIN 3647e4ac676SOleksij Rempel select STMP_DEVICE 365c27f29bbSThomas Petazzoni 36619d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 36719d99164SAlexandre Belloni bool 36819d99164SAlexandre Belloni select IRQ_DOMAIN 36919d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 37019d99164SAlexandre Belloni 371a68a63cbSThomas Petazzoniconfig MVEBU_GICP 372a68a63cbSThomas Petazzoni bool 373a68a63cbSThomas Petazzoni 374e0de91a9SThomas Petazzoniconfig MVEBU_ICU 375e0de91a9SThomas Petazzoni bool 376e0de91a9SThomas Petazzoni 377c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 378c27f29bbSThomas Petazzoni bool 37913e7accbSThomas Gleixner select GENERIC_MSI_IRQ 3809e2c986cSMarc Zyngier 381a109893bSThomas Petazzoniconfig MVEBU_PIC 382a109893bSThomas Petazzoni bool 383a109893bSThomas Petazzoni 38461ce8d8dSMiquel Raynalconfig MVEBU_SEI 38561ce8d8dSMiquel Raynal bool 38661ce8d8dSMiquel Raynal 3870dcd9f87SRasmus Villemoesconfig LS_EXTIRQ 3880dcd9f87SRasmus Villemoes def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3890dcd9f87SRasmus Villemoes select MFD_SYSCON 3900dcd9f87SRasmus Villemoes 391b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 392b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3939c1a7bfcSLukas Bulwahn depends on PCI_MSI 394b8f3ebe6SMinghuan Lian 3959e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3969e2c986cSMarc Zyngier bool 3970efacbbaSLinus Torvalds 398e0720416SAlexandre TORGUEconfig STM32_EXTI 399e0720416SAlexandre TORGUE bool 400e0720416SAlexandre TORGUE select IRQ_DOMAIN 4010e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 402f20cc9b0SAgustin Vega-Frias 403f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 404f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 405f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 406f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 407f20cc9b0SAgustin Vega-Frias help 408f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 409f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 4105ed34d3aSMasahiro Yamada 4115ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 4125ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 4135ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 4145ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 4155ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 4165ed34d3aSMasahiro Yamada help 4175ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 418c94fb639SRandy Dunlap 419215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 420a947aa00SNeil Armstrong tristate "Meson GPIO Interrupt Multiplexer" 421a947aa00SNeil Armstrong depends on ARCH_MESON || COMPILE_TEST 422a947aa00SNeil Armstrong default ARCH_MESON 423215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 424215f4cc0SJerome Brunet help 425215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 426215f4cc0SJerome Brunet 4274235ff50SMiodrag Dinicconfig GOLDFISH_PIC 4284235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 4294235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 430969ac78dSRandy Dunlap select GENERIC_IRQ_CHIP 4314235ff50SMiodrag Dinic select IRQ_DOMAIN 4324235ff50SMiodrag Dinic help 4334235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 4344235ff50SMiodrag Dinic for Goldfish based virtual platforms. 4354235ff50SMiodrag Dinic 436f55c73aeSArchana Sathyakumarconfig QCOM_PDC 4374acd8a4bSSaravana Kannan tristate "QCOM PDC" 438f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 439f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 440f55c73aeSArchana Sathyakumar help 441f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 442f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 443f55c73aeSArchana Sathyakumar 444a6199bb5SShawn Guoconfig QCOM_MPM 445a6199bb5SShawn Guo tristate "QCOM MPM" 446a6199bb5SShawn Guo depends on ARCH_QCOM 447fa4dcc88SYueHaibing depends on MAILBOX 448a6199bb5SShawn Guo select IRQ_DOMAIN_HIERARCHY 449a6199bb5SShawn Guo help 450a6199bb5SShawn Guo MSM Power Manager driver to manage and configure wakeup 451a6199bb5SShawn Guo IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 452a6199bb5SShawn Guo 453d8a5f5f7SGuo Renconfig CSKY_MPINTC 454be1abc5bSGuo Ren bool 455d8a5f5f7SGuo Ren depends on CSKY 456d8a5f5f7SGuo Ren help 457d8a5f5f7SGuo Ren Say yes here to enable C-SKY SMP interrupt controller driver used 458d8a5f5f7SGuo Ren for C-SKY SMP system. 459656b42deSRandy Dunlap In fact it's not mmio map in hardware and it uses ld/st to visit the 460d8a5f5f7SGuo Ren controller's register inside CPU. 461d8a5f5f7SGuo Ren 462edff1b48SGuo Renconfig CSKY_APB_INTC 463edff1b48SGuo Ren bool "C-SKY APB Interrupt Controller" 464edff1b48SGuo Ren depends on CSKY 465edff1b48SGuo Ren help 466edff1b48SGuo Ren Say yes here to enable C-SKY APB interrupt controller driver used 467656b42deSRandy Dunlap by C-SKY single core SOC system. It uses mmio map apb-bus to visit 468edff1b48SGuo Ren the controller's register. 469edff1b48SGuo Ren 4700136afa0SLucas Stachconfig IMX_IRQSTEER 4710136afa0SLucas Stach bool "i.MX IRQSTEER support" 4720136afa0SLucas Stach depends on ARCH_MXC || COMPILE_TEST 4730136afa0SLucas Stach default ARCH_MXC 4740136afa0SLucas Stach select IRQ_DOMAIN 4750136afa0SLucas Stach help 4760136afa0SLucas Stach Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 4770136afa0SLucas Stach 4782fbb1396SJoakim Zhangconfig IMX_INTMUX 479a890caebSGeert Uytterhoeven bool "i.MX INTMUX support" if COMPILE_TEST 480a890caebSGeert Uytterhoeven default y if ARCH_MXC 4812fbb1396SJoakim Zhang select IRQ_DOMAIN 4822fbb1396SJoakim Zhang help 4832fbb1396SJoakim Zhang Support for the i.MX INTMUX interrupt multiplexer. 4842fbb1396SJoakim Zhang 48570afdab9SFrank Liconfig IMX_MU_MSI 48670afdab9SFrank Li tristate "i.MX MU used as MSI controller" 48770afdab9SFrank Li depends on OF && HAS_IOMEM 4886c9f7434SGeert Uytterhoeven depends on ARCH_MXC || COMPILE_TEST 48970afdab9SFrank Li default m if ARCH_MXC 49070afdab9SFrank Li select IRQ_DOMAIN 49170afdab9SFrank Li select IRQ_DOMAIN_HIERARCHY 49213e7accbSThomas Gleixner select GENERIC_MSI_IRQ 49370afdab9SFrank Li help 4946c9f7434SGeert Uytterhoeven Provide a driver for the i.MX Messaging Unit block used as a 4956c9f7434SGeert Uytterhoeven CPU-to-CPU MSI controller. This requires a specially crafted DT 4966c9f7434SGeert Uytterhoeven to make use of this driver. 49770afdab9SFrank Li 49870afdab9SFrank Li If unsure, say N 49970afdab9SFrank Li 5009e543e22SJiaxun Yangconfig LS1X_IRQ 5019e543e22SJiaxun Yang bool "Loongson-1 Interrupt Controller" 5029e543e22SJiaxun Yang depends on MACH_LOONGSON32 5039e543e22SJiaxun Yang default y 5049e543e22SJiaxun Yang select IRQ_DOMAIN 5059e543e22SJiaxun Yang select GENERIC_IRQ_CHIP 5069e543e22SJiaxun Yang help 5079e543e22SJiaxun Yang Support for the Loongson-1 platform Interrupt Controller. 5089e543e22SJiaxun Yang 509cd844b07SLokesh Vutlaconfig TI_SCI_INTR_IRQCHIP 510cd844b07SLokesh Vutla bool 511cd844b07SLokesh Vutla depends on TI_SCI_PROTOCOL 512cd844b07SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 513cd844b07SLokesh Vutla help 514cd844b07SLokesh Vutla This enables the irqchip driver support for K3 Interrupt router 515cd844b07SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 516cd844b07SLokesh Vutla If you wish to use interrupt router irq resources managed by the 517cd844b07SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 518cd844b07SLokesh Vutla 5199f1463b8SLokesh Vutlaconfig TI_SCI_INTA_IRQCHIP 5209f1463b8SLokesh Vutla bool 5219f1463b8SLokesh Vutla depends on TI_SCI_PROTOCOL 5229f1463b8SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 523f011df61SLokesh Vutla select TI_SCI_INTA_MSI_DOMAIN 5249f1463b8SLokesh Vutla help 5259f1463b8SLokesh Vutla This enables the irqchip driver support for K3 Interrupt aggregator 5269f1463b8SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 5279f1463b8SLokesh Vutla If you wish to use interrupt aggregator irq resources managed by the 5289f1463b8SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 5299f1463b8SLokesh Vutla 53004e2d1e0SGrzegorz Jaszczykconfig TI_PRUSS_INTC 531b8e594faSSuman Anna tristate 532b8e594faSSuman Anna depends on TI_PRUSS 533b8e594faSSuman Anna default TI_PRUSS 53404e2d1e0SGrzegorz Jaszczyk select IRQ_DOMAIN 53504e2d1e0SGrzegorz Jaszczyk help 53604e2d1e0SGrzegorz Jaszczyk This enables support for the PRU-ICSS Local Interrupt Controller 53704e2d1e0SGrzegorz Jaszczyk present within a PRU-ICSS subsystem present on various TI SoCs. 53804e2d1e0SGrzegorz Jaszczyk The PRUSS INTC enables various interrupts to be routed to multiple 53904e2d1e0SGrzegorz Jaszczyk different processors within the SoC. 54004e2d1e0SGrzegorz Jaszczyk 5416b7ce892SAnup Patelconfig RISCV_INTC 542d8fb1307SConor Dooley bool 5436b7ce892SAnup Patel depends on RISCV 544832f15f4SAnup Patel select IRQ_DOMAIN_HIERARCHY 5456b7ce892SAnup Patel 5462333df5aSAnup Patelconfig RISCV_APLIC 5472333df5aSAnup Patel bool 5482333df5aSAnup Patel depends on RISCV 5492333df5aSAnup Patel select IRQ_DOMAIN_HIERARCHY 5502333df5aSAnup Patel 551ca8df97fSAnup Patelconfig RISCV_APLIC_MSI 552ca8df97fSAnup Patel bool 553ca8df97fSAnup Patel depends on RISCV_APLIC 554ca8df97fSAnup Patel select GENERIC_MSI_IRQ 555ca8df97fSAnup Patel default RISCV_APLIC 556ca8df97fSAnup Patel 55721a8f8a0SAnup Patelconfig RISCV_IMSIC 55821a8f8a0SAnup Patel bool 55921a8f8a0SAnup Patel depends on RISCV 56021a8f8a0SAnup Patel select IRQ_DOMAIN_HIERARCHY 56121a8f8a0SAnup Patel select GENERIC_IRQ_MATRIX_ALLOCATOR 56221a8f8a0SAnup Patel select GENERIC_MSI_IRQ 56321a8f8a0SAnup Patel 5645c5a71d0SAnup Patelconfig RISCV_IMSIC_PCI 5655c5a71d0SAnup Patel bool 5665c5a71d0SAnup Patel depends on RISCV_IMSIC 5675c5a71d0SAnup Patel depends on PCI 5685c5a71d0SAnup Patel depends on PCI_MSI 5695c5a71d0SAnup Patel default RISCV_IMSIC 5705c5a71d0SAnup Patel 5718237f8bcSChristoph Hellwigconfig SIFIVE_PLIC 572fdb1742aSConor Dooley bool 5738237f8bcSChristoph Hellwig depends on RISCV 574466008f9SYash Shah select IRQ_DOMAIN_HIERARCHY 575de078949SSamuel Holland select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 57601493855SJonathan Neuschäfer 577e4e53503SChanghuang Liangconfig STARFIVE_JH8100_INTC 578e4e53503SChanghuang Liang bool "StarFive JH8100 External Interrupt Controller" 579e4e53503SChanghuang Liang depends on ARCH_STARFIVE || COMPILE_TEST 580e4e53503SChanghuang Liang default ARCH_STARFIVE 581e4e53503SChanghuang Liang select IRQ_DOMAIN_HIERARCHY 582e4e53503SChanghuang Liang help 583e4e53503SChanghuang Liang This enables support for the INTC chip found in StarFive JH8100 584e4e53503SChanghuang Liang SoC. 585e4e53503SChanghuang Liang 586e4e53503SChanghuang Liang If you don't know what to do here, say Y. 587e4e53503SChanghuang Liang 588b74416dbSHyunki Kooconfig EXYNOS_IRQ_COMBINER 589b74416dbSHyunki Koo bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST 590b74416dbSHyunki Koo depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST 591b74416dbSHyunki Koo help 592b74416dbSHyunki Koo Say yes here to add support for the IRQ combiner devices embedded 593b74416dbSHyunki Koo in Samsung Exynos chips. 594b74416dbSHyunki Koo 595b2d3e335SHuacai Chenconfig IRQ_LOONGARCH_CPU 596b2d3e335SHuacai Chen bool 597b2d3e335SHuacai Chen select GENERIC_IRQ_CHIP 598b2d3e335SHuacai Chen select IRQ_DOMAIN 59942a7d887STiezhu Yang select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP 60070f7b6c0SHuacai Chen select LOONGSON_HTVEC 6018d5356f9SHuacai Chen select LOONGSON_LIOINTC 6028d5356f9SHuacai Chen select LOONGSON_EIOINTC 6038d5356f9SHuacai Chen select LOONGSON_PCH_PIC 6048d5356f9SHuacai Chen select LOONGSON_PCH_MSI 6058d5356f9SHuacai Chen select LOONGSON_PCH_LPC 606b2d3e335SHuacai Chen help 607b2d3e335SHuacai Chen Support for the LoongArch CPU Interrupt Controller. For details of 608b2d3e335SHuacai Chen irq chip hierarchy on LoongArch platforms please read the document 60951712e49SCosta Shulyupin Documentation/arch/loongarch/irq-chip-model.rst. 610b2d3e335SHuacai Chen 611dbb15226SJiaxun Yangconfig LOONGSON_LIOINTC 612dbb15226SJiaxun Yang bool "Loongson Local I/O Interrupt Controller" 613dbb15226SJiaxun Yang depends on MACH_LOONGSON64 614dbb15226SJiaxun Yang default y 615dbb15226SJiaxun Yang select IRQ_DOMAIN 616dbb15226SJiaxun Yang select GENERIC_IRQ_CHIP 617dbb15226SJiaxun Yang help 618dbb15226SJiaxun Yang Support for the Loongson Local I/O Interrupt Controller. 619dbb15226SJiaxun Yang 620dd281e1aSHuacai Chenconfig LOONGSON_EIOINTC 621dd281e1aSHuacai Chen bool "Loongson Extend I/O Interrupt Controller" 622dd281e1aSHuacai Chen depends on LOONGARCH 623dd281e1aSHuacai Chen depends on MACH_LOONGSON64 624dd281e1aSHuacai Chen default MACH_LOONGSON64 625dd281e1aSHuacai Chen select IRQ_DOMAIN_HIERARCHY 626dd281e1aSHuacai Chen select GENERIC_IRQ_CHIP 627dd281e1aSHuacai Chen help 628dd281e1aSHuacai Chen Support for the Loongson3 Extend I/O Interrupt Vector Controller. 629dd281e1aSHuacai Chen 630a93f1d90SJiaxun Yangconfig LOONGSON_HTPIC 631a93f1d90SJiaxun Yang bool "Loongson3 HyperTransport PIC Controller" 632987a3e03SHuacai Chen depends on MACH_LOONGSON64 && MIPS 633a93f1d90SJiaxun Yang default y 634a93f1d90SJiaxun Yang select IRQ_DOMAIN 635a93f1d90SJiaxun Yang select GENERIC_IRQ_CHIP 636a93f1d90SJiaxun Yang help 637a93f1d90SJiaxun Yang Support for the Loongson-3 HyperTransport PIC Controller. 638a93f1d90SJiaxun Yang 639818e915fSJiaxun Yangconfig LOONGSON_HTVEC 640987a3e03SHuacai Chen bool "Loongson HyperTransport Interrupt Vector Controller" 641d77aeb5dSIngo Molnar depends on MACH_LOONGSON64 642818e915fSJiaxun Yang default MACH_LOONGSON64 643818e915fSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 644818e915fSJiaxun Yang help 645987a3e03SHuacai Chen Support for the Loongson HyperTransport Interrupt Vector Controller. 646818e915fSJiaxun Yang 647ef8c01ebSJiaxun Yangconfig LOONGSON_PCH_PIC 648ef8c01ebSJiaxun Yang bool "Loongson PCH PIC Controller" 649bcdd75c5SHuacai Chen depends on MACH_LOONGSON64 650ef8c01ebSJiaxun Yang default MACH_LOONGSON64 651ef8c01ebSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 652ef8c01ebSJiaxun Yang select IRQ_FASTEOI_HIERARCHY_HANDLERS 653ef8c01ebSJiaxun Yang help 654ef8c01ebSJiaxun Yang Support for the Loongson PCH PIC Controller. 655ef8c01ebSJiaxun Yang 656632dcc2cSJiaxun Yangconfig LOONGSON_PCH_MSI 657a23df9a4SJiaxun Yang bool "Loongson PCH MSI Controller" 65802308732SHuacai Chen depends on MACH_LOONGSON64 659632dcc2cSJiaxun Yang depends on PCI 660632dcc2cSJiaxun Yang default MACH_LOONGSON64 661632dcc2cSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 662632dcc2cSJiaxun Yang select PCI_MSI 663632dcc2cSJiaxun Yang help 664632dcc2cSJiaxun Yang Support for the Loongson PCH MSI Controller. 665632dcc2cSJiaxun Yang 666ee73f14eSHuacai Chenconfig LOONGSON_PCH_LPC 667ee73f14eSHuacai Chen bool "Loongson PCH LPC Controller" 668e7ccba77SJianmin Lv depends on LOONGARCH 669ee73f14eSHuacai Chen depends on MACH_LOONGSON64 670e7ccba77SJianmin Lv default MACH_LOONGSON64 671ee73f14eSHuacai Chen select IRQ_DOMAIN_HIERARCHY 672ee73f14eSHuacai Chen help 673ee73f14eSHuacai Chen Support for the Loongson PCH LPC Controller. 674ee73f14eSHuacai Chen 675ad4c938cSMark-PK Tsaiconfig MST_IRQ 676ad4c938cSMark-PK Tsai bool "MStar Interrupt Controller" 67761b0648dSGeert Uytterhoeven depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST 678ad4c938cSMark-PK Tsai default ARCH_MEDIATEK 679ad4c938cSMark-PK Tsai select IRQ_DOMAIN 680ad4c938cSMark-PK Tsai select IRQ_DOMAIN_HIERARCHY 681ad4c938cSMark-PK Tsai help 682ad4c938cSMark-PK Tsai Support MStar Interrupt Controller. 683ad4c938cSMark-PK Tsai 684fead4dd4SJonathan Neuschäferconfig WPCM450_AIC 685fead4dd4SJonathan Neuschäfer bool "Nuvoton WPCM450 Advanced Interrupt Controller" 68694bc9420SMarc Zyngier depends on ARCH_WPCM450 687fead4dd4SJonathan Neuschäfer help 688fead4dd4SJonathan Neuschäfer Support for the interrupt controller in the Nuvoton WPCM450 BMC SoC. 689fead4dd4SJonathan Neuschäfer 690529ea368SThomas Bogendoerferconfig IRQ_IDT3243X 691529ea368SThomas Bogendoerfer bool 692529ea368SThomas Bogendoerfer select GENERIC_IRQ_CHIP 693529ea368SThomas Bogendoerfer select IRQ_DOMAIN 694529ea368SThomas Bogendoerfer 69576cde263SHector Martinconfig APPLE_AIC 69676cde263SHector Martin bool "Apple Interrupt Controller (AIC)" 69776cde263SHector Martin depends on ARM64 6985b44955dSGeert Uytterhoeven depends on ARCH_APPLE || COMPILE_TEST 699c19f8971SMarc Zyngier select GENERIC_IRQ_IPI_MUX 70076cde263SHector Martin help 70176cde263SHector Martin Support for the Apple Interrupt Controller found on Apple Silicon SoCs, 70276cde263SHector Martin such as the M1. 70376cde263SHector Martin 70400fa3461SClaudiu Bezneaconfig MCHP_EIC 70500fa3461SClaudiu Beznea bool "Microchip External Interrupt Controller" 70600fa3461SClaudiu Beznea depends on ARCH_AT91 || COMPILE_TEST 70700fa3461SClaudiu Beznea select IRQ_DOMAIN 70800fa3461SClaudiu Beznea select IRQ_DOMAIN_HIERARCHY 70900fa3461SClaudiu Beznea help 71000fa3461SClaudiu Beznea Support for Microchip External Interrupt Controller. 71100fa3461SClaudiu Beznea 712f7189d93SQin Jianconfig SUNPLUS_SP7021_INTC 713f7189d93SQin Jian bool "Sunplus SP7021 interrupt controller" if COMPILE_TEST 714f7189d93SQin Jian default SOC_SP7021 715f7189d93SQin Jian help 716f7189d93SQin Jian Support for the Sunplus SP7021 Interrupt Controller IP core. 717f7189d93SQin Jian SP7021 SoC has 2 Chips: C-Chip & P-Chip. This is used as a 718f7189d93SQin Jian chained controller, routing all interrupt source in P-Chip to 719f7189d93SQin Jian the primary controller on C-Chip. 720f7189d93SQin Jian 72101493855SJonathan Neuschäferendmenu 722