1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2c94fb639SRandy Dunlapmenu "IRQ chip support" 3c94fb639SRandy Dunlap 4f6e916b8SThomas Petazzoniconfig IRQCHIP 5f6e916b8SThomas Petazzoni def_bool y 6f6e916b8SThomas Petazzoni depends on OF_IRQ 7f6e916b8SThomas Petazzoni 881243e44SRob Herringconfig ARM_GIC 981243e44SRob Herring bool 109a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 110c9e4982SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1281243e44SRob Herring 139c8edddfSJon Hunterconfig ARM_GIC_PM 149c8edddfSJon Hunter bool 159c8edddfSJon Hunter depends on PM 169c8edddfSJon Hunter select ARM_GIC 179c8edddfSJon Hunter 18a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 19a27d21e0SLinus Walleij int 2070265523SJiangfeng Xiao depends on ARM_GIC 21a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 22a27d21e0SLinus Walleij default 1 23a27d21e0SLinus Walleij 24853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 25853a33ceSSuravee Suthikulpanit bool 263ee80364SArnd Bergmann depends on PCI 273ee80364SArnd Bergmann select ARM_GIC 283ee80364SArnd Bergmann select PCI_MSI 29853a33ceSSuravee Suthikulpanit 3081243e44SRob Herringconfig GIC_NON_BANKED 3181243e44SRob Herring bool 3281243e44SRob Herring 33021f6537SMarc Zyngierconfig ARM_GIC_V3 34021f6537SMarc Zyngier bool 35443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 36e3825ba1SMarc Zyngier select PARTITION_PERCPU 37956ae91aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 38021f6537SMarc Zyngier 3919812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4019812729SMarc Zyngier bool 4129f41139SMarc Zyngier select GENERIC_MSI_IRQ_DOMAIN 4229f41139SMarc Zyngier default ARM_GIC_V3 4329f41139SMarc Zyngier 4429f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4529f41139SMarc Zyngier bool 4629f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 473ee80364SArnd Bergmann depends on PCI 483ee80364SArnd Bergmann depends on PCI_MSI 4929f41139SMarc Zyngier default ARM_GIC_V3_ITS 50292ec080SUwe Kleine-König 517afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 527afe031cSBogdan Purcareata bool 537afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 547afe031cSBogdan Purcareata depends on FSL_MC_BUS 557afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 567afe031cSBogdan Purcareata 5744430ec0SRob Herringconfig ARM_NVIC 5844430ec0SRob Herring bool 592d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 6044430ec0SRob Herring select GENERIC_IRQ_CHIP 6144430ec0SRob Herring 6244430ec0SRob Herringconfig ARM_VIC 6344430ec0SRob Herring bool 6444430ec0SRob Herring select IRQ_DOMAIN 6544430ec0SRob Herring 6644430ec0SRob Herringconfig ARM_VIC_NR 6744430ec0SRob Herring int 6844430ec0SRob Herring default 4 if ARCH_S5PV210 6944430ec0SRob Herring default 2 7044430ec0SRob Herring depends on ARM_VIC 7144430ec0SRob Herring help 7244430ec0SRob Herring The maximum number of VICs available in the system, for 7344430ec0SRob Herring power management. 7444430ec0SRob Herring 75fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 76fed6d336SThomas Petazzoni bool 77fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 783ee80364SArnd Bergmann select PCI_MSI if PCI 79e31793a3SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 80fed6d336SThomas Petazzoni 81e6b78f2cSAntoine Tenartconfig ALPINE_MSI 82e6b78f2cSAntoine Tenart bool 833ee80364SArnd Bergmann depends on PCI 843ee80364SArnd Bergmann select PCI_MSI 85e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 86e6b78f2cSAntoine Tenart 871eb77c3bSTalel Shenharconfig AL_FIC 881eb77c3bSTalel Shenhar bool "Amazon's Annapurna Labs Fabric Interrupt Controller" 891eb77c3bSTalel Shenhar depends on OF || COMPILE_TEST 901eb77c3bSTalel Shenhar select GENERIC_IRQ_CHIP 911eb77c3bSTalel Shenhar select IRQ_DOMAIN 921eb77c3bSTalel Shenhar help 931eb77c3bSTalel Shenhar Support Amazon's Annapurna Labs Fabric Interrupt Controller. 941eb77c3bSTalel Shenhar 95b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 96b1479ebbSBoris BREZILLON bool 97b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 98b1479ebbSBoris BREZILLON select IRQ_DOMAIN 99b1479ebbSBoris BREZILLON select SPARSE_IRQ 100b1479ebbSBoris BREZILLON 101b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 102b1479ebbSBoris BREZILLON bool 103b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 104b1479ebbSBoris BREZILLON select IRQ_DOMAIN 105b1479ebbSBoris BREZILLON select SPARSE_IRQ 106b1479ebbSBoris BREZILLON 1070509cfdeSRalf Baechleconfig I8259 1080509cfdeSRalf Baechle bool 1090509cfdeSRalf Baechle select IRQ_DOMAIN 1100509cfdeSRalf Baechle 111c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 112c7c42ec2SSimon Arlott bool 113c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 114c7c42ec2SSimon Arlott select IRQ_DOMAIN 115d0ed5e8eSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 116c7c42ec2SSimon Arlott 1175f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 118c057c799SFlorian Fainelli tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" 119c057c799SFlorian Fainelli depends on ARCH_BRCMSTB || BMIPS_GENERIC 120c057c799SFlorian Fainelli default ARCH_BRCMSTB || BMIPS_GENERIC 1215f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1225f7f0317SKevin Cernekee select IRQ_DOMAIN 123b8d9884aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1245f7f0317SKevin Cernekee 125a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 126a4fcbb86SKevin Cernekee bool 127a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 128a4fcbb86SKevin Cernekee select IRQ_DOMAIN 129a4fcbb86SKevin Cernekee 1307f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 131*51d9db5cSFlorian Fainelli tristate "Broadcom STB generic L2 interrupt controller driver" 132*51d9db5cSFlorian Fainelli depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 133*51d9db5cSFlorian Fainelli default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC 1347f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1357f646e92SFlorian Fainelli select IRQ_DOMAIN 1367f646e92SFlorian Fainelli 1370145beedSBartosz Golaszewskiconfig DAVINCI_AINTC 1380145beedSBartosz Golaszewski bool 1390145beedSBartosz Golaszewski select GENERIC_IRQ_CHIP 1400145beedSBartosz Golaszewski select IRQ_DOMAIN 1410145beedSBartosz Golaszewski 1420fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC 1430fc3d74cSBartosz Golaszewski bool 1440fc3d74cSBartosz Golaszewski select GENERIC_IRQ_CHIP 1450fc3d74cSBartosz Golaszewski select IRQ_DOMAIN 1460fc3d74cSBartosz Golaszewski 147350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 148350d71b9SSebastian Hesselbarth bool 149e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 15054a38440SZhen Lei select IRQ_DOMAIN_HIERARCHY 151350d71b9SSebastian Hesselbarth 1526ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1536ee532e2SLinus Walleij bool 1546ee532e2SLinus Walleij select IRQ_DOMAIN 1556ee532e2SLinus Walleij select SPARSE_IRQ 1566ee532e2SLinus Walleij 1579a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1589a7c4abdSMaJun bool 1599a7c4abdSMaJun select ARM_GIC_V3 1609a7c4abdSMaJun select ARM_GIC_V3_ITS 1619a7c4abdSMaJun 162b6ef9161SJames Hoganconfig IMGPDC_IRQ 163b6ef9161SJames Hogan bool 164b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 165b6ef9161SJames Hogan select IRQ_DOMAIN 166b6ef9161SJames Hogan 1675b978c10SLinus Walleijconfig IXP4XX_IRQ 1685b978c10SLinus Walleij bool 1695b978c10SLinus Walleij select IRQ_DOMAIN 1705b978c10SLinus Walleij select SPARSE_IRQ 1715b978c10SLinus Walleij 172da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ 173da0abe1aSRichard Fitzgerald tristate 174da0abe1aSRichard Fitzgerald 17567e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 17667e38cf2SRalf Baechle bool 17767e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1783838a547SPaul Burton select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING 17967e38cf2SRalf Baechle select IRQ_DOMAIN 18018416e45SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 18167e38cf2SRalf Baechle 182afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 183afc98d90SAlexander Shiyan bool 184afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 185afc98d90SAlexander Shiyan select IRQ_DOMAIN 186afc98d90SAlexander Shiyan select SPARSE_IRQ 187afc98d90SAlexander Shiyan default y 188afc98d90SAlexander Shiyan 1899b54470aSStafford Horneconfig OMPIC 1909b54470aSStafford Horne bool 1919b54470aSStafford Horne 1924db8e6d2SStefan Kristianssonconfig OR1K_PIC 1934db8e6d2SStefan Kristiansson bool 1944db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1954db8e6d2SStefan Kristiansson 1968598066cSFelipe Balbiconfig OMAP_IRQCHIP 1978598066cSFelipe Balbi bool 1988598066cSFelipe Balbi select GENERIC_IRQ_CHIP 1998598066cSFelipe Balbi select IRQ_DOMAIN 2008598066cSFelipe Balbi 2019dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 2029dbd90f1SSebastian Hesselbarth bool 2039dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 2049dbd90f1SSebastian Hesselbarth 205aaa8666aSCristian Birsanconfig PIC32_EVIC 206aaa8666aSCristian Birsan bool 207aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 208aaa8666aSCristian Birsan select IRQ_DOMAIN 209aaa8666aSCristian Birsan 210981b58f6SRich Felkerconfig JCORE_AIC 2113602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 2123602ffdeSRich Felker depends on OF 213981b58f6SRich Felker select IRQ_DOMAIN 214981b58f6SRich Felker help 215981b58f6SRich Felker Support for the J-Core integrated AIC. 216981b58f6SRich Felker 217d852e62aSManivannan Sadhasivamconfig RDA_INTC 218d852e62aSManivannan Sadhasivam bool 219d852e62aSManivannan Sadhasivam select IRQ_DOMAIN 220d852e62aSManivannan Sadhasivam 22144358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 22202d7e041SGeert Uytterhoeven bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 22344358048SMagnus Damm select IRQ_DOMAIN 22402d7e041SGeert Uytterhoeven help 22502d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 22602d7e041SGeert Uytterhoeven interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 22744358048SMagnus Damm 228fbc83b7fSMagnus Dammconfig RENESAS_IRQC 22972d44c0cSLad Prabhakar bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST 23099c221dfSMagnus Damm select GENERIC_IRQ_CHIP 231fbc83b7fSMagnus Damm select IRQ_DOMAIN 23202d7e041SGeert Uytterhoeven help 23302d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 23472d44c0cSLad Prabhakar devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. 235fbc83b7fSMagnus Damm 236a644ccb8SGeert Uytterhoevenconfig RENESAS_RZA1_IRQC 23702d7e041SGeert Uytterhoeven bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST 238a644ccb8SGeert Uytterhoeven select IRQ_DOMAIN_HIERARCHY 23902d7e041SGeert Uytterhoeven help 24002d7e041SGeert Uytterhoeven Enable support for the Renesas RZ/A1 Interrupt Controller, to use up 24102d7e041SGeert Uytterhoeven to 8 external interrupts with configurable sense select. 242a644ccb8SGeert Uytterhoeven 24303ac990eSMichael Walleconfig SL28CPLD_INTC 24403ac990eSMichael Walle bool "Kontron sl28cpld IRQ controller" 24503ac990eSMichael Walle depends on MFD_SL28CPLD=y || COMPILE_TEST 24603ac990eSMichael Walle select REGMAP_IRQ 24703ac990eSMichael Walle help 24803ac990eSMichael Walle Interrupt controller driver for the board management controller 24903ac990eSMichael Walle found on the Kontron sl28 CPLD. 25003ac990eSMichael Walle 25107088484SLee Jonesconfig ST_IRQCHIP 25207088484SLee Jones bool 25307088484SLee Jones select REGMAP 25407088484SLee Jones select MFD_SYSCON 25507088484SLee Jones help 25607088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 25707088484SLee Jones 258b06eb017SChristian Ruppertconfig TB10X_IRQC 259b06eb017SChristian Ruppert bool 260b06eb017SChristian Ruppert select IRQ_DOMAIN 261b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 262b06eb017SChristian Ruppert 263d01f8633SDamien Riegelconfig TS4800_IRQ 264d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 265d01f8633SDamien Riegel select IRQ_DOMAIN 2660df337cfSRichard Weinberger depends on HAS_IOMEM 267d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 268d01f8633SDamien Riegel help 269d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 270d01f8633SDamien Riegel 2712389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2722389d501SLinus Walleij bool 2732389d501SLinus Walleij select IRQ_DOMAIN 2742389d501SLinus Walleij 2752389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2762389d501SLinus Walleij int 2772389d501SLinus Walleij default 4 2782389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 27926a8e96aSMax Filippov 28026a8e96aSMax Filippovconfig XTENSA_MX 28126a8e96aSMax Filippov bool 28226a8e96aSMax Filippov select IRQ_DOMAIN 28350091212SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 28496ca848eSSricharan R 2850547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 286debf69cfSRobert Hancock bool "Xilinx Interrupt Controller IP" 287debf69cfSRobert Hancock depends on MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP 2880547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 289debf69cfSRobert Hancock help 290debf69cfSRobert Hancock Support for the Xilinx Interrupt Controller IP core. 291debf69cfSRobert Hancock This is used as a primary controller with MicroBlaze and can also 292debf69cfSRobert Hancock be used as a secondary chained controller on other platforms. 2930547dc78SZubair Lutfullah Kakakhel 29496ca848eSSricharan Rconfig IRQ_CROSSBAR 29596ca848eSSricharan R bool 29696ca848eSSricharan R help 297f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 29896ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 29996ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 30096ca848eSSricharan R routed to one of the free irqchip interrupt lines. 30189323f8cSGrygorii Strashko 30289323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 30389323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 30489323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 30589323f8cSGrygorii Strashko help 30689323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 30789323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 3088a19b8f1SAndrew Bresticker 3098a19b8f1SAndrew Brestickerconfig MIPS_GIC 3108a19b8f1SAndrew Bresticker bool 311bb11cff3SQais Yousef select GENERIC_IRQ_IPI 3128a19b8f1SAndrew Bresticker select MIPS_CM 3138a764482SYoshinori Sato 31444e08e70SPaul Burtonconfig INGENIC_IRQ 31544e08e70SPaul Burton bool 31644e08e70SPaul Burton depends on MACH_INGENIC 31744e08e70SPaul Burton default y 31878c10e55SLinus Torvalds 3199536eba0SPaul Cercueilconfig INGENIC_TCU_IRQ 3209536eba0SPaul Cercueil bool "Ingenic JZ47xx TCU interrupt controller" 3219536eba0SPaul Cercueil default MACH_INGENIC 3229536eba0SPaul Cercueil depends on MIPS || COMPILE_TEST 3239536eba0SPaul Cercueil select MFD_SYSCON 3248084499bSYueHaibing select GENERIC_IRQ_CHIP 3259536eba0SPaul Cercueil help 3269536eba0SPaul Cercueil Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic 3279536eba0SPaul Cercueil JZ47xx SoCs. 3289536eba0SPaul Cercueil 3299536eba0SPaul Cercueil If unsure, say N. 3309536eba0SPaul Cercueil 3318a764482SYoshinori Satoconfig RENESAS_H8300H_INTC 3328a764482SYoshinori Sato bool 3338a764482SYoshinori Sato select IRQ_DOMAIN 3348a764482SYoshinori Sato 3358a764482SYoshinori Satoconfig RENESAS_H8S_INTC 33602d7e041SGeert Uytterhoeven bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST 3378a764482SYoshinori Sato select IRQ_DOMAIN 33802d7e041SGeert Uytterhoeven help 33902d7e041SGeert Uytterhoeven Enable support for the Renesas H8/300 Interrupt Controller, as found 34002d7e041SGeert Uytterhoeven on Renesas H8S SoCs. 341e324c4dcSShenwei Wang 342e324c4dcSShenwei Wangconfig IMX_GPCV2 343e324c4dcSShenwei Wang bool 344e324c4dcSShenwei Wang select IRQ_DOMAIN 345e324c4dcSShenwei Wang help 346e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 3477e4ac676SOleksij Rempel 3487e4ac676SOleksij Rempelconfig IRQ_MXS 3497e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 3507e4ac676SOleksij Rempel select IRQ_DOMAIN 3517e4ac676SOleksij Rempel select STMP_DEVICE 352c27f29bbSThomas Petazzoni 35319d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 35419d99164SAlexandre Belloni bool 35519d99164SAlexandre Belloni select IRQ_DOMAIN 35619d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 35719d99164SAlexandre Belloni 358a68a63cbSThomas Petazzoniconfig MVEBU_GICP 359a68a63cbSThomas Petazzoni bool 360a68a63cbSThomas Petazzoni 361e0de91a9SThomas Petazzoniconfig MVEBU_ICU 362e0de91a9SThomas Petazzoni bool 363e0de91a9SThomas Petazzoni 364c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 365c27f29bbSThomas Petazzoni bool 366fa23b9d1SArnd Bergmann select GENERIC_MSI_IRQ_DOMAIN 3679e2c986cSMarc Zyngier 368a109893bSThomas Petazzoniconfig MVEBU_PIC 369a109893bSThomas Petazzoni bool 370a109893bSThomas Petazzoni 37161ce8d8dSMiquel Raynalconfig MVEBU_SEI 37261ce8d8dSMiquel Raynal bool 37361ce8d8dSMiquel Raynal 3740dcd9f87SRasmus Villemoesconfig LS_EXTIRQ 3750dcd9f87SRasmus Villemoes def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3760dcd9f87SRasmus Villemoes select MFD_SYSCON 3770dcd9f87SRasmus Villemoes 378b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 379b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 380b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 381b8f3ebe6SMinghuan Lian 3829e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3839e2c986cSMarc Zyngier bool 3840efacbbaSLinus Torvalds 385e0720416SAlexandre TORGUEconfig STM32_EXTI 386e0720416SAlexandre TORGUE bool 387e0720416SAlexandre TORGUE select IRQ_DOMAIN 3880e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 389f20cc9b0SAgustin Vega-Frias 390f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 391f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 392f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 393f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 394f20cc9b0SAgustin Vega-Frias help 395f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 396f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 3975ed34d3aSMasahiro Yamada 3985ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 3995ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 4005ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 4015ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 4025ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 4035ed34d3aSMasahiro Yamada help 4045ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 405c94fb639SRandy Dunlap 406215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 407a947aa00SNeil Armstrong tristate "Meson GPIO Interrupt Multiplexer" 408a947aa00SNeil Armstrong depends on ARCH_MESON || COMPILE_TEST 409a947aa00SNeil Armstrong default ARCH_MESON 410215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 411215f4cc0SJerome Brunet help 412215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 413215f4cc0SJerome Brunet 4144235ff50SMiodrag Dinicconfig GOLDFISH_PIC 4154235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 4164235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 417969ac78dSRandy Dunlap select GENERIC_IRQ_CHIP 4184235ff50SMiodrag Dinic select IRQ_DOMAIN 4194235ff50SMiodrag Dinic help 4204235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 4214235ff50SMiodrag Dinic for Goldfish based virtual platforms. 4224235ff50SMiodrag Dinic 423f55c73aeSArchana Sathyakumarconfig QCOM_PDC 4244acd8a4bSSaravana Kannan tristate "QCOM PDC" 425f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 426f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 427f55c73aeSArchana Sathyakumar help 428f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 429f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 430f55c73aeSArchana Sathyakumar 431d8a5f5f7SGuo Renconfig CSKY_MPINTC 432be1abc5bSGuo Ren bool 433d8a5f5f7SGuo Ren depends on CSKY 434d8a5f5f7SGuo Ren help 435d8a5f5f7SGuo Ren Say yes here to enable C-SKY SMP interrupt controller driver used 436d8a5f5f7SGuo Ren for C-SKY SMP system. 437656b42deSRandy Dunlap In fact it's not mmio map in hardware and it uses ld/st to visit the 438d8a5f5f7SGuo Ren controller's register inside CPU. 439d8a5f5f7SGuo Ren 440edff1b48SGuo Renconfig CSKY_APB_INTC 441edff1b48SGuo Ren bool "C-SKY APB Interrupt Controller" 442edff1b48SGuo Ren depends on CSKY 443edff1b48SGuo Ren help 444edff1b48SGuo Ren Say yes here to enable C-SKY APB interrupt controller driver used 445656b42deSRandy Dunlap by C-SKY single core SOC system. It uses mmio map apb-bus to visit 446edff1b48SGuo Ren the controller's register. 447edff1b48SGuo Ren 4480136afa0SLucas Stachconfig IMX_IRQSTEER 4490136afa0SLucas Stach bool "i.MX IRQSTEER support" 4500136afa0SLucas Stach depends on ARCH_MXC || COMPILE_TEST 4510136afa0SLucas Stach default ARCH_MXC 4520136afa0SLucas Stach select IRQ_DOMAIN 4530136afa0SLucas Stach help 4540136afa0SLucas Stach Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 4550136afa0SLucas Stach 4562fbb1396SJoakim Zhangconfig IMX_INTMUX 457a890caebSGeert Uytterhoeven bool "i.MX INTMUX support" if COMPILE_TEST 458a890caebSGeert Uytterhoeven default y if ARCH_MXC 4592fbb1396SJoakim Zhang select IRQ_DOMAIN 4602fbb1396SJoakim Zhang help 4612fbb1396SJoakim Zhang Support for the i.MX INTMUX interrupt multiplexer. 4622fbb1396SJoakim Zhang 4639e543e22SJiaxun Yangconfig LS1X_IRQ 4649e543e22SJiaxun Yang bool "Loongson-1 Interrupt Controller" 4659e543e22SJiaxun Yang depends on MACH_LOONGSON32 4669e543e22SJiaxun Yang default y 4679e543e22SJiaxun Yang select IRQ_DOMAIN 4689e543e22SJiaxun Yang select GENERIC_IRQ_CHIP 4699e543e22SJiaxun Yang help 4709e543e22SJiaxun Yang Support for the Loongson-1 platform Interrupt Controller. 4719e543e22SJiaxun Yang 472cd844b07SLokesh Vutlaconfig TI_SCI_INTR_IRQCHIP 473cd844b07SLokesh Vutla bool 474cd844b07SLokesh Vutla depends on TI_SCI_PROTOCOL 475cd844b07SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 476cd844b07SLokesh Vutla help 477cd844b07SLokesh Vutla This enables the irqchip driver support for K3 Interrupt router 478cd844b07SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 479cd844b07SLokesh Vutla If you wish to use interrupt router irq resources managed by the 480cd844b07SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 481cd844b07SLokesh Vutla 4829f1463b8SLokesh Vutlaconfig TI_SCI_INTA_IRQCHIP 4839f1463b8SLokesh Vutla bool 4849f1463b8SLokesh Vutla depends on TI_SCI_PROTOCOL 4859f1463b8SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 486f011df61SLokesh Vutla select TI_SCI_INTA_MSI_DOMAIN 4879f1463b8SLokesh Vutla help 4889f1463b8SLokesh Vutla This enables the irqchip driver support for K3 Interrupt aggregator 4899f1463b8SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 4909f1463b8SLokesh Vutla If you wish to use interrupt aggregator irq resources managed by the 4919f1463b8SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 4929f1463b8SLokesh Vutla 49304e2d1e0SGrzegorz Jaszczykconfig TI_PRUSS_INTC 494b8e594faSSuman Anna tristate 495b8e594faSSuman Anna depends on TI_PRUSS 496b8e594faSSuman Anna default TI_PRUSS 49704e2d1e0SGrzegorz Jaszczyk select IRQ_DOMAIN 49804e2d1e0SGrzegorz Jaszczyk help 49904e2d1e0SGrzegorz Jaszczyk This enables support for the PRU-ICSS Local Interrupt Controller 50004e2d1e0SGrzegorz Jaszczyk present within a PRU-ICSS subsystem present on various TI SoCs. 50104e2d1e0SGrzegorz Jaszczyk The PRUSS INTC enables various interrupts to be routed to multiple 50204e2d1e0SGrzegorz Jaszczyk different processors within the SoC. 50304e2d1e0SGrzegorz Jaszczyk 5046b7ce892SAnup Patelconfig RISCV_INTC 5056b7ce892SAnup Patel bool "RISC-V Local Interrupt Controller" 5066b7ce892SAnup Patel depends on RISCV 5076b7ce892SAnup Patel default y 5086b7ce892SAnup Patel help 5096b7ce892SAnup Patel This enables support for the per-HART local interrupt controller 5106b7ce892SAnup Patel found in standard RISC-V systems. The per-HART local interrupt 5116b7ce892SAnup Patel controller handles timer interrupts, software interrupts, and 5126b7ce892SAnup Patel hardware interrupts. Without a per-HART local interrupt controller, 5136b7ce892SAnup Patel a RISC-V system will be unable to handle any interrupts. 5146b7ce892SAnup Patel 5156b7ce892SAnup Patel If you don't know what to do here, say Y. 5166b7ce892SAnup Patel 5178237f8bcSChristoph Hellwigconfig SIFIVE_PLIC 5188237f8bcSChristoph Hellwig bool "SiFive Platform-Level Interrupt Controller" 5198237f8bcSChristoph Hellwig depends on RISCV 520466008f9SYash Shah select IRQ_DOMAIN_HIERARCHY 5218237f8bcSChristoph Hellwig help 5228237f8bcSChristoph Hellwig This enables support for the PLIC chip found in SiFive (and 5238237f8bcSChristoph Hellwig potentially other) RISC-V systems. The PLIC controls devices 5248237f8bcSChristoph Hellwig interrupts and connects them to each core's local interrupt 5258237f8bcSChristoph Hellwig controller. Aside from timer and software interrupts, all other 5268237f8bcSChristoph Hellwig interrupt sources are subordinate to the PLIC. 5278237f8bcSChristoph Hellwig 5288237f8bcSChristoph Hellwig If you don't know what to do here, say Y. 52901493855SJonathan Neuschäfer 530b74416dbSHyunki Kooconfig EXYNOS_IRQ_COMBINER 531b74416dbSHyunki Koo bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST 532b74416dbSHyunki Koo depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST 533b74416dbSHyunki Koo help 534b74416dbSHyunki Koo Say yes here to add support for the IRQ combiner devices embedded 535b74416dbSHyunki Koo in Samsung Exynos chips. 536b74416dbSHyunki Koo 537dbb15226SJiaxun Yangconfig LOONGSON_LIOINTC 538dbb15226SJiaxun Yang bool "Loongson Local I/O Interrupt Controller" 539dbb15226SJiaxun Yang depends on MACH_LOONGSON64 540dbb15226SJiaxun Yang default y 541dbb15226SJiaxun Yang select IRQ_DOMAIN 542dbb15226SJiaxun Yang select GENERIC_IRQ_CHIP 543dbb15226SJiaxun Yang help 544dbb15226SJiaxun Yang Support for the Loongson Local I/O Interrupt Controller. 545dbb15226SJiaxun Yang 546a93f1d90SJiaxun Yangconfig LOONGSON_HTPIC 547a93f1d90SJiaxun Yang bool "Loongson3 HyperTransport PIC Controller" 548a93f1d90SJiaxun Yang depends on MACH_LOONGSON64 549a93f1d90SJiaxun Yang default y 550a93f1d90SJiaxun Yang select IRQ_DOMAIN 551a93f1d90SJiaxun Yang select GENERIC_IRQ_CHIP 552a93f1d90SJiaxun Yang help 553a93f1d90SJiaxun Yang Support for the Loongson-3 HyperTransport PIC Controller. 554a93f1d90SJiaxun Yang 555818e915fSJiaxun Yangconfig LOONGSON_HTVEC 556818e915fSJiaxun Yang bool "Loongson3 HyperTransport Interrupt Vector Controller" 557d77aeb5dSIngo Molnar depends on MACH_LOONGSON64 558818e915fSJiaxun Yang default MACH_LOONGSON64 559818e915fSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 560818e915fSJiaxun Yang help 561818e915fSJiaxun Yang Support for the Loongson3 HyperTransport Interrupt Vector Controller. 562818e915fSJiaxun Yang 563ef8c01ebSJiaxun Yangconfig LOONGSON_PCH_PIC 564ef8c01ebSJiaxun Yang bool "Loongson PCH PIC Controller" 565ef8c01ebSJiaxun Yang depends on MACH_LOONGSON64 || COMPILE_TEST 566ef8c01ebSJiaxun Yang default MACH_LOONGSON64 567ef8c01ebSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 568ef8c01ebSJiaxun Yang select IRQ_FASTEOI_HIERARCHY_HANDLERS 569ef8c01ebSJiaxun Yang help 570ef8c01ebSJiaxun Yang Support for the Loongson PCH PIC Controller. 571ef8c01ebSJiaxun Yang 572632dcc2cSJiaxun Yangconfig LOONGSON_PCH_MSI 573a23df9a4SJiaxun Yang bool "Loongson PCH MSI Controller" 574632dcc2cSJiaxun Yang depends on MACH_LOONGSON64 || COMPILE_TEST 575632dcc2cSJiaxun Yang depends on PCI 576632dcc2cSJiaxun Yang default MACH_LOONGSON64 577632dcc2cSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 578632dcc2cSJiaxun Yang select PCI_MSI 579632dcc2cSJiaxun Yang help 580632dcc2cSJiaxun Yang Support for the Loongson PCH MSI Controller. 581632dcc2cSJiaxun Yang 582ad4c938cSMark-PK Tsaiconfig MST_IRQ 583ad4c938cSMark-PK Tsai bool "MStar Interrupt Controller" 58461b0648dSGeert Uytterhoeven depends on ARCH_MEDIATEK || ARCH_MSTARV7 || COMPILE_TEST 585ad4c938cSMark-PK Tsai default ARCH_MEDIATEK 586ad4c938cSMark-PK Tsai select IRQ_DOMAIN 587ad4c938cSMark-PK Tsai select IRQ_DOMAIN_HIERARCHY 588ad4c938cSMark-PK Tsai help 589ad4c938cSMark-PK Tsai Support MStar Interrupt Controller. 590ad4c938cSMark-PK Tsai 591fead4dd4SJonathan Neuschäferconfig WPCM450_AIC 592fead4dd4SJonathan Neuschäfer bool "Nuvoton WPCM450 Advanced Interrupt Controller" 59394bc9420SMarc Zyngier depends on ARCH_WPCM450 594fead4dd4SJonathan Neuschäfer help 595fead4dd4SJonathan Neuschäfer Support for the interrupt controller in the Nuvoton WPCM450 BMC SoC. 596fead4dd4SJonathan Neuschäfer 597529ea368SThomas Bogendoerferconfig IRQ_IDT3243X 598529ea368SThomas Bogendoerfer bool 599529ea368SThomas Bogendoerfer select GENERIC_IRQ_CHIP 600529ea368SThomas Bogendoerfer select IRQ_DOMAIN 601529ea368SThomas Bogendoerfer 60276cde263SHector Martinconfig APPLE_AIC 60376cde263SHector Martin bool "Apple Interrupt Controller (AIC)" 60476cde263SHector Martin depends on ARM64 6055b44955dSGeert Uytterhoeven depends on ARCH_APPLE || COMPILE_TEST 60676cde263SHector Martin help 60776cde263SHector Martin Support for the Apple Interrupt Controller found on Apple Silicon SoCs, 60876cde263SHector Martin such as the M1. 60976cde263SHector Martin 61001493855SJonathan Neuschäferendmenu 611