xref: /linux/drivers/irqchip/Kconfig (revision 1eb77c3bcdb70f2501f419b3da45b19acaf01072)
1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only
2c94fb639SRandy Dunlapmenu "IRQ chip support"
3c94fb639SRandy Dunlap
4f6e916b8SThomas Petazzoniconfig IRQCHIP
5f6e916b8SThomas Petazzoni	def_bool y
6f6e916b8SThomas Petazzoni	depends on OF_IRQ
7f6e916b8SThomas Petazzoni
881243e44SRob Herringconfig ARM_GIC
981243e44SRob Herring	bool
109a1091efSYingjoe Chen	select IRQ_DOMAIN_HIERARCHY
114f7799d9SPalmer Dabbelt	select GENERIC_IRQ_MULTI_HANDLER
120c9e4982SMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
1381243e44SRob Herring
149c8edddfSJon Hunterconfig ARM_GIC_PM
159c8edddfSJon Hunter	bool
169c8edddfSJon Hunter	depends on PM
179c8edddfSJon Hunter	select ARM_GIC
189c8edddfSJon Hunter	select PM_CLK
199c8edddfSJon Hunter
20a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR
21a27d21e0SLinus Walleij	int
2270265523SJiangfeng Xiao	depends on ARM_GIC
23a27d21e0SLinus Walleij	default 2 if ARCH_REALVIEW
24a27d21e0SLinus Walleij	default 1
25a27d21e0SLinus Walleij
26853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M
27853a33ceSSuravee Suthikulpanit	bool
283ee80364SArnd Bergmann	depends on PCI
293ee80364SArnd Bergmann	select ARM_GIC
303ee80364SArnd Bergmann	select PCI_MSI
31853a33ceSSuravee Suthikulpanit
3281243e44SRob Herringconfig GIC_NON_BANKED
3381243e44SRob Herring	bool
3481243e44SRob Herring
35021f6537SMarc Zyngierconfig ARM_GIC_V3
36021f6537SMarc Zyngier	bool
374f7799d9SPalmer Dabbelt	select GENERIC_IRQ_MULTI_HANDLER
38443acc4fSMarc Zyngier	select IRQ_DOMAIN_HIERARCHY
39e3825ba1SMarc Zyngier	select PARTITION_PERCPU
40956ae91aSMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
41021f6537SMarc Zyngier
4219812729SMarc Zyngierconfig ARM_GIC_V3_ITS
4319812729SMarc Zyngier	bool
4429f41139SMarc Zyngier	select GENERIC_MSI_IRQ_DOMAIN
4529f41139SMarc Zyngier	default ARM_GIC_V3
4629f41139SMarc Zyngier
4729f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI
4829f41139SMarc Zyngier	bool
4929f41139SMarc Zyngier	depends on ARM_GIC_V3_ITS
503ee80364SArnd Bergmann	depends on PCI
513ee80364SArnd Bergmann	depends on PCI_MSI
5229f41139SMarc Zyngier	default ARM_GIC_V3_ITS
53292ec080SUwe Kleine-König
547afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC
557afe031cSBogdan Purcareata	bool
567afe031cSBogdan Purcareata	depends on ARM_GIC_V3_ITS
577afe031cSBogdan Purcareata	depends on FSL_MC_BUS
587afe031cSBogdan Purcareata	default ARM_GIC_V3_ITS
597afe031cSBogdan Purcareata
6044430ec0SRob Herringconfig ARM_NVIC
6144430ec0SRob Herring	bool
622d9f59f7SStefan Agner	select IRQ_DOMAIN_HIERARCHY
6344430ec0SRob Herring	select GENERIC_IRQ_CHIP
6444430ec0SRob Herring
6544430ec0SRob Herringconfig ARM_VIC
6644430ec0SRob Herring	bool
6744430ec0SRob Herring	select IRQ_DOMAIN
684f7799d9SPalmer Dabbelt	select GENERIC_IRQ_MULTI_HANDLER
6944430ec0SRob Herring
7044430ec0SRob Herringconfig ARM_VIC_NR
7144430ec0SRob Herring	int
7244430ec0SRob Herring	default 4 if ARCH_S5PV210
7344430ec0SRob Herring	default 2
7444430ec0SRob Herring	depends on ARM_VIC
7544430ec0SRob Herring	help
7644430ec0SRob Herring	  The maximum number of VICs available in the system, for
7744430ec0SRob Herring	  power management.
7844430ec0SRob Herring
79fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ
80fed6d336SThomas Petazzoni	bool
81fed6d336SThomas Petazzoni	select GENERIC_IRQ_CHIP
823ee80364SArnd Bergmann	select PCI_MSI if PCI
83e31793a3SMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
84fed6d336SThomas Petazzoni
85e6b78f2cSAntoine Tenartconfig ALPINE_MSI
86e6b78f2cSAntoine Tenart	bool
873ee80364SArnd Bergmann	depends on PCI
883ee80364SArnd Bergmann	select PCI_MSI
89e6b78f2cSAntoine Tenart	select GENERIC_IRQ_CHIP
90e6b78f2cSAntoine Tenart
91*1eb77c3bSTalel Shenharconfig AL_FIC
92*1eb77c3bSTalel Shenhar	bool "Amazon's Annapurna Labs Fabric Interrupt Controller"
93*1eb77c3bSTalel Shenhar	depends on OF || COMPILE_TEST
94*1eb77c3bSTalel Shenhar	select GENERIC_IRQ_CHIP
95*1eb77c3bSTalel Shenhar	select IRQ_DOMAIN
96*1eb77c3bSTalel Shenhar	help
97*1eb77c3bSTalel Shenhar	  Support Amazon's Annapurna Labs Fabric Interrupt Controller.
98*1eb77c3bSTalel Shenhar
99b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ
100b1479ebbSBoris BREZILLON	bool
101b1479ebbSBoris BREZILLON	select GENERIC_IRQ_CHIP
102b1479ebbSBoris BREZILLON	select IRQ_DOMAIN
1034f7799d9SPalmer Dabbelt	select GENERIC_IRQ_MULTI_HANDLER
104b1479ebbSBoris BREZILLON	select SPARSE_IRQ
105b1479ebbSBoris BREZILLON
106b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ
107b1479ebbSBoris BREZILLON	bool
108b1479ebbSBoris BREZILLON	select GENERIC_IRQ_CHIP
109b1479ebbSBoris BREZILLON	select IRQ_DOMAIN
1104f7799d9SPalmer Dabbelt	select GENERIC_IRQ_MULTI_HANDLER
111b1479ebbSBoris BREZILLON	select SPARSE_IRQ
112b1479ebbSBoris BREZILLON
1130509cfdeSRalf Baechleconfig I8259
1140509cfdeSRalf Baechle	bool
1150509cfdeSRalf Baechle	select IRQ_DOMAIN
1160509cfdeSRalf Baechle
117c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ
118c7c42ec2SSimon Arlott	bool
119c7c42ec2SSimon Arlott	select GENERIC_IRQ_CHIP
120c7c42ec2SSimon Arlott	select IRQ_DOMAIN
121d0ed5e8eSMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
122c7c42ec2SSimon Arlott
1235f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ
1245f7f0317SKevin Cernekee	bool
1255f7f0317SKevin Cernekee	select GENERIC_IRQ_CHIP
1265f7f0317SKevin Cernekee	select IRQ_DOMAIN
127b8d9884aSMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
1285f7f0317SKevin Cernekee
129a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ
130a4fcbb86SKevin Cernekee	bool
131a4fcbb86SKevin Cernekee	select GENERIC_IRQ_CHIP
132a4fcbb86SKevin Cernekee	select IRQ_DOMAIN
133a4fcbb86SKevin Cernekee
1347f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ
1357f646e92SFlorian Fainelli	bool
1367f646e92SFlorian Fainelli	select GENERIC_IRQ_CHIP
1377f646e92SFlorian Fainelli	select IRQ_DOMAIN
1387f646e92SFlorian Fainelli
1390145beedSBartosz Golaszewskiconfig DAVINCI_AINTC
1400145beedSBartosz Golaszewski	bool
1410145beedSBartosz Golaszewski	select GENERIC_IRQ_CHIP
1420145beedSBartosz Golaszewski	select IRQ_DOMAIN
1430145beedSBartosz Golaszewski
1440fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC
1450fc3d74cSBartosz Golaszewski	bool
1460fc3d74cSBartosz Golaszewski	select GENERIC_IRQ_CHIP
1470fc3d74cSBartosz Golaszewski	select IRQ_DOMAIN
1480fc3d74cSBartosz Golaszewski
149350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL
150350d71b9SSebastian Hesselbarth	bool
151e1588490SJisheng Zhang	select GENERIC_IRQ_CHIP
152350d71b9SSebastian Hesselbarth	select IRQ_DOMAIN
153350d71b9SSebastian Hesselbarth
1546ee532e2SLinus Walleijconfig FARADAY_FTINTC010
1556ee532e2SLinus Walleij	bool
1566ee532e2SLinus Walleij	select IRQ_DOMAIN
1574f7799d9SPalmer Dabbelt	select GENERIC_IRQ_MULTI_HANDLER
1586ee532e2SLinus Walleij	select SPARSE_IRQ
1596ee532e2SLinus Walleij
1609a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN
1619a7c4abdSMaJun	bool
1629a7c4abdSMaJun	select ARM_GIC_V3
1639a7c4abdSMaJun	select ARM_GIC_V3_ITS
1649a7c4abdSMaJun
165b6ef9161SJames Hoganconfig IMGPDC_IRQ
166b6ef9161SJames Hogan	bool
167b6ef9161SJames Hogan	select GENERIC_IRQ_CHIP
168b6ef9161SJames Hogan	select IRQ_DOMAIN
169b6ef9161SJames Hogan
1705b978c10SLinus Walleijconfig IXP4XX_IRQ
1715b978c10SLinus Walleij	bool
1725b978c10SLinus Walleij	select IRQ_DOMAIN
1735b978c10SLinus Walleij	select GENERIC_IRQ_MULTI_HANDLER
1745b978c10SLinus Walleij	select SPARSE_IRQ
1755b978c10SLinus Walleij
176da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ
177da0abe1aSRichard Fitzgerald	tristate
178da0abe1aSRichard Fitzgerald
17967e38cf2SRalf Baechleconfig IRQ_MIPS_CPU
18067e38cf2SRalf Baechle	bool
18167e38cf2SRalf Baechle	select GENERIC_IRQ_CHIP
1823838a547SPaul Burton	select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING
18367e38cf2SRalf Baechle	select IRQ_DOMAIN
1843838a547SPaul Burton	select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI
18518416e45SMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
18667e38cf2SRalf Baechle
187afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP
188afc98d90SAlexander Shiyan	bool
189afc98d90SAlexander Shiyan	depends on ARCH_CLPS711X
190afc98d90SAlexander Shiyan	select IRQ_DOMAIN
1914f7799d9SPalmer Dabbelt	select GENERIC_IRQ_MULTI_HANDLER
192afc98d90SAlexander Shiyan	select SPARSE_IRQ
193afc98d90SAlexander Shiyan	default y
194afc98d90SAlexander Shiyan
1959b54470aSStafford Horneconfig OMPIC
1969b54470aSStafford Horne	bool
1979b54470aSStafford Horne
1984db8e6d2SStefan Kristianssonconfig OR1K_PIC
1994db8e6d2SStefan Kristiansson	bool
2004db8e6d2SStefan Kristiansson	select IRQ_DOMAIN
2014db8e6d2SStefan Kristiansson
2028598066cSFelipe Balbiconfig OMAP_IRQCHIP
2038598066cSFelipe Balbi	bool
2048598066cSFelipe Balbi	select GENERIC_IRQ_CHIP
2058598066cSFelipe Balbi	select IRQ_DOMAIN
2068598066cSFelipe Balbi
2079dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP
2089dbd90f1SSebastian Hesselbarth	bool
2099dbd90f1SSebastian Hesselbarth	select IRQ_DOMAIN
2104f7799d9SPalmer Dabbelt	select GENERIC_IRQ_MULTI_HANDLER
2119dbd90f1SSebastian Hesselbarth
212aaa8666aSCristian Birsanconfig PIC32_EVIC
213aaa8666aSCristian Birsan	bool
214aaa8666aSCristian Birsan	select GENERIC_IRQ_CHIP
215aaa8666aSCristian Birsan	select IRQ_DOMAIN
216aaa8666aSCristian Birsan
217981b58f6SRich Felkerconfig JCORE_AIC
2183602ffdeSRich Felker	bool "J-Core integrated AIC" if COMPILE_TEST
2193602ffdeSRich Felker	depends on OF
220981b58f6SRich Felker	select IRQ_DOMAIN
221981b58f6SRich Felker	help
222981b58f6SRich Felker	  Support for the J-Core integrated AIC.
223981b58f6SRich Felker
224d852e62aSManivannan Sadhasivamconfig RDA_INTC
225d852e62aSManivannan Sadhasivam	bool
226d852e62aSManivannan Sadhasivam	select IRQ_DOMAIN
227d852e62aSManivannan Sadhasivam
22844358048SMagnus Dammconfig RENESAS_INTC_IRQPIN
22902d7e041SGeert Uytterhoeven	bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST
23044358048SMagnus Damm	select IRQ_DOMAIN
23102d7e041SGeert Uytterhoeven	help
23202d7e041SGeert Uytterhoeven	  Enable support for the Renesas Interrupt Controller for external
23302d7e041SGeert Uytterhoeven	  interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
23444358048SMagnus Damm
235fbc83b7fSMagnus Dammconfig RENESAS_IRQC
23602d7e041SGeert Uytterhoeven	bool "Renesas R-Mobile APE6 and R-Car IRQC support" if COMPILE_TEST
23799c221dfSMagnus Damm	select GENERIC_IRQ_CHIP
238fbc83b7fSMagnus Damm	select IRQ_DOMAIN
23902d7e041SGeert Uytterhoeven	help
24002d7e041SGeert Uytterhoeven	  Enable support for the Renesas Interrupt Controller for external
24102d7e041SGeert Uytterhoeven	  devices, as found on R-Mobile APE6, R-Car Gen2, and R-Car Gen3 SoCs.
242fbc83b7fSMagnus Damm
243a644ccb8SGeert Uytterhoevenconfig RENESAS_RZA1_IRQC
24402d7e041SGeert Uytterhoeven	bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST
245a644ccb8SGeert Uytterhoeven	select IRQ_DOMAIN_HIERARCHY
24602d7e041SGeert Uytterhoeven	help
24702d7e041SGeert Uytterhoeven	  Enable support for the Renesas RZ/A1 Interrupt Controller, to use up
24802d7e041SGeert Uytterhoeven	  to 8 external interrupts with configurable sense select.
249a644ccb8SGeert Uytterhoeven
25007088484SLee Jonesconfig ST_IRQCHIP
25107088484SLee Jones	bool
25207088484SLee Jones	select REGMAP
25307088484SLee Jones	select MFD_SYSCON
25407088484SLee Jones	help
25507088484SLee Jones	  Enables SysCfg Controlled IRQs on STi based platforms.
25607088484SLee Jones
2574bba6689SMans Rullgardconfig TANGO_IRQ
2584bba6689SMans Rullgard	bool
2594bba6689SMans Rullgard	select IRQ_DOMAIN
2604bba6689SMans Rullgard	select GENERIC_IRQ_CHIP
2614bba6689SMans Rullgard
262b06eb017SChristian Ruppertconfig TB10X_IRQC
263b06eb017SChristian Ruppert	bool
264b06eb017SChristian Ruppert	select IRQ_DOMAIN
265b06eb017SChristian Ruppert	select GENERIC_IRQ_CHIP
266b06eb017SChristian Ruppert
267d01f8633SDamien Riegelconfig TS4800_IRQ
268d01f8633SDamien Riegel	tristate "TS-4800 IRQ controller"
269d01f8633SDamien Riegel	select IRQ_DOMAIN
2700df337cfSRichard Weinberger	depends on HAS_IOMEM
271d2b383dcSJean Delvare	depends on SOC_IMX51 || COMPILE_TEST
272d01f8633SDamien Riegel	help
273d01f8633SDamien Riegel	  Support for the TS-4800 FPGA IRQ controller
274d01f8633SDamien Riegel
2752389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ
2762389d501SLinus Walleij	bool
2772389d501SLinus Walleij	select IRQ_DOMAIN
2782389d501SLinus Walleij
2792389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR
2802389d501SLinus Walleij       int
2812389d501SLinus Walleij       default 4
2822389d501SLinus Walleij       depends on VERSATILE_FPGA_IRQ
28326a8e96aSMax Filippov
28426a8e96aSMax Filippovconfig XTENSA_MX
28526a8e96aSMax Filippov	bool
28626a8e96aSMax Filippov	select IRQ_DOMAIN
28750091212SMarc Zyngier	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
28896ca848eSSricharan R
2890547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC
2900547dc78SZubair Lutfullah Kakakhel	bool
2910547dc78SZubair Lutfullah Kakakhel	select IRQ_DOMAIN
2920547dc78SZubair Lutfullah Kakakhel
29396ca848eSSricharan Rconfig IRQ_CROSSBAR
29496ca848eSSricharan R	bool
29596ca848eSSricharan R	help
296f54619f2SMasanari Iida	  Support for a CROSSBAR ip that precedes the main interrupt controller.
29796ca848eSSricharan R	  The primary irqchip invokes the crossbar's callback which inturn allocates
29896ca848eSSricharan R	  a free irq and configures the IP. Thus the peripheral interrupts are
29996ca848eSSricharan R	  routed to one of the free irqchip interrupt lines.
30089323f8cSGrygorii Strashko
30189323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ
30289323f8cSGrygorii Strashko	tristate "Keystone 2 IRQ controller IP"
30389323f8cSGrygorii Strashko	depends on ARCH_KEYSTONE
30489323f8cSGrygorii Strashko	help
30589323f8cSGrygorii Strashko		Support for Texas Instruments Keystone 2 IRQ controller IP which
30689323f8cSGrygorii Strashko		is part of the Keystone 2 IPC mechanism
3078a19b8f1SAndrew Bresticker
3088a19b8f1SAndrew Brestickerconfig MIPS_GIC
3098a19b8f1SAndrew Bresticker	bool
310bb11cff3SQais Yousef	select GENERIC_IRQ_IPI
3112af70a96SQais Yousef	select IRQ_DOMAIN_HIERARCHY
3128a19b8f1SAndrew Bresticker	select MIPS_CM
3138a764482SYoshinori Sato
31444e08e70SPaul Burtonconfig INGENIC_IRQ
31544e08e70SPaul Burton	bool
31644e08e70SPaul Burton	depends on MACH_INGENIC
31744e08e70SPaul Burton	default y
31878c10e55SLinus Torvalds
3198a764482SYoshinori Satoconfig RENESAS_H8300H_INTC
3208a764482SYoshinori Sato        bool
3218a764482SYoshinori Sato	select IRQ_DOMAIN
3228a764482SYoshinori Sato
3238a764482SYoshinori Satoconfig RENESAS_H8S_INTC
32402d7e041SGeert Uytterhoeven	bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST
3258a764482SYoshinori Sato	select IRQ_DOMAIN
32602d7e041SGeert Uytterhoeven	help
32702d7e041SGeert Uytterhoeven	  Enable support for the Renesas H8/300 Interrupt Controller, as found
32802d7e041SGeert Uytterhoeven	  on Renesas H8S SoCs.
329e324c4dcSShenwei Wang
330e324c4dcSShenwei Wangconfig IMX_GPCV2
331e324c4dcSShenwei Wang	bool
332e324c4dcSShenwei Wang	select IRQ_DOMAIN
333e324c4dcSShenwei Wang	help
334e324c4dcSShenwei Wang	  Enables the wakeup IRQs for IMX platforms with GPCv2 block
3357e4ac676SOleksij Rempel
3367e4ac676SOleksij Rempelconfig IRQ_MXS
3377e4ac676SOleksij Rempel	def_bool y if MACH_ASM9260 || ARCH_MXS
3387e4ac676SOleksij Rempel	select IRQ_DOMAIN
3397e4ac676SOleksij Rempel	select STMP_DEVICE
340c27f29bbSThomas Petazzoni
34119d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ
34219d99164SAlexandre Belloni	bool
34319d99164SAlexandre Belloni	select IRQ_DOMAIN
34419d99164SAlexandre Belloni	select GENERIC_IRQ_CHIP
34519d99164SAlexandre Belloni
346a68a63cbSThomas Petazzoniconfig MVEBU_GICP
347a68a63cbSThomas Petazzoni	bool
348a68a63cbSThomas Petazzoni
349e0de91a9SThomas Petazzoniconfig MVEBU_ICU
350e0de91a9SThomas Petazzoni	bool
351e0de91a9SThomas Petazzoni
352c27f29bbSThomas Petazzoniconfig MVEBU_ODMI
353c27f29bbSThomas Petazzoni	bool
354fa23b9d1SArnd Bergmann	select GENERIC_MSI_IRQ_DOMAIN
3559e2c986cSMarc Zyngier
356a109893bSThomas Petazzoniconfig MVEBU_PIC
357a109893bSThomas Petazzoni	bool
358a109893bSThomas Petazzoni
35961ce8d8dSMiquel Raynalconfig MVEBU_SEI
36061ce8d8dSMiquel Raynal        bool
36161ce8d8dSMiquel Raynal
362b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI
363b8f3ebe6SMinghuan Lian	def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE
364b8f3ebe6SMinghuan Lian	depends on PCI && PCI_MSI
365b8f3ebe6SMinghuan Lian
3669e2c986cSMarc Zyngierconfig PARTITION_PERCPU
3679e2c986cSMarc Zyngier	bool
3680efacbbaSLinus Torvalds
36944df427cSNoam Camusconfig EZNPS_GIC
37044df427cSNoam Camus	bool "NPS400 Global Interrupt Manager (GIM)"
371ffd565e3SArnd Bergmann	depends on ARC || (COMPILE_TEST && !64BIT)
37244df427cSNoam Camus	select IRQ_DOMAIN
37344df427cSNoam Camus	help
37444df427cSNoam Camus	  Support the EZchip NPS400 global interrupt controller
375e0720416SAlexandre TORGUE
376e0720416SAlexandre TORGUEconfig STM32_EXTI
377e0720416SAlexandre TORGUE	bool
378e0720416SAlexandre TORGUE	select IRQ_DOMAIN
3790e7d7807SLudovic Barre	select GENERIC_IRQ_CHIP
380f20cc9b0SAgustin Vega-Frias
381f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER
382f20cc9b0SAgustin Vega-Frias	bool "QCOM IRQ combiner support"
383f20cc9b0SAgustin Vega-Frias	depends on ARCH_QCOM && ACPI
384f20cc9b0SAgustin Vega-Frias	select IRQ_DOMAIN_HIERARCHY
385f20cc9b0SAgustin Vega-Frias	help
386f20cc9b0SAgustin Vega-Frias	  Say yes here to add support for the IRQ combiner devices embedded
387f20cc9b0SAgustin Vega-Frias	  in Qualcomm Technologies chips.
3885ed34d3aSMasahiro Yamada
3895ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET
3905ed34d3aSMasahiro Yamada	bool "UniPhier AIDET support" if COMPILE_TEST
3915ed34d3aSMasahiro Yamada	depends on ARCH_UNIPHIER || COMPILE_TEST
3925ed34d3aSMasahiro Yamada	default ARCH_UNIPHIER
3935ed34d3aSMasahiro Yamada	select IRQ_DOMAIN_HIERARCHY
3945ed34d3aSMasahiro Yamada	help
3955ed34d3aSMasahiro Yamada	  Support for the UniPhier AIDET (ARM Interrupt Detector).
396c94fb639SRandy Dunlap
397215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO
398215f4cc0SJerome Brunet       bool "Meson GPIO Interrupt Multiplexer"
399d9ee91c1SThomas Gleixner       depends on ARCH_MESON
400215f4cc0SJerome Brunet       select IRQ_DOMAIN_HIERARCHY
401215f4cc0SJerome Brunet       help
402215f4cc0SJerome Brunet         Support Meson SoC Family GPIO Interrupt Multiplexer
403215f4cc0SJerome Brunet
4044235ff50SMiodrag Dinicconfig GOLDFISH_PIC
4054235ff50SMiodrag Dinic       bool "Goldfish programmable interrupt controller"
4064235ff50SMiodrag Dinic       depends on MIPS && (GOLDFISH || COMPILE_TEST)
4074235ff50SMiodrag Dinic       select IRQ_DOMAIN
4084235ff50SMiodrag Dinic       help
4094235ff50SMiodrag Dinic         Say yes here to enable Goldfish interrupt controller driver used
4104235ff50SMiodrag Dinic         for Goldfish based virtual platforms.
4114235ff50SMiodrag Dinic
412f55c73aeSArchana Sathyakumarconfig QCOM_PDC
413f55c73aeSArchana Sathyakumar	bool "QCOM PDC"
414f55c73aeSArchana Sathyakumar	depends on ARCH_QCOM
415f55c73aeSArchana Sathyakumar	select IRQ_DOMAIN_HIERARCHY
416f55c73aeSArchana Sathyakumar	help
417f55c73aeSArchana Sathyakumar	  Power Domain Controller driver to manage and configure wakeup
418f55c73aeSArchana Sathyakumar	  IRQs for Qualcomm Technologies Inc (QTI) mobile chips.
419f55c73aeSArchana Sathyakumar
420d8a5f5f7SGuo Renconfig CSKY_MPINTC
421d8a5f5f7SGuo Ren	bool "C-SKY Multi Processor Interrupt Controller"
422d8a5f5f7SGuo Ren	depends on CSKY
423d8a5f5f7SGuo Ren	help
424d8a5f5f7SGuo Ren	  Say yes here to enable C-SKY SMP interrupt controller driver used
425d8a5f5f7SGuo Ren	  for C-SKY SMP system.
426d8a5f5f7SGuo Ren	  In fact it's not mmio map in hw and it use ld/st to visit the
427d8a5f5f7SGuo Ren	  controller's register inside CPU.
428d8a5f5f7SGuo Ren
429edff1b48SGuo Renconfig CSKY_APB_INTC
430edff1b48SGuo Ren	bool "C-SKY APB Interrupt Controller"
431edff1b48SGuo Ren	depends on CSKY
432edff1b48SGuo Ren	help
433edff1b48SGuo Ren	  Say yes here to enable C-SKY APB interrupt controller driver used
434edff1b48SGuo Ren	  by C-SKY single core SOC system. It use mmio map apb-bus to visit
435edff1b48SGuo Ren	  the controller's register.
436edff1b48SGuo Ren
4370136afa0SLucas Stachconfig IMX_IRQSTEER
4380136afa0SLucas Stach	bool "i.MX IRQSTEER support"
4390136afa0SLucas Stach	depends on ARCH_MXC || COMPILE_TEST
4400136afa0SLucas Stach	default ARCH_MXC
4410136afa0SLucas Stach	select IRQ_DOMAIN
4420136afa0SLucas Stach	help
4430136afa0SLucas Stach	  Support for the i.MX IRQSTEER interrupt multiplexer/remapper.
4440136afa0SLucas Stach
4459e543e22SJiaxun Yangconfig LS1X_IRQ
4469e543e22SJiaxun Yang	bool "Loongson-1 Interrupt Controller"
4479e543e22SJiaxun Yang	depends on MACH_LOONGSON32
4489e543e22SJiaxun Yang	default y
4499e543e22SJiaxun Yang	select IRQ_DOMAIN
4509e543e22SJiaxun Yang	select GENERIC_IRQ_CHIP
4519e543e22SJiaxun Yang	help
4529e543e22SJiaxun Yang	  Support for the Loongson-1 platform Interrupt Controller.
4539e543e22SJiaxun Yang
454cd844b07SLokesh Vutlaconfig TI_SCI_INTR_IRQCHIP
455cd844b07SLokesh Vutla	bool
456cd844b07SLokesh Vutla	depends on TI_SCI_PROTOCOL
457cd844b07SLokesh Vutla	select IRQ_DOMAIN_HIERARCHY
458cd844b07SLokesh Vutla	help
459cd844b07SLokesh Vutla	  This enables the irqchip driver support for K3 Interrupt router
460cd844b07SLokesh Vutla	  over TI System Control Interface available on some new TI's SoCs.
461cd844b07SLokesh Vutla	  If you wish to use interrupt router irq resources managed by the
462cd844b07SLokesh Vutla	  TI System Controller, say Y here. Otherwise, say N.
463cd844b07SLokesh Vutla
4649f1463b8SLokesh Vutlaconfig TI_SCI_INTA_IRQCHIP
4659f1463b8SLokesh Vutla	bool
4669f1463b8SLokesh Vutla	depends on TI_SCI_PROTOCOL
4679f1463b8SLokesh Vutla	select IRQ_DOMAIN_HIERARCHY
468f011df61SLokesh Vutla	select TI_SCI_INTA_MSI_DOMAIN
4699f1463b8SLokesh Vutla	help
4709f1463b8SLokesh Vutla	  This enables the irqchip driver support for K3 Interrupt aggregator
4719f1463b8SLokesh Vutla	  over TI System Control Interface available on some new TI's SoCs.
4729f1463b8SLokesh Vutla	  If you wish to use interrupt aggregator irq resources managed by the
4739f1463b8SLokesh Vutla	  TI System Controller, say Y here. Otherwise, say N.
4749f1463b8SLokesh Vutla
475c94fb639SRandy Dunlapendmenu
4768237f8bcSChristoph Hellwig
4778237f8bcSChristoph Hellwigconfig SIFIVE_PLIC
4788237f8bcSChristoph Hellwig	bool "SiFive Platform-Level Interrupt Controller"
4798237f8bcSChristoph Hellwig	depends on RISCV
4808237f8bcSChristoph Hellwig	help
4818237f8bcSChristoph Hellwig	   This enables support for the PLIC chip found in SiFive (and
4828237f8bcSChristoph Hellwig	   potentially other) RISC-V systems.  The PLIC controls devices
4838237f8bcSChristoph Hellwig	   interrupts and connects them to each core's local interrupt
4848237f8bcSChristoph Hellwig	   controller.  Aside from timer and software interrupts, all other
4858237f8bcSChristoph Hellwig	   interrupt sources are subordinate to the PLIC.
4868237f8bcSChristoph Hellwig
4878237f8bcSChristoph Hellwig	   If you don't know what to do here, say Y.
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