1c94fb639SRandy Dunlapmenu "IRQ chip support" 2c94fb639SRandy Dunlap 3f6e916b8SThomas Petazzoniconfig IRQCHIP 4f6e916b8SThomas Petazzoni def_bool y 5f6e916b8SThomas Petazzoni depends on OF_IRQ 6f6e916b8SThomas Petazzoni 781243e44SRob Herringconfig ARM_GIC 881243e44SRob Herring bool 981243e44SRob Herring select IRQ_DOMAIN 109a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 114f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 120c9e4982SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1381243e44SRob Herring 149c8edddfSJon Hunterconfig ARM_GIC_PM 159c8edddfSJon Hunter bool 169c8edddfSJon Hunter depends on PM 179c8edddfSJon Hunter select ARM_GIC 189c8edddfSJon Hunter select PM_CLK 199c8edddfSJon Hunter 20a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 21a27d21e0SLinus Walleij int 22a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 23a27d21e0SLinus Walleij default 1 24a27d21e0SLinus Walleij 25853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 26853a33ceSSuravee Suthikulpanit bool 273ee80364SArnd Bergmann depends on PCI 283ee80364SArnd Bergmann select ARM_GIC 293ee80364SArnd Bergmann select PCI_MSI 30853a33ceSSuravee Suthikulpanit 3181243e44SRob Herringconfig GIC_NON_BANKED 3281243e44SRob Herring bool 3381243e44SRob Herring 34021f6537SMarc Zyngierconfig ARM_GIC_V3 35021f6537SMarc Zyngier bool 36021f6537SMarc Zyngier select IRQ_DOMAIN 374f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 38443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 39e3825ba1SMarc Zyngier select PARTITION_PERCPU 40956ae91aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 41021f6537SMarc Zyngier 4219812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4319812729SMarc Zyngier bool 4429f41139SMarc Zyngier select GENERIC_MSI_IRQ_DOMAIN 4529f41139SMarc Zyngier default ARM_GIC_V3 4629f41139SMarc Zyngier 4729f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4829f41139SMarc Zyngier bool 4929f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 503ee80364SArnd Bergmann depends on PCI 513ee80364SArnd Bergmann depends on PCI_MSI 5229f41139SMarc Zyngier default ARM_GIC_V3_ITS 53292ec080SUwe Kleine-König 547afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 557afe031cSBogdan Purcareata bool 567afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 577afe031cSBogdan Purcareata depends on FSL_MC_BUS 587afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 597afe031cSBogdan Purcareata 6044430ec0SRob Herringconfig ARM_NVIC 6144430ec0SRob Herring bool 6244430ec0SRob Herring select IRQ_DOMAIN 632d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 6444430ec0SRob Herring select GENERIC_IRQ_CHIP 6544430ec0SRob Herring 6644430ec0SRob Herringconfig ARM_VIC 6744430ec0SRob Herring bool 6844430ec0SRob Herring select IRQ_DOMAIN 694f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 7044430ec0SRob Herring 7144430ec0SRob Herringconfig ARM_VIC_NR 7244430ec0SRob Herring int 7344430ec0SRob Herring default 4 if ARCH_S5PV210 7444430ec0SRob Herring default 2 7544430ec0SRob Herring depends on ARM_VIC 7644430ec0SRob Herring help 7744430ec0SRob Herring The maximum number of VICs available in the system, for 7844430ec0SRob Herring power management. 7944430ec0SRob Herring 80fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 81fed6d336SThomas Petazzoni bool 82fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 833ee80364SArnd Bergmann select PCI_MSI if PCI 84e31793a3SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 85fed6d336SThomas Petazzoni 86e6b78f2cSAntoine Tenartconfig ALPINE_MSI 87e6b78f2cSAntoine Tenart bool 883ee80364SArnd Bergmann depends on PCI 893ee80364SArnd Bergmann select PCI_MSI 90e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 91e6b78f2cSAntoine Tenart 92b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 93b1479ebbSBoris BREZILLON bool 94b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 95b1479ebbSBoris BREZILLON select IRQ_DOMAIN 964f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 97b1479ebbSBoris BREZILLON select SPARSE_IRQ 98b1479ebbSBoris BREZILLON 99b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 100b1479ebbSBoris BREZILLON bool 101b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 102b1479ebbSBoris BREZILLON select IRQ_DOMAIN 1034f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 104b1479ebbSBoris BREZILLON select SPARSE_IRQ 105b1479ebbSBoris BREZILLON 1060509cfdeSRalf Baechleconfig I8259 1070509cfdeSRalf Baechle bool 1080509cfdeSRalf Baechle select IRQ_DOMAIN 1090509cfdeSRalf Baechle 110c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 111c7c42ec2SSimon Arlott bool 112c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 113c7c42ec2SSimon Arlott select IRQ_DOMAIN 114d0ed5e8eSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 115c7c42ec2SSimon Arlott 1165f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 1175f7f0317SKevin Cernekee bool 1185f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1195f7f0317SKevin Cernekee select IRQ_DOMAIN 120b8d9884aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1215f7f0317SKevin Cernekee 122a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 123a4fcbb86SKevin Cernekee bool 124a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 125a4fcbb86SKevin Cernekee select IRQ_DOMAIN 126a4fcbb86SKevin Cernekee 1277f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 1287f646e92SFlorian Fainelli bool 1297f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1307f646e92SFlorian Fainelli select IRQ_DOMAIN 1317f646e92SFlorian Fainelli 1320145beedSBartosz Golaszewskiconfig DAVINCI_AINTC 1330145beedSBartosz Golaszewski bool 1340145beedSBartosz Golaszewski select GENERIC_IRQ_CHIP 1350145beedSBartosz Golaszewski select IRQ_DOMAIN 1360145beedSBartosz Golaszewski 137*0fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC 138*0fc3d74cSBartosz Golaszewski bool 139*0fc3d74cSBartosz Golaszewski select GENERIC_IRQ_CHIP 140*0fc3d74cSBartosz Golaszewski select IRQ_DOMAIN 141*0fc3d74cSBartosz Golaszewski 142350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 143350d71b9SSebastian Hesselbarth bool 144e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 145350d71b9SSebastian Hesselbarth select IRQ_DOMAIN 146350d71b9SSebastian Hesselbarth 1476ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1486ee532e2SLinus Walleij bool 1496ee532e2SLinus Walleij select IRQ_DOMAIN 1504f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 1516ee532e2SLinus Walleij select SPARSE_IRQ 1526ee532e2SLinus Walleij 1539a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1549a7c4abdSMaJun bool 1559a7c4abdSMaJun select ARM_GIC_V3 1569a7c4abdSMaJun select ARM_GIC_V3_ITS 1579a7c4abdSMaJun 158b6ef9161SJames Hoganconfig IMGPDC_IRQ 159b6ef9161SJames Hogan bool 160b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 161b6ef9161SJames Hogan select IRQ_DOMAIN 162b6ef9161SJames Hogan 163da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ 164da0abe1aSRichard Fitzgerald tristate 165da0abe1aSRichard Fitzgerald 16667e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 16767e38cf2SRalf Baechle bool 16867e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1693838a547SPaul Burton select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING 17067e38cf2SRalf Baechle select IRQ_DOMAIN 1713838a547SPaul Burton select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI 17218416e45SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 17367e38cf2SRalf Baechle 174afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 175afc98d90SAlexander Shiyan bool 176afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 177afc98d90SAlexander Shiyan select IRQ_DOMAIN 1784f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 179afc98d90SAlexander Shiyan select SPARSE_IRQ 180afc98d90SAlexander Shiyan default y 181afc98d90SAlexander Shiyan 1829b54470aSStafford Horneconfig OMPIC 1839b54470aSStafford Horne bool 1849b54470aSStafford Horne 1854db8e6d2SStefan Kristianssonconfig OR1K_PIC 1864db8e6d2SStefan Kristiansson bool 1874db8e6d2SStefan Kristiansson select IRQ_DOMAIN 1884db8e6d2SStefan Kristiansson 1898598066cSFelipe Balbiconfig OMAP_IRQCHIP 1908598066cSFelipe Balbi bool 1918598066cSFelipe Balbi select GENERIC_IRQ_CHIP 1928598066cSFelipe Balbi select IRQ_DOMAIN 1938598066cSFelipe Balbi 1949dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 1959dbd90f1SSebastian Hesselbarth bool 1969dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 1974f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 1989dbd90f1SSebastian Hesselbarth 199aaa8666aSCristian Birsanconfig PIC32_EVIC 200aaa8666aSCristian Birsan bool 201aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 202aaa8666aSCristian Birsan select IRQ_DOMAIN 203aaa8666aSCristian Birsan 204981b58f6SRich Felkerconfig JCORE_AIC 2053602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 2063602ffdeSRich Felker depends on OF 207981b58f6SRich Felker select IRQ_DOMAIN 208981b58f6SRich Felker help 209981b58f6SRich Felker Support for the J-Core integrated AIC. 210981b58f6SRich Felker 211d852e62aSManivannan Sadhasivamconfig RDA_INTC 212d852e62aSManivannan Sadhasivam bool 213d852e62aSManivannan Sadhasivam select IRQ_DOMAIN 214d852e62aSManivannan Sadhasivam 21544358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 21644358048SMagnus Damm bool 21744358048SMagnus Damm select IRQ_DOMAIN 21844358048SMagnus Damm 219fbc83b7fSMagnus Dammconfig RENESAS_IRQC 220fbc83b7fSMagnus Damm bool 22199c221dfSMagnus Damm select GENERIC_IRQ_CHIP 222fbc83b7fSMagnus Damm select IRQ_DOMAIN 223fbc83b7fSMagnus Damm 22407088484SLee Jonesconfig ST_IRQCHIP 22507088484SLee Jones bool 22607088484SLee Jones select REGMAP 22707088484SLee Jones select MFD_SYSCON 22807088484SLee Jones help 22907088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 23007088484SLee Jones 2314bba6689SMans Rullgardconfig TANGO_IRQ 2324bba6689SMans Rullgard bool 2334bba6689SMans Rullgard select IRQ_DOMAIN 2344bba6689SMans Rullgard select GENERIC_IRQ_CHIP 2354bba6689SMans Rullgard 236b06eb017SChristian Ruppertconfig TB10X_IRQC 237b06eb017SChristian Ruppert bool 238b06eb017SChristian Ruppert select IRQ_DOMAIN 239b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 240b06eb017SChristian Ruppert 241d01f8633SDamien Riegelconfig TS4800_IRQ 242d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 243d01f8633SDamien Riegel select IRQ_DOMAIN 2440df337cfSRichard Weinberger depends on HAS_IOMEM 245d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 246d01f8633SDamien Riegel help 247d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 248d01f8633SDamien Riegel 2492389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2502389d501SLinus Walleij bool 2512389d501SLinus Walleij select IRQ_DOMAIN 2522389d501SLinus Walleij 2532389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2542389d501SLinus Walleij int 2552389d501SLinus Walleij default 4 2562389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 25726a8e96aSMax Filippov 25826a8e96aSMax Filippovconfig XTENSA_MX 25926a8e96aSMax Filippov bool 26026a8e96aSMax Filippov select IRQ_DOMAIN 26150091212SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 26296ca848eSSricharan R 2630547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 2640547dc78SZubair Lutfullah Kakakhel bool 2650547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 2660547dc78SZubair Lutfullah Kakakhel 26796ca848eSSricharan Rconfig IRQ_CROSSBAR 26896ca848eSSricharan R bool 26996ca848eSSricharan R help 270f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 27196ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 27296ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 27396ca848eSSricharan R routed to one of the free irqchip interrupt lines. 27489323f8cSGrygorii Strashko 27589323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 27689323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 27789323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 27889323f8cSGrygorii Strashko help 27989323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 28089323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 2818a19b8f1SAndrew Bresticker 2828a19b8f1SAndrew Brestickerconfig MIPS_GIC 2838a19b8f1SAndrew Bresticker bool 284bb11cff3SQais Yousef select GENERIC_IRQ_IPI 2852af70a96SQais Yousef select IRQ_DOMAIN_HIERARCHY 2868a19b8f1SAndrew Bresticker select MIPS_CM 2878a764482SYoshinori Sato 28844e08e70SPaul Burtonconfig INGENIC_IRQ 28944e08e70SPaul Burton bool 29044e08e70SPaul Burton depends on MACH_INGENIC 29144e08e70SPaul Burton default y 29278c10e55SLinus Torvalds 2938a764482SYoshinori Satoconfig RENESAS_H8300H_INTC 2948a764482SYoshinori Sato bool 2958a764482SYoshinori Sato select IRQ_DOMAIN 2968a764482SYoshinori Sato 2978a764482SYoshinori Satoconfig RENESAS_H8S_INTC 2988a764482SYoshinori Sato bool 2998a764482SYoshinori Sato select IRQ_DOMAIN 300e324c4dcSShenwei Wang 301e324c4dcSShenwei Wangconfig IMX_GPCV2 302e324c4dcSShenwei Wang bool 303e324c4dcSShenwei Wang select IRQ_DOMAIN 304e324c4dcSShenwei Wang help 305e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 3067e4ac676SOleksij Rempel 3077e4ac676SOleksij Rempelconfig IRQ_MXS 3087e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 3097e4ac676SOleksij Rempel select IRQ_DOMAIN 3107e4ac676SOleksij Rempel select STMP_DEVICE 311c27f29bbSThomas Petazzoni 31219d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 31319d99164SAlexandre Belloni bool 31419d99164SAlexandre Belloni select IRQ_DOMAIN 31519d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 31619d99164SAlexandre Belloni 317a68a63cbSThomas Petazzoniconfig MVEBU_GICP 318a68a63cbSThomas Petazzoni bool 319a68a63cbSThomas Petazzoni 320e0de91a9SThomas Petazzoniconfig MVEBU_ICU 321e0de91a9SThomas Petazzoni bool 322e0de91a9SThomas Petazzoni 323c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 324c27f29bbSThomas Petazzoni bool 325fa23b9d1SArnd Bergmann select GENERIC_MSI_IRQ_DOMAIN 3269e2c986cSMarc Zyngier 327a109893bSThomas Petazzoniconfig MVEBU_PIC 328a109893bSThomas Petazzoni bool 329a109893bSThomas Petazzoni 33061ce8d8dSMiquel Raynalconfig MVEBU_SEI 33161ce8d8dSMiquel Raynal bool 33261ce8d8dSMiquel Raynal 333b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 334b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 335b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 336b8f3ebe6SMinghuan Lian 3379e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3389e2c986cSMarc Zyngier bool 3390efacbbaSLinus Torvalds 34044df427cSNoam Camusconfig EZNPS_GIC 34144df427cSNoam Camus bool "NPS400 Global Interrupt Manager (GIM)" 342ffd565e3SArnd Bergmann depends on ARC || (COMPILE_TEST && !64BIT) 34344df427cSNoam Camus select IRQ_DOMAIN 34444df427cSNoam Camus help 34544df427cSNoam Camus Support the EZchip NPS400 global interrupt controller 346e0720416SAlexandre TORGUE 347e0720416SAlexandre TORGUEconfig STM32_EXTI 348e0720416SAlexandre TORGUE bool 349e0720416SAlexandre TORGUE select IRQ_DOMAIN 3500e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 351f20cc9b0SAgustin Vega-Frias 352f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 353f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 354f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 355f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN 356f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 357f20cc9b0SAgustin Vega-Frias help 358f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 359f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 3605ed34d3aSMasahiro Yamada 3615ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 3625ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 3635ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 3645ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 3655ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 3665ed34d3aSMasahiro Yamada help 3675ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 368c94fb639SRandy Dunlap 369215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 370215f4cc0SJerome Brunet bool "Meson GPIO Interrupt Multiplexer" 371d9ee91c1SThomas Gleixner depends on ARCH_MESON 372215f4cc0SJerome Brunet select IRQ_DOMAIN 373215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 374215f4cc0SJerome Brunet help 375215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 376215f4cc0SJerome Brunet 3774235ff50SMiodrag Dinicconfig GOLDFISH_PIC 3784235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 3794235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 3804235ff50SMiodrag Dinic select IRQ_DOMAIN 3814235ff50SMiodrag Dinic help 3824235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 3834235ff50SMiodrag Dinic for Goldfish based virtual platforms. 3844235ff50SMiodrag Dinic 385f55c73aeSArchana Sathyakumarconfig QCOM_PDC 386f55c73aeSArchana Sathyakumar bool "QCOM PDC" 387f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 388f55c73aeSArchana Sathyakumar select IRQ_DOMAIN 389f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 390f55c73aeSArchana Sathyakumar help 391f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 392f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 393f55c73aeSArchana Sathyakumar 394d8a5f5f7SGuo Renconfig CSKY_MPINTC 395d8a5f5f7SGuo Ren bool "C-SKY Multi Processor Interrupt Controller" 396d8a5f5f7SGuo Ren depends on CSKY 397d8a5f5f7SGuo Ren help 398d8a5f5f7SGuo Ren Say yes here to enable C-SKY SMP interrupt controller driver used 399d8a5f5f7SGuo Ren for C-SKY SMP system. 400d8a5f5f7SGuo Ren In fact it's not mmio map in hw and it use ld/st to visit the 401d8a5f5f7SGuo Ren controller's register inside CPU. 402d8a5f5f7SGuo Ren 403edff1b48SGuo Renconfig CSKY_APB_INTC 404edff1b48SGuo Ren bool "C-SKY APB Interrupt Controller" 405edff1b48SGuo Ren depends on CSKY 406edff1b48SGuo Ren help 407edff1b48SGuo Ren Say yes here to enable C-SKY APB interrupt controller driver used 408edff1b48SGuo Ren by C-SKY single core SOC system. It use mmio map apb-bus to visit 409edff1b48SGuo Ren the controller's register. 410edff1b48SGuo Ren 4110136afa0SLucas Stachconfig IMX_IRQSTEER 4120136afa0SLucas Stach bool "i.MX IRQSTEER support" 4130136afa0SLucas Stach depends on ARCH_MXC || COMPILE_TEST 4140136afa0SLucas Stach default ARCH_MXC 4150136afa0SLucas Stach select IRQ_DOMAIN 4160136afa0SLucas Stach help 4170136afa0SLucas Stach Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 4180136afa0SLucas Stach 419c94fb639SRandy Dunlapendmenu 4208237f8bcSChristoph Hellwig 4218237f8bcSChristoph Hellwigconfig SIFIVE_PLIC 4228237f8bcSChristoph Hellwig bool "SiFive Platform-Level Interrupt Controller" 4238237f8bcSChristoph Hellwig depends on RISCV 4248237f8bcSChristoph Hellwig help 4258237f8bcSChristoph Hellwig This enables support for the PLIC chip found in SiFive (and 4268237f8bcSChristoph Hellwig potentially other) RISC-V systems. The PLIC controls devices 4278237f8bcSChristoph Hellwig interrupts and connects them to each core's local interrupt 4288237f8bcSChristoph Hellwig controller. Aside from timer and software interrupts, all other 4298237f8bcSChristoph Hellwig interrupt sources are subordinate to the PLIC. 4308237f8bcSChristoph Hellwig 4318237f8bcSChristoph Hellwig If you don't know what to do here, say Y. 432