1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2c94fb639SRandy Dunlapmenu "IRQ chip support" 3c94fb639SRandy Dunlap 4f6e916b8SThomas Petazzoniconfig IRQCHIP 5f6e916b8SThomas Petazzoni def_bool y 6f6e916b8SThomas Petazzoni depends on OF_IRQ 7f6e916b8SThomas Petazzoni 881243e44SRob Herringconfig ARM_GIC 981243e44SRob Herring bool 109a1091efSYingjoe Chen select IRQ_DOMAIN_HIERARCHY 114f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 120c9e4982SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1381243e44SRob Herring 149c8edddfSJon Hunterconfig ARM_GIC_PM 159c8edddfSJon Hunter bool 169c8edddfSJon Hunter depends on PM 179c8edddfSJon Hunter select ARM_GIC 189c8edddfSJon Hunter 19a27d21e0SLinus Walleijconfig ARM_GIC_MAX_NR 20a27d21e0SLinus Walleij int 2170265523SJiangfeng Xiao depends on ARM_GIC 22a27d21e0SLinus Walleij default 2 if ARCH_REALVIEW 23a27d21e0SLinus Walleij default 1 24a27d21e0SLinus Walleij 25853a33ceSSuravee Suthikulpanitconfig ARM_GIC_V2M 26853a33ceSSuravee Suthikulpanit bool 273ee80364SArnd Bergmann depends on PCI 283ee80364SArnd Bergmann select ARM_GIC 293ee80364SArnd Bergmann select PCI_MSI 30853a33ceSSuravee Suthikulpanit 3181243e44SRob Herringconfig GIC_NON_BANKED 3281243e44SRob Herring bool 3381243e44SRob Herring 34021f6537SMarc Zyngierconfig ARM_GIC_V3 35021f6537SMarc Zyngier bool 364f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 37443acc4fSMarc Zyngier select IRQ_DOMAIN_HIERARCHY 38e3825ba1SMarc Zyngier select PARTITION_PERCPU 39956ae91aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 40021f6537SMarc Zyngier 4119812729SMarc Zyngierconfig ARM_GIC_V3_ITS 4219812729SMarc Zyngier bool 4329f41139SMarc Zyngier select GENERIC_MSI_IRQ_DOMAIN 4429f41139SMarc Zyngier default ARM_GIC_V3 4529f41139SMarc Zyngier 4629f41139SMarc Zyngierconfig ARM_GIC_V3_ITS_PCI 4729f41139SMarc Zyngier bool 4829f41139SMarc Zyngier depends on ARM_GIC_V3_ITS 493ee80364SArnd Bergmann depends on PCI 503ee80364SArnd Bergmann depends on PCI_MSI 5129f41139SMarc Zyngier default ARM_GIC_V3_ITS 52292ec080SUwe Kleine-König 537afe031cSBogdan Purcareataconfig ARM_GIC_V3_ITS_FSL_MC 547afe031cSBogdan Purcareata bool 557afe031cSBogdan Purcareata depends on ARM_GIC_V3_ITS 567afe031cSBogdan Purcareata depends on FSL_MC_BUS 577afe031cSBogdan Purcareata default ARM_GIC_V3_ITS 587afe031cSBogdan Purcareata 5944430ec0SRob Herringconfig ARM_NVIC 6044430ec0SRob Herring bool 612d9f59f7SStefan Agner select IRQ_DOMAIN_HIERARCHY 6244430ec0SRob Herring select GENERIC_IRQ_CHIP 6344430ec0SRob Herring 6444430ec0SRob Herringconfig ARM_VIC 6544430ec0SRob Herring bool 6644430ec0SRob Herring select IRQ_DOMAIN 674f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 6844430ec0SRob Herring 6944430ec0SRob Herringconfig ARM_VIC_NR 7044430ec0SRob Herring int 7144430ec0SRob Herring default 4 if ARCH_S5PV210 7244430ec0SRob Herring default 2 7344430ec0SRob Herring depends on ARM_VIC 7444430ec0SRob Herring help 7544430ec0SRob Herring The maximum number of VICs available in the system, for 7644430ec0SRob Herring power management. 7744430ec0SRob Herring 78fed6d336SThomas Petazzoniconfig ARMADA_370_XP_IRQ 79fed6d336SThomas Petazzoni bool 80fed6d336SThomas Petazzoni select GENERIC_IRQ_CHIP 813ee80364SArnd Bergmann select PCI_MSI if PCI 82e31793a3SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 83fed6d336SThomas Petazzoni 84e6b78f2cSAntoine Tenartconfig ALPINE_MSI 85e6b78f2cSAntoine Tenart bool 863ee80364SArnd Bergmann depends on PCI 873ee80364SArnd Bergmann select PCI_MSI 88e6b78f2cSAntoine Tenart select GENERIC_IRQ_CHIP 89e6b78f2cSAntoine Tenart 901eb77c3bSTalel Shenharconfig AL_FIC 911eb77c3bSTalel Shenhar bool "Amazon's Annapurna Labs Fabric Interrupt Controller" 921eb77c3bSTalel Shenhar depends on OF || COMPILE_TEST 931eb77c3bSTalel Shenhar select GENERIC_IRQ_CHIP 941eb77c3bSTalel Shenhar select IRQ_DOMAIN 951eb77c3bSTalel Shenhar help 961eb77c3bSTalel Shenhar Support Amazon's Annapurna Labs Fabric Interrupt Controller. 971eb77c3bSTalel Shenhar 98b1479ebbSBoris BREZILLONconfig ATMEL_AIC_IRQ 99b1479ebbSBoris BREZILLON bool 100b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 101b1479ebbSBoris BREZILLON select IRQ_DOMAIN 1024f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 103b1479ebbSBoris BREZILLON select SPARSE_IRQ 104b1479ebbSBoris BREZILLON 105b1479ebbSBoris BREZILLONconfig ATMEL_AIC5_IRQ 106b1479ebbSBoris BREZILLON bool 107b1479ebbSBoris BREZILLON select GENERIC_IRQ_CHIP 108b1479ebbSBoris BREZILLON select IRQ_DOMAIN 1094f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 110b1479ebbSBoris BREZILLON select SPARSE_IRQ 111b1479ebbSBoris BREZILLON 1120509cfdeSRalf Baechleconfig I8259 1130509cfdeSRalf Baechle bool 1140509cfdeSRalf Baechle select IRQ_DOMAIN 1150509cfdeSRalf Baechle 116c7c42ec2SSimon Arlottconfig BCM6345_L1_IRQ 117c7c42ec2SSimon Arlott bool 118c7c42ec2SSimon Arlott select GENERIC_IRQ_CHIP 119c7c42ec2SSimon Arlott select IRQ_DOMAIN 120d0ed5e8eSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 121c7c42ec2SSimon Arlott 1225f7f0317SKevin Cernekeeconfig BCM7038_L1_IRQ 1235f7f0317SKevin Cernekee bool 1245f7f0317SKevin Cernekee select GENERIC_IRQ_CHIP 1255f7f0317SKevin Cernekee select IRQ_DOMAIN 126b8d9884aSMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 1275f7f0317SKevin Cernekee 128a4fcbb86SKevin Cernekeeconfig BCM7120_L2_IRQ 129a4fcbb86SKevin Cernekee bool 130a4fcbb86SKevin Cernekee select GENERIC_IRQ_CHIP 131a4fcbb86SKevin Cernekee select IRQ_DOMAIN 132a4fcbb86SKevin Cernekee 1337f646e92SFlorian Fainelliconfig BRCMSTB_L2_IRQ 1347f646e92SFlorian Fainelli bool 1357f646e92SFlorian Fainelli select GENERIC_IRQ_CHIP 1367f646e92SFlorian Fainelli select IRQ_DOMAIN 1377f646e92SFlorian Fainelli 1380145beedSBartosz Golaszewskiconfig DAVINCI_AINTC 1390145beedSBartosz Golaszewski bool 1400145beedSBartosz Golaszewski select GENERIC_IRQ_CHIP 1410145beedSBartosz Golaszewski select IRQ_DOMAIN 1420145beedSBartosz Golaszewski 1430fc3d74cSBartosz Golaszewskiconfig DAVINCI_CP_INTC 1440fc3d74cSBartosz Golaszewski bool 1450fc3d74cSBartosz Golaszewski select GENERIC_IRQ_CHIP 1460fc3d74cSBartosz Golaszewski select IRQ_DOMAIN 1470fc3d74cSBartosz Golaszewski 148350d71b9SSebastian Hesselbarthconfig DW_APB_ICTL 149350d71b9SSebastian Hesselbarth bool 150e1588490SJisheng Zhang select GENERIC_IRQ_CHIP 151350d71b9SSebastian Hesselbarth select IRQ_DOMAIN 152350d71b9SSebastian Hesselbarth 1536ee532e2SLinus Walleijconfig FARADAY_FTINTC010 1546ee532e2SLinus Walleij bool 1556ee532e2SLinus Walleij select IRQ_DOMAIN 1564f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 1576ee532e2SLinus Walleij select SPARSE_IRQ 1586ee532e2SLinus Walleij 1599a7c4abdSMaJunconfig HISILICON_IRQ_MBIGEN 1609a7c4abdSMaJun bool 1619a7c4abdSMaJun select ARM_GIC_V3 1629a7c4abdSMaJun select ARM_GIC_V3_ITS 1639a7c4abdSMaJun 164b6ef9161SJames Hoganconfig IMGPDC_IRQ 165b6ef9161SJames Hogan bool 166b6ef9161SJames Hogan select GENERIC_IRQ_CHIP 167b6ef9161SJames Hogan select IRQ_DOMAIN 168b6ef9161SJames Hogan 1695b978c10SLinus Walleijconfig IXP4XX_IRQ 1705b978c10SLinus Walleij bool 1715b978c10SLinus Walleij select IRQ_DOMAIN 1725b978c10SLinus Walleij select GENERIC_IRQ_MULTI_HANDLER 1735b978c10SLinus Walleij select SPARSE_IRQ 1745b978c10SLinus Walleij 175da0abe1aSRichard Fitzgeraldconfig MADERA_IRQ 176da0abe1aSRichard Fitzgerald tristate 177da0abe1aSRichard Fitzgerald 17867e38cf2SRalf Baechleconfig IRQ_MIPS_CPU 17967e38cf2SRalf Baechle bool 18067e38cf2SRalf Baechle select GENERIC_IRQ_CHIP 1813838a547SPaul Burton select GENERIC_IRQ_IPI if SYS_SUPPORTS_MULTITHREADING 18267e38cf2SRalf Baechle select IRQ_DOMAIN 1833838a547SPaul Burton select IRQ_DOMAIN_HIERARCHY if GENERIC_IRQ_IPI 18418416e45SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 18567e38cf2SRalf Baechle 186afc98d90SAlexander Shiyanconfig CLPS711X_IRQCHIP 187afc98d90SAlexander Shiyan bool 188afc98d90SAlexander Shiyan depends on ARCH_CLPS711X 189afc98d90SAlexander Shiyan select IRQ_DOMAIN 1904f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 191afc98d90SAlexander Shiyan select SPARSE_IRQ 192afc98d90SAlexander Shiyan default y 193afc98d90SAlexander Shiyan 1949b54470aSStafford Horneconfig OMPIC 1959b54470aSStafford Horne bool 1969b54470aSStafford Horne 1974db8e6d2SStefan Kristianssonconfig OR1K_PIC 1984db8e6d2SStefan Kristiansson bool 1994db8e6d2SStefan Kristiansson select IRQ_DOMAIN 2004db8e6d2SStefan Kristiansson 2018598066cSFelipe Balbiconfig OMAP_IRQCHIP 2028598066cSFelipe Balbi bool 2038598066cSFelipe Balbi select GENERIC_IRQ_CHIP 2048598066cSFelipe Balbi select IRQ_DOMAIN 2058598066cSFelipe Balbi 2069dbd90f1SSebastian Hesselbarthconfig ORION_IRQCHIP 2079dbd90f1SSebastian Hesselbarth bool 2089dbd90f1SSebastian Hesselbarth select IRQ_DOMAIN 2094f7799d9SPalmer Dabbelt select GENERIC_IRQ_MULTI_HANDLER 2109dbd90f1SSebastian Hesselbarth 211aaa8666aSCristian Birsanconfig PIC32_EVIC 212aaa8666aSCristian Birsan bool 213aaa8666aSCristian Birsan select GENERIC_IRQ_CHIP 214aaa8666aSCristian Birsan select IRQ_DOMAIN 215aaa8666aSCristian Birsan 216981b58f6SRich Felkerconfig JCORE_AIC 2173602ffdeSRich Felker bool "J-Core integrated AIC" if COMPILE_TEST 2183602ffdeSRich Felker depends on OF 219981b58f6SRich Felker select IRQ_DOMAIN 220981b58f6SRich Felker help 221981b58f6SRich Felker Support for the J-Core integrated AIC. 222981b58f6SRich Felker 223d852e62aSManivannan Sadhasivamconfig RDA_INTC 224d852e62aSManivannan Sadhasivam bool 225d852e62aSManivannan Sadhasivam select IRQ_DOMAIN 226d852e62aSManivannan Sadhasivam 22744358048SMagnus Dammconfig RENESAS_INTC_IRQPIN 22802d7e041SGeert Uytterhoeven bool "Renesas INTC External IRQ Pin Support" if COMPILE_TEST 22944358048SMagnus Damm select IRQ_DOMAIN 23002d7e041SGeert Uytterhoeven help 23102d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 23202d7e041SGeert Uytterhoeven interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs. 23344358048SMagnus Damm 234fbc83b7fSMagnus Dammconfig RENESAS_IRQC 23502d7e041SGeert Uytterhoeven bool "Renesas R-Mobile APE6 and R-Car IRQC support" if COMPILE_TEST 23699c221dfSMagnus Damm select GENERIC_IRQ_CHIP 237fbc83b7fSMagnus Damm select IRQ_DOMAIN 23802d7e041SGeert Uytterhoeven help 23902d7e041SGeert Uytterhoeven Enable support for the Renesas Interrupt Controller for external 24002d7e041SGeert Uytterhoeven devices, as found on R-Mobile APE6, R-Car Gen2, and R-Car Gen3 SoCs. 241fbc83b7fSMagnus Damm 242a644ccb8SGeert Uytterhoevenconfig RENESAS_RZA1_IRQC 24302d7e041SGeert Uytterhoeven bool "Renesas RZ/A1 IRQC support" if COMPILE_TEST 244a644ccb8SGeert Uytterhoeven select IRQ_DOMAIN_HIERARCHY 24502d7e041SGeert Uytterhoeven help 24602d7e041SGeert Uytterhoeven Enable support for the Renesas RZ/A1 Interrupt Controller, to use up 24702d7e041SGeert Uytterhoeven to 8 external interrupts with configurable sense select. 248a644ccb8SGeert Uytterhoeven 249*03ac990eSMichael Walleconfig SL28CPLD_INTC 250*03ac990eSMichael Walle bool "Kontron sl28cpld IRQ controller" 251*03ac990eSMichael Walle depends on MFD_SL28CPLD=y || COMPILE_TEST 252*03ac990eSMichael Walle select REGMAP_IRQ 253*03ac990eSMichael Walle help 254*03ac990eSMichael Walle Interrupt controller driver for the board management controller 255*03ac990eSMichael Walle found on the Kontron sl28 CPLD. 256*03ac990eSMichael Walle 25707088484SLee Jonesconfig ST_IRQCHIP 25807088484SLee Jones bool 25907088484SLee Jones select REGMAP 26007088484SLee Jones select MFD_SYSCON 26107088484SLee Jones help 26207088484SLee Jones Enables SysCfg Controlled IRQs on STi based platforms. 26307088484SLee Jones 2644bba6689SMans Rullgardconfig TANGO_IRQ 2654bba6689SMans Rullgard bool 2664bba6689SMans Rullgard select IRQ_DOMAIN 2674bba6689SMans Rullgard select GENERIC_IRQ_CHIP 2684bba6689SMans Rullgard 269b06eb017SChristian Ruppertconfig TB10X_IRQC 270b06eb017SChristian Ruppert bool 271b06eb017SChristian Ruppert select IRQ_DOMAIN 272b06eb017SChristian Ruppert select GENERIC_IRQ_CHIP 273b06eb017SChristian Ruppert 274d01f8633SDamien Riegelconfig TS4800_IRQ 275d01f8633SDamien Riegel tristate "TS-4800 IRQ controller" 276d01f8633SDamien Riegel select IRQ_DOMAIN 2770df337cfSRichard Weinberger depends on HAS_IOMEM 278d2b383dcSJean Delvare depends on SOC_IMX51 || COMPILE_TEST 279d01f8633SDamien Riegel help 280d01f8633SDamien Riegel Support for the TS-4800 FPGA IRQ controller 281d01f8633SDamien Riegel 2822389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ 2832389d501SLinus Walleij bool 2842389d501SLinus Walleij select IRQ_DOMAIN 2852389d501SLinus Walleij 2862389d501SLinus Walleijconfig VERSATILE_FPGA_IRQ_NR 2872389d501SLinus Walleij int 2882389d501SLinus Walleij default 4 2892389d501SLinus Walleij depends on VERSATILE_FPGA_IRQ 29026a8e96aSMax Filippov 29126a8e96aSMax Filippovconfig XTENSA_MX 29226a8e96aSMax Filippov bool 29326a8e96aSMax Filippov select IRQ_DOMAIN 29450091212SMarc Zyngier select GENERIC_IRQ_EFFECTIVE_AFF_MASK 29596ca848eSSricharan R 2960547dc78SZubair Lutfullah Kakakhelconfig XILINX_INTC 2970547dc78SZubair Lutfullah Kakakhel bool 2980547dc78SZubair Lutfullah Kakakhel select IRQ_DOMAIN 2990547dc78SZubair Lutfullah Kakakhel 30096ca848eSSricharan Rconfig IRQ_CROSSBAR 30196ca848eSSricharan R bool 30296ca848eSSricharan R help 303f54619f2SMasanari Iida Support for a CROSSBAR ip that precedes the main interrupt controller. 30496ca848eSSricharan R The primary irqchip invokes the crossbar's callback which inturn allocates 30596ca848eSSricharan R a free irq and configures the IP. Thus the peripheral interrupts are 30696ca848eSSricharan R routed to one of the free irqchip interrupt lines. 30789323f8cSGrygorii Strashko 30889323f8cSGrygorii Strashkoconfig KEYSTONE_IRQ 30989323f8cSGrygorii Strashko tristate "Keystone 2 IRQ controller IP" 31089323f8cSGrygorii Strashko depends on ARCH_KEYSTONE 31189323f8cSGrygorii Strashko help 31289323f8cSGrygorii Strashko Support for Texas Instruments Keystone 2 IRQ controller IP which 31389323f8cSGrygorii Strashko is part of the Keystone 2 IPC mechanism 3148a19b8f1SAndrew Bresticker 3158a19b8f1SAndrew Brestickerconfig MIPS_GIC 3168a19b8f1SAndrew Bresticker bool 317bb11cff3SQais Yousef select GENERIC_IRQ_IPI 3182af70a96SQais Yousef select IRQ_DOMAIN_HIERARCHY 3198a19b8f1SAndrew Bresticker select MIPS_CM 3208a764482SYoshinori Sato 32144e08e70SPaul Burtonconfig INGENIC_IRQ 32244e08e70SPaul Burton bool 32344e08e70SPaul Burton depends on MACH_INGENIC 32444e08e70SPaul Burton default y 32578c10e55SLinus Torvalds 3269536eba0SPaul Cercueilconfig INGENIC_TCU_IRQ 3279536eba0SPaul Cercueil bool "Ingenic JZ47xx TCU interrupt controller" 3289536eba0SPaul Cercueil default MACH_INGENIC 3299536eba0SPaul Cercueil depends on MIPS || COMPILE_TEST 3309536eba0SPaul Cercueil select MFD_SYSCON 3318084499bSYueHaibing select GENERIC_IRQ_CHIP 3329536eba0SPaul Cercueil help 3339536eba0SPaul Cercueil Support for interrupts in the Timer/Counter Unit (TCU) of the Ingenic 3349536eba0SPaul Cercueil JZ47xx SoCs. 3359536eba0SPaul Cercueil 3369536eba0SPaul Cercueil If unsure, say N. 3379536eba0SPaul Cercueil 3388a764482SYoshinori Satoconfig RENESAS_H8300H_INTC 3398a764482SYoshinori Sato bool 3408a764482SYoshinori Sato select IRQ_DOMAIN 3418a764482SYoshinori Sato 3428a764482SYoshinori Satoconfig RENESAS_H8S_INTC 34302d7e041SGeert Uytterhoeven bool "Renesas H8S Interrupt Controller Support" if COMPILE_TEST 3448a764482SYoshinori Sato select IRQ_DOMAIN 34502d7e041SGeert Uytterhoeven help 34602d7e041SGeert Uytterhoeven Enable support for the Renesas H8/300 Interrupt Controller, as found 34702d7e041SGeert Uytterhoeven on Renesas H8S SoCs. 348e324c4dcSShenwei Wang 349e324c4dcSShenwei Wangconfig IMX_GPCV2 350e324c4dcSShenwei Wang bool 351e324c4dcSShenwei Wang select IRQ_DOMAIN 352e324c4dcSShenwei Wang help 353e324c4dcSShenwei Wang Enables the wakeup IRQs for IMX platforms with GPCv2 block 3547e4ac676SOleksij Rempel 3557e4ac676SOleksij Rempelconfig IRQ_MXS 3567e4ac676SOleksij Rempel def_bool y if MACH_ASM9260 || ARCH_MXS 3577e4ac676SOleksij Rempel select IRQ_DOMAIN 3587e4ac676SOleksij Rempel select STMP_DEVICE 359c27f29bbSThomas Petazzoni 36019d99164SAlexandre Belloniconfig MSCC_OCELOT_IRQ 36119d99164SAlexandre Belloni bool 36219d99164SAlexandre Belloni select IRQ_DOMAIN 36319d99164SAlexandre Belloni select GENERIC_IRQ_CHIP 36419d99164SAlexandre Belloni 365a68a63cbSThomas Petazzoniconfig MVEBU_GICP 366a68a63cbSThomas Petazzoni bool 367a68a63cbSThomas Petazzoni 368e0de91a9SThomas Petazzoniconfig MVEBU_ICU 369e0de91a9SThomas Petazzoni bool 370e0de91a9SThomas Petazzoni 371c27f29bbSThomas Petazzoniconfig MVEBU_ODMI 372c27f29bbSThomas Petazzoni bool 373fa23b9d1SArnd Bergmann select GENERIC_MSI_IRQ_DOMAIN 3749e2c986cSMarc Zyngier 375a109893bSThomas Petazzoniconfig MVEBU_PIC 376a109893bSThomas Petazzoni bool 377a109893bSThomas Petazzoni 37861ce8d8dSMiquel Raynalconfig MVEBU_SEI 37961ce8d8dSMiquel Raynal bool 38061ce8d8dSMiquel Raynal 3810dcd9f87SRasmus Villemoesconfig LS_EXTIRQ 3820dcd9f87SRasmus Villemoes def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 3830dcd9f87SRasmus Villemoes select MFD_SYSCON 3840dcd9f87SRasmus Villemoes 385b8f3ebe6SMinghuan Lianconfig LS_SCFG_MSI 386b8f3ebe6SMinghuan Lian def_bool y if SOC_LS1021A || ARCH_LAYERSCAPE 387b8f3ebe6SMinghuan Lian depends on PCI && PCI_MSI 388b8f3ebe6SMinghuan Lian 3899e2c986cSMarc Zyngierconfig PARTITION_PERCPU 3909e2c986cSMarc Zyngier bool 3910efacbbaSLinus Torvalds 39244df427cSNoam Camusconfig EZNPS_GIC 39344df427cSNoam Camus bool "NPS400 Global Interrupt Manager (GIM)" 394ffd565e3SArnd Bergmann depends on ARC || (COMPILE_TEST && !64BIT) 39544df427cSNoam Camus select IRQ_DOMAIN 39644df427cSNoam Camus help 39744df427cSNoam Camus Support the EZchip NPS400 global interrupt controller 398e0720416SAlexandre TORGUE 399e0720416SAlexandre TORGUEconfig STM32_EXTI 400e0720416SAlexandre TORGUE bool 401e0720416SAlexandre TORGUE select IRQ_DOMAIN 4020e7d7807SLudovic Barre select GENERIC_IRQ_CHIP 403f20cc9b0SAgustin Vega-Frias 404f20cc9b0SAgustin Vega-Friasconfig QCOM_IRQ_COMBINER 405f20cc9b0SAgustin Vega-Frias bool "QCOM IRQ combiner support" 406f20cc9b0SAgustin Vega-Frias depends on ARCH_QCOM && ACPI 407f20cc9b0SAgustin Vega-Frias select IRQ_DOMAIN_HIERARCHY 408f20cc9b0SAgustin Vega-Frias help 409f20cc9b0SAgustin Vega-Frias Say yes here to add support for the IRQ combiner devices embedded 410f20cc9b0SAgustin Vega-Frias in Qualcomm Technologies chips. 4115ed34d3aSMasahiro Yamada 4125ed34d3aSMasahiro Yamadaconfig IRQ_UNIPHIER_AIDET 4135ed34d3aSMasahiro Yamada bool "UniPhier AIDET support" if COMPILE_TEST 4145ed34d3aSMasahiro Yamada depends on ARCH_UNIPHIER || COMPILE_TEST 4155ed34d3aSMasahiro Yamada default ARCH_UNIPHIER 4165ed34d3aSMasahiro Yamada select IRQ_DOMAIN_HIERARCHY 4175ed34d3aSMasahiro Yamada help 4185ed34d3aSMasahiro Yamada Support for the UniPhier AIDET (ARM Interrupt Detector). 419c94fb639SRandy Dunlap 420215f4cc0SJerome Brunetconfig MESON_IRQ_GPIO 421215f4cc0SJerome Brunet bool "Meson GPIO Interrupt Multiplexer" 422d9ee91c1SThomas Gleixner depends on ARCH_MESON 423215f4cc0SJerome Brunet select IRQ_DOMAIN_HIERARCHY 424215f4cc0SJerome Brunet help 425215f4cc0SJerome Brunet Support Meson SoC Family GPIO Interrupt Multiplexer 426215f4cc0SJerome Brunet 4274235ff50SMiodrag Dinicconfig GOLDFISH_PIC 4284235ff50SMiodrag Dinic bool "Goldfish programmable interrupt controller" 4294235ff50SMiodrag Dinic depends on MIPS && (GOLDFISH || COMPILE_TEST) 4304235ff50SMiodrag Dinic select IRQ_DOMAIN 4314235ff50SMiodrag Dinic help 4324235ff50SMiodrag Dinic Say yes here to enable Goldfish interrupt controller driver used 4334235ff50SMiodrag Dinic for Goldfish based virtual platforms. 4344235ff50SMiodrag Dinic 435f55c73aeSArchana Sathyakumarconfig QCOM_PDC 43695bf9305SJohn Stultz tristate "QCOM PDC" 437f55c73aeSArchana Sathyakumar depends on ARCH_QCOM 438f55c73aeSArchana Sathyakumar select IRQ_DOMAIN_HIERARCHY 439f55c73aeSArchana Sathyakumar help 440f55c73aeSArchana Sathyakumar Power Domain Controller driver to manage and configure wakeup 441f55c73aeSArchana Sathyakumar IRQs for Qualcomm Technologies Inc (QTI) mobile chips. 442f55c73aeSArchana Sathyakumar 443d8a5f5f7SGuo Renconfig CSKY_MPINTC 444d8a5f5f7SGuo Ren bool "C-SKY Multi Processor Interrupt Controller" 445d8a5f5f7SGuo Ren depends on CSKY 446d8a5f5f7SGuo Ren help 447d8a5f5f7SGuo Ren Say yes here to enable C-SKY SMP interrupt controller driver used 448d8a5f5f7SGuo Ren for C-SKY SMP system. 449656b42deSRandy Dunlap In fact it's not mmio map in hardware and it uses ld/st to visit the 450d8a5f5f7SGuo Ren controller's register inside CPU. 451d8a5f5f7SGuo Ren 452edff1b48SGuo Renconfig CSKY_APB_INTC 453edff1b48SGuo Ren bool "C-SKY APB Interrupt Controller" 454edff1b48SGuo Ren depends on CSKY 455edff1b48SGuo Ren help 456edff1b48SGuo Ren Say yes here to enable C-SKY APB interrupt controller driver used 457656b42deSRandy Dunlap by C-SKY single core SOC system. It uses mmio map apb-bus to visit 458edff1b48SGuo Ren the controller's register. 459edff1b48SGuo Ren 4600136afa0SLucas Stachconfig IMX_IRQSTEER 4610136afa0SLucas Stach bool "i.MX IRQSTEER support" 4620136afa0SLucas Stach depends on ARCH_MXC || COMPILE_TEST 4630136afa0SLucas Stach default ARCH_MXC 4640136afa0SLucas Stach select IRQ_DOMAIN 4650136afa0SLucas Stach help 4660136afa0SLucas Stach Support for the i.MX IRQSTEER interrupt multiplexer/remapper. 4670136afa0SLucas Stach 4682fbb1396SJoakim Zhangconfig IMX_INTMUX 46966968d7dSAnson Huang def_bool y if ARCH_MXC || COMPILE_TEST 4702fbb1396SJoakim Zhang select IRQ_DOMAIN 4712fbb1396SJoakim Zhang help 4722fbb1396SJoakim Zhang Support for the i.MX INTMUX interrupt multiplexer. 4732fbb1396SJoakim Zhang 4749e543e22SJiaxun Yangconfig LS1X_IRQ 4759e543e22SJiaxun Yang bool "Loongson-1 Interrupt Controller" 4769e543e22SJiaxun Yang depends on MACH_LOONGSON32 4779e543e22SJiaxun Yang default y 4789e543e22SJiaxun Yang select IRQ_DOMAIN 4799e543e22SJiaxun Yang select GENERIC_IRQ_CHIP 4809e543e22SJiaxun Yang help 4819e543e22SJiaxun Yang Support for the Loongson-1 platform Interrupt Controller. 4829e543e22SJiaxun Yang 483cd844b07SLokesh Vutlaconfig TI_SCI_INTR_IRQCHIP 484cd844b07SLokesh Vutla bool 485cd844b07SLokesh Vutla depends on TI_SCI_PROTOCOL 486cd844b07SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 487cd844b07SLokesh Vutla help 488cd844b07SLokesh Vutla This enables the irqchip driver support for K3 Interrupt router 489cd844b07SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 490cd844b07SLokesh Vutla If you wish to use interrupt router irq resources managed by the 491cd844b07SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 492cd844b07SLokesh Vutla 4939f1463b8SLokesh Vutlaconfig TI_SCI_INTA_IRQCHIP 4949f1463b8SLokesh Vutla bool 4959f1463b8SLokesh Vutla depends on TI_SCI_PROTOCOL 4969f1463b8SLokesh Vutla select IRQ_DOMAIN_HIERARCHY 497f011df61SLokesh Vutla select TI_SCI_INTA_MSI_DOMAIN 4989f1463b8SLokesh Vutla help 4999f1463b8SLokesh Vutla This enables the irqchip driver support for K3 Interrupt aggregator 5009f1463b8SLokesh Vutla over TI System Control Interface available on some new TI's SoCs. 5019f1463b8SLokesh Vutla If you wish to use interrupt aggregator irq resources managed by the 5029f1463b8SLokesh Vutla TI System Controller, say Y here. Otherwise, say N. 5039f1463b8SLokesh Vutla 5046b7ce892SAnup Patelconfig RISCV_INTC 5056b7ce892SAnup Patel bool "RISC-V Local Interrupt Controller" 5066b7ce892SAnup Patel depends on RISCV 5076b7ce892SAnup Patel default y 5086b7ce892SAnup Patel help 5096b7ce892SAnup Patel This enables support for the per-HART local interrupt controller 5106b7ce892SAnup Patel found in standard RISC-V systems. The per-HART local interrupt 5116b7ce892SAnup Patel controller handles timer interrupts, software interrupts, and 5126b7ce892SAnup Patel hardware interrupts. Without a per-HART local interrupt controller, 5136b7ce892SAnup Patel a RISC-V system will be unable to handle any interrupts. 5146b7ce892SAnup Patel 5156b7ce892SAnup Patel If you don't know what to do here, say Y. 5166b7ce892SAnup Patel 5178237f8bcSChristoph Hellwigconfig SIFIVE_PLIC 5188237f8bcSChristoph Hellwig bool "SiFive Platform-Level Interrupt Controller" 5198237f8bcSChristoph Hellwig depends on RISCV 520466008f9SYash Shah select IRQ_DOMAIN_HIERARCHY 5218237f8bcSChristoph Hellwig help 5228237f8bcSChristoph Hellwig This enables support for the PLIC chip found in SiFive (and 5238237f8bcSChristoph Hellwig potentially other) RISC-V systems. The PLIC controls devices 5248237f8bcSChristoph Hellwig interrupts and connects them to each core's local interrupt 5258237f8bcSChristoph Hellwig controller. Aside from timer and software interrupts, all other 5268237f8bcSChristoph Hellwig interrupt sources are subordinate to the PLIC. 5278237f8bcSChristoph Hellwig 5288237f8bcSChristoph Hellwig If you don't know what to do here, say Y. 52901493855SJonathan Neuschäfer 530b74416dbSHyunki Kooconfig EXYNOS_IRQ_COMBINER 531b74416dbSHyunki Koo bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST 532b74416dbSHyunki Koo depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST 533b74416dbSHyunki Koo help 534b74416dbSHyunki Koo Say yes here to add support for the IRQ combiner devices embedded 535b74416dbSHyunki Koo in Samsung Exynos chips. 536b74416dbSHyunki Koo 537dbb15226SJiaxun Yangconfig LOONGSON_LIOINTC 538dbb15226SJiaxun Yang bool "Loongson Local I/O Interrupt Controller" 539dbb15226SJiaxun Yang depends on MACH_LOONGSON64 540dbb15226SJiaxun Yang default y 541dbb15226SJiaxun Yang select IRQ_DOMAIN 542dbb15226SJiaxun Yang select GENERIC_IRQ_CHIP 543dbb15226SJiaxun Yang help 544dbb15226SJiaxun Yang Support for the Loongson Local I/O Interrupt Controller. 545dbb15226SJiaxun Yang 546a93f1d90SJiaxun Yangconfig LOONGSON_HTPIC 547a93f1d90SJiaxun Yang bool "Loongson3 HyperTransport PIC Controller" 548a93f1d90SJiaxun Yang depends on MACH_LOONGSON64 549a93f1d90SJiaxun Yang default y 550a93f1d90SJiaxun Yang select IRQ_DOMAIN 551a93f1d90SJiaxun Yang select GENERIC_IRQ_CHIP 552a93f1d90SJiaxun Yang help 553a93f1d90SJiaxun Yang Support for the Loongson-3 HyperTransport PIC Controller. 554a93f1d90SJiaxun Yang 555818e915fSJiaxun Yangconfig LOONGSON_HTVEC 556818e915fSJiaxun Yang bool "Loongson3 HyperTransport Interrupt Vector Controller" 557d77aeb5dSIngo Molnar depends on MACH_LOONGSON64 558818e915fSJiaxun Yang default MACH_LOONGSON64 559818e915fSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 560818e915fSJiaxun Yang help 561818e915fSJiaxun Yang Support for the Loongson3 HyperTransport Interrupt Vector Controller. 562818e915fSJiaxun Yang 563ef8c01ebSJiaxun Yangconfig LOONGSON_PCH_PIC 564ef8c01ebSJiaxun Yang bool "Loongson PCH PIC Controller" 565ef8c01ebSJiaxun Yang depends on MACH_LOONGSON64 || COMPILE_TEST 566ef8c01ebSJiaxun Yang default MACH_LOONGSON64 567ef8c01ebSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 568ef8c01ebSJiaxun Yang select IRQ_FASTEOI_HIERARCHY_HANDLERS 569ef8c01ebSJiaxun Yang help 570ef8c01ebSJiaxun Yang Support for the Loongson PCH PIC Controller. 571ef8c01ebSJiaxun Yang 572632dcc2cSJiaxun Yangconfig LOONGSON_PCH_MSI 573a23df9a4SJiaxun Yang bool "Loongson PCH MSI Controller" 574632dcc2cSJiaxun Yang depends on MACH_LOONGSON64 || COMPILE_TEST 575632dcc2cSJiaxun Yang depends on PCI 576632dcc2cSJiaxun Yang default MACH_LOONGSON64 577632dcc2cSJiaxun Yang select IRQ_DOMAIN_HIERARCHY 578632dcc2cSJiaxun Yang select PCI_MSI 579632dcc2cSJiaxun Yang help 580632dcc2cSJiaxun Yang Support for the Loongson PCH MSI Controller. 581632dcc2cSJiaxun Yang 58201493855SJonathan Neuschäferendmenu 583